1fac71e4eSEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2fac71e4eSEmmanuel Vadot%YAML 1.2 3fac71e4eSEmmanuel Vadot--- 4fac71e4eSEmmanuel Vadot$id: http://devicetree.org/schemas/clock/qcom,kpss-acc-v1.yaml# 5fac71e4eSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6fac71e4eSEmmanuel Vadot 7fac71e4eSEmmanuel Vadottitle: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v1 8fac71e4eSEmmanuel Vadot 9fac71e4eSEmmanuel Vadotmaintainers: 10fac71e4eSEmmanuel Vadot - Christian Marangi <ansuelsmth@gmail.com> 11fac71e4eSEmmanuel Vadot 12fac71e4eSEmmanuel Vadotdescription: 13fac71e4eSEmmanuel Vadot The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. 14fac71e4eSEmmanuel Vadot There is one ACC register region per CPU within the KPSS remapped region as 15fac71e4eSEmmanuel Vadot well as an alias register region that remaps accesses to the ACC associated 16fac71e4eSEmmanuel Vadot with the CPU accessing the region. ACC v1 is currently used as a 17*aa1a8ff2SEmmanuel Vadot clock-controller for enabling the cpu and handling the aux clocks. 18fac71e4eSEmmanuel Vadot 19fac71e4eSEmmanuel Vadotproperties: 20fac71e4eSEmmanuel Vadot compatible: 21fac71e4eSEmmanuel Vadot const: qcom,kpss-acc-v1 22fac71e4eSEmmanuel Vadot 23fac71e4eSEmmanuel Vadot reg: 24fac71e4eSEmmanuel Vadot items: 25fac71e4eSEmmanuel Vadot - description: Base address and size of the register region 26fac71e4eSEmmanuel Vadot - description: Optional base address and size of the alias register region 27fac71e4eSEmmanuel Vadot minItems: 1 28fac71e4eSEmmanuel Vadot 29fac71e4eSEmmanuel Vadot clocks: 30fac71e4eSEmmanuel Vadot minItems: 2 31fac71e4eSEmmanuel Vadot maxItems: 2 32fac71e4eSEmmanuel Vadot 33fac71e4eSEmmanuel Vadot clock-names: 34fac71e4eSEmmanuel Vadot items: 35fac71e4eSEmmanuel Vadot - const: pll8_vote 36fac71e4eSEmmanuel Vadot - const: pxo 37fac71e4eSEmmanuel Vadot 38fac71e4eSEmmanuel Vadot clock-output-names: 39fac71e4eSEmmanuel Vadot description: Name of the aux clock. Krait can have at most 4 cpu. 40fac71e4eSEmmanuel Vadot enum: 41fac71e4eSEmmanuel Vadot - acpu0_aux 42fac71e4eSEmmanuel Vadot - acpu1_aux 43fac71e4eSEmmanuel Vadot - acpu2_aux 44fac71e4eSEmmanuel Vadot - acpu3_aux 45fac71e4eSEmmanuel Vadot 46fac71e4eSEmmanuel Vadot '#clock-cells': 47fac71e4eSEmmanuel Vadot const: 0 48fac71e4eSEmmanuel Vadot 49fac71e4eSEmmanuel Vadotrequired: 50fac71e4eSEmmanuel Vadot - compatible 51fac71e4eSEmmanuel Vadot - reg 52fac71e4eSEmmanuel Vadot - clocks 53fac71e4eSEmmanuel Vadot - clock-names 54fac71e4eSEmmanuel Vadot - clock-output-names 55fac71e4eSEmmanuel Vadot - '#clock-cells' 56fac71e4eSEmmanuel Vadot 57fac71e4eSEmmanuel VadotadditionalProperties: false 58fac71e4eSEmmanuel Vadot 59fac71e4eSEmmanuel Vadotexamples: 60fac71e4eSEmmanuel Vadot - | 61fac71e4eSEmmanuel Vadot #include <dt-bindings/clock/qcom,gcc-ipq806x.h> 62fac71e4eSEmmanuel Vadot 63fac71e4eSEmmanuel Vadot clock-controller@2088000 { 64fac71e4eSEmmanuel Vadot compatible = "qcom,kpss-acc-v1"; 65fac71e4eSEmmanuel Vadot reg = <0x02088000 0x1000>, <0x02008000 0x1000>; 66fac71e4eSEmmanuel Vadot clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 67fac71e4eSEmmanuel Vadot clock-names = "pll8_vote", "pxo"; 68fac71e4eSEmmanuel Vadot clock-output-names = "acpu0_aux"; 69fac71e4eSEmmanuel Vadot #clock-cells = <0>; 70fac71e4eSEmmanuel Vadot }; 71fac71e4eSEmmanuel Vadot 72fac71e4eSEmmanuel Vadot... 73