1*1fb62fb0SOlivier Houchard /*
2*1fb62fb0SOlivier Houchard * Copyright 2013 John Wittrock.
3*1fb62fb0SOlivier Houchard * Copyright 2013-2015 Samy Al Bahra.
4*1fb62fb0SOlivier Houchard * All rights reserved.
5*1fb62fb0SOlivier Houchard *
6*1fb62fb0SOlivier Houchard * Redistribution and use in source and binary forms, with or without
7*1fb62fb0SOlivier Houchard * modification, are permitted provided that the following conditions
8*1fb62fb0SOlivier Houchard * are met:
9*1fb62fb0SOlivier Houchard * 1. Redistributions of source code must retain the above copyright
10*1fb62fb0SOlivier Houchard * notice, this list of conditions and the following disclaimer.
11*1fb62fb0SOlivier Houchard * 2. Redistributions in binary form must reproduce the above copyright
12*1fb62fb0SOlivier Houchard * notice, this list of conditions and the following disclaimer in the
13*1fb62fb0SOlivier Houchard * documentation and/or other materials provided with the distribution.
14*1fb62fb0SOlivier Houchard *
15*1fb62fb0SOlivier Houchard * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16*1fb62fb0SOlivier Houchard * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17*1fb62fb0SOlivier Houchard * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18*1fb62fb0SOlivier Houchard * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19*1fb62fb0SOlivier Houchard * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20*1fb62fb0SOlivier Houchard * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21*1fb62fb0SOlivier Houchard * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22*1fb62fb0SOlivier Houchard * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23*1fb62fb0SOlivier Houchard * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24*1fb62fb0SOlivier Houchard * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25*1fb62fb0SOlivier Houchard * SUCH DAMAGE.
26*1fb62fb0SOlivier Houchard */
27*1fb62fb0SOlivier Houchard
28*1fb62fb0SOlivier Houchard #ifndef CK_PFLOCK_H
29*1fb62fb0SOlivier Houchard #define CK_PFLOCK_H
30*1fb62fb0SOlivier Houchard
31*1fb62fb0SOlivier Houchard /*
32*1fb62fb0SOlivier Houchard * This is an implementation of phase-fair locks derived from the work
33*1fb62fb0SOlivier Houchard * described in:
34*1fb62fb0SOlivier Houchard * Brandenburg, B. and Anderson, J. 2010. Spin-Based
35*1fb62fb0SOlivier Houchard * Reader-Writer Synchronization for Multiprocessor Real-Time Systems
36*1fb62fb0SOlivier Houchard */
37*1fb62fb0SOlivier Houchard
38*1fb62fb0SOlivier Houchard #include <ck_cc.h>
39*1fb62fb0SOlivier Houchard #include <ck_pr.h>
40*1fb62fb0SOlivier Houchard
41*1fb62fb0SOlivier Houchard struct ck_pflock {
42*1fb62fb0SOlivier Houchard uint32_t rin;
43*1fb62fb0SOlivier Houchard uint32_t rout;
44*1fb62fb0SOlivier Houchard uint32_t win;
45*1fb62fb0SOlivier Houchard uint32_t wout;
46*1fb62fb0SOlivier Houchard };
47*1fb62fb0SOlivier Houchard typedef struct ck_pflock ck_pflock_t;
48*1fb62fb0SOlivier Houchard
49*1fb62fb0SOlivier Houchard #define CK_PFLOCK_LSB 0xFFFFFFF0
50*1fb62fb0SOlivier Houchard #define CK_PFLOCK_RINC 0x100 /* Reader increment value. */
51*1fb62fb0SOlivier Houchard #define CK_PFLOCK_WBITS 0x3 /* Writer bits in reader. */
52*1fb62fb0SOlivier Houchard #define CK_PFLOCK_PRES 0x2 /* Writer present bit. */
53*1fb62fb0SOlivier Houchard #define CK_PFLOCK_PHID 0x1 /* Phase ID bit. */
54*1fb62fb0SOlivier Houchard
55*1fb62fb0SOlivier Houchard #define CK_PFLOCK_INITIALIZER {0, 0, 0, 0}
56*1fb62fb0SOlivier Houchard
57*1fb62fb0SOlivier Houchard CK_CC_INLINE static void
ck_pflock_init(struct ck_pflock * pf)58*1fb62fb0SOlivier Houchard ck_pflock_init(struct ck_pflock *pf)
59*1fb62fb0SOlivier Houchard {
60*1fb62fb0SOlivier Houchard
61*1fb62fb0SOlivier Houchard pf->rin = 0;
62*1fb62fb0SOlivier Houchard pf->rout = 0;
63*1fb62fb0SOlivier Houchard pf->win = 0;
64*1fb62fb0SOlivier Houchard pf->wout = 0;
65*1fb62fb0SOlivier Houchard ck_pr_barrier();
66*1fb62fb0SOlivier Houchard
67*1fb62fb0SOlivier Houchard return;
68*1fb62fb0SOlivier Houchard }
69*1fb62fb0SOlivier Houchard
70*1fb62fb0SOlivier Houchard CK_CC_INLINE static void
ck_pflock_write_unlock(ck_pflock_t * pf)71*1fb62fb0SOlivier Houchard ck_pflock_write_unlock(ck_pflock_t *pf)
72*1fb62fb0SOlivier Houchard {
73*1fb62fb0SOlivier Houchard
74*1fb62fb0SOlivier Houchard ck_pr_fence_unlock();
75*1fb62fb0SOlivier Houchard
76*1fb62fb0SOlivier Houchard /* Migrate from write phase to read phase. */
77*1fb62fb0SOlivier Houchard ck_pr_and_32(&pf->rin, CK_PFLOCK_LSB);
78*1fb62fb0SOlivier Houchard
79*1fb62fb0SOlivier Houchard /* Allow other writers to continue. */
80*1fb62fb0SOlivier Houchard ck_pr_faa_32(&pf->wout, 1);
81*1fb62fb0SOlivier Houchard return;
82*1fb62fb0SOlivier Houchard }
83*1fb62fb0SOlivier Houchard
84*1fb62fb0SOlivier Houchard CK_CC_INLINE static void
ck_pflock_write_lock(ck_pflock_t * pf)85*1fb62fb0SOlivier Houchard ck_pflock_write_lock(ck_pflock_t *pf)
86*1fb62fb0SOlivier Houchard {
87*1fb62fb0SOlivier Houchard uint32_t ticket;
88*1fb62fb0SOlivier Houchard
89*1fb62fb0SOlivier Houchard /* Acquire ownership of write-phase. */
90*1fb62fb0SOlivier Houchard ticket = ck_pr_faa_32(&pf->win, 1);
91*1fb62fb0SOlivier Houchard while (ck_pr_load_32(&pf->wout) != ticket)
92*1fb62fb0SOlivier Houchard ck_pr_stall();
93*1fb62fb0SOlivier Houchard
94*1fb62fb0SOlivier Houchard /*
95*1fb62fb0SOlivier Houchard * Acquire ticket on read-side in order to allow them
96*1fb62fb0SOlivier Houchard * to flush. Indicates to any incoming reader that a
97*1fb62fb0SOlivier Houchard * write-phase is pending.
98*1fb62fb0SOlivier Houchard */
99*1fb62fb0SOlivier Houchard ticket = ck_pr_faa_32(&pf->rin,
100*1fb62fb0SOlivier Houchard (ticket & CK_PFLOCK_PHID) | CK_PFLOCK_PRES);
101*1fb62fb0SOlivier Houchard
102*1fb62fb0SOlivier Houchard /* Wait for any pending readers to flush. */
103*1fb62fb0SOlivier Houchard while (ck_pr_load_32(&pf->rout) != ticket)
104*1fb62fb0SOlivier Houchard ck_pr_stall();
105*1fb62fb0SOlivier Houchard
106*1fb62fb0SOlivier Houchard ck_pr_fence_lock();
107*1fb62fb0SOlivier Houchard return;
108*1fb62fb0SOlivier Houchard }
109*1fb62fb0SOlivier Houchard
110*1fb62fb0SOlivier Houchard CK_CC_INLINE static void
ck_pflock_read_unlock(ck_pflock_t * pf)111*1fb62fb0SOlivier Houchard ck_pflock_read_unlock(ck_pflock_t *pf)
112*1fb62fb0SOlivier Houchard {
113*1fb62fb0SOlivier Houchard
114*1fb62fb0SOlivier Houchard ck_pr_fence_unlock();
115*1fb62fb0SOlivier Houchard ck_pr_faa_32(&pf->rout, CK_PFLOCK_RINC);
116*1fb62fb0SOlivier Houchard return;
117*1fb62fb0SOlivier Houchard }
118*1fb62fb0SOlivier Houchard
119*1fb62fb0SOlivier Houchard CK_CC_INLINE static void
ck_pflock_read_lock(ck_pflock_t * pf)120*1fb62fb0SOlivier Houchard ck_pflock_read_lock(ck_pflock_t *pf)
121*1fb62fb0SOlivier Houchard {
122*1fb62fb0SOlivier Houchard uint32_t w;
123*1fb62fb0SOlivier Houchard
124*1fb62fb0SOlivier Houchard /*
125*1fb62fb0SOlivier Houchard * If no writer is present, then the operation has completed
126*1fb62fb0SOlivier Houchard * successfully.
127*1fb62fb0SOlivier Houchard */
128*1fb62fb0SOlivier Houchard w = ck_pr_faa_32(&pf->rin, CK_PFLOCK_RINC) & CK_PFLOCK_WBITS;
129*1fb62fb0SOlivier Houchard if (w == 0)
130*1fb62fb0SOlivier Houchard goto leave;
131*1fb62fb0SOlivier Houchard
132*1fb62fb0SOlivier Houchard /* Wait for current write phase to complete. */
133*1fb62fb0SOlivier Houchard while ((ck_pr_load_32(&pf->rin) & CK_PFLOCK_WBITS) == w)
134*1fb62fb0SOlivier Houchard ck_pr_stall();
135*1fb62fb0SOlivier Houchard
136*1fb62fb0SOlivier Houchard leave:
137*1fb62fb0SOlivier Houchard /* Acquire semantics with respect to readers. */
138*1fb62fb0SOlivier Houchard ck_pr_fence_lock();
139*1fb62fb0SOlivier Houchard return;
140*1fb62fb0SOlivier Houchard }
141*1fb62fb0SOlivier Houchard
142*1fb62fb0SOlivier Houchard #endif /* CK_PFLOCK_H */
143