1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 2003 Peter Wemm. 5 * Copyright (c) 1992 Terrence R. Lambert. 6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * William Jolitz. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_cpu.h" 47 #include "opt_ddb.h" 48 #include "opt_kstack_pages.h" 49 50 #include <sys/param.h> 51 #include <sys/proc.h> 52 #include <sys/systm.h> 53 #include <sys/exec.h> 54 #include <sys/imgact.h> 55 #include <sys/kdb.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/linker.h> 59 #include <sys/lock.h> 60 #include <sys/malloc.h> 61 #include <sys/mutex.h> 62 #include <sys/pcpu.h> 63 #include <sys/reg.h> 64 #include <sys/rwlock.h> 65 #include <sys/signalvar.h> 66 #ifdef SMP 67 #include <sys/smp.h> 68 #endif 69 #include <sys/syscallsubr.h> 70 #include <sys/sysctl.h> 71 #include <sys/sysent.h> 72 #include <sys/sysproto.h> 73 #include <sys/ucontext.h> 74 #include <sys/vmmeter.h> 75 76 #include <vm/vm.h> 77 #include <vm/vm_param.h> 78 #include <vm/vm_extern.h> 79 #include <vm/pmap.h> 80 81 #ifdef DDB 82 #ifndef KDB 83 #error KDB must be enabled in order for DDB to work! 84 #endif 85 #include <ddb/ddb.h> 86 #include <ddb/db_sym.h> 87 #endif 88 89 #include <machine/vmparam.h> 90 #include <machine/frame.h> 91 #include <machine/md_var.h> 92 #include <machine/pcb.h> 93 #include <machine/proc.h> 94 #include <machine/sigframe.h> 95 #include <machine/specialreg.h> 96 #include <machine/trap.h> 97 98 /* 99 * Send an interrupt to process. 100 * 101 * Stack is set up to allow sigcode stored at top to call routine, 102 * followed by call to sigreturn routine below. After sigreturn 103 * resets the signal mask, the stack, and the frame pointer, it 104 * returns to the user specified pc, psl. 105 */ 106 void 107 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 108 { 109 struct sigframe sf, *sfp; 110 struct pcb *pcb; 111 struct proc *p; 112 struct thread *td; 113 struct sigacts *psp; 114 char *sp; 115 struct trapframe *regs; 116 char *xfpusave; 117 size_t xfpusave_len; 118 int sig; 119 int oonstack; 120 121 td = curthread; 122 pcb = td->td_pcb; 123 p = td->td_proc; 124 PROC_LOCK_ASSERT(p, MA_OWNED); 125 sig = ksi->ksi_signo; 126 psp = p->p_sigacts; 127 mtx_assert(&psp->ps_mtx, MA_OWNED); 128 regs = td->td_frame; 129 oonstack = sigonstack(regs->tf_rsp); 130 131 /* Save user context. */ 132 bzero(&sf, sizeof(sf)); 133 sf.sf_uc.uc_sigmask = *mask; 134 sf.sf_uc.uc_stack = td->td_sigstk; 135 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 136 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 137 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 138 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 139 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 140 get_fpcontext(td, &sf.sf_uc.uc_mcontext, &xfpusave, &xfpusave_len); 141 update_pcb_bases(pcb); 142 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase; 143 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase; 144 bzero(sf.sf_uc.uc_mcontext.mc_spare, 145 sizeof(sf.sf_uc.uc_mcontext.mc_spare)); 146 147 /* Allocate space for the signal handler context. */ 148 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 149 SIGISMEMBER(psp->ps_sigonstack, sig)) { 150 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size; 151 #if defined(COMPAT_43) 152 td->td_sigstk.ss_flags |= SS_ONSTACK; 153 #endif 154 } else 155 sp = (char *)regs->tf_rsp - 128; 156 if (xfpusave != NULL) { 157 sp -= xfpusave_len; 158 sp = (char *)((unsigned long)sp & ~0x3Ful); 159 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp; 160 } 161 sp -= sizeof(struct sigframe); 162 /* Align to 16 bytes. */ 163 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 164 165 /* Build the argument list for the signal handler. */ 166 regs->tf_rdi = sig; /* arg 1 in %rdi */ 167 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 168 bzero(&sf.sf_si, sizeof(sf.sf_si)); 169 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 170 /* Signal handler installed with SA_SIGINFO. */ 171 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 172 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 173 174 /* Fill in POSIX parts */ 175 sf.sf_si = ksi->ksi_info; 176 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 177 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 178 } else { 179 /* Old FreeBSD-style arguments. */ 180 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 181 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 182 sf.sf_ahu.sf_handler = catcher; 183 } 184 mtx_unlock(&psp->ps_mtx); 185 PROC_UNLOCK(p); 186 187 /* 188 * Copy the sigframe out to the user's stack. 189 */ 190 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 || 191 (xfpusave != NULL && copyout(xfpusave, 192 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len) 193 != 0)) { 194 uprintf("pid %d comm %s has trashed its stack, killing\n", 195 p->p_pid, p->p_comm); 196 PROC_LOCK(p); 197 sigexit(td, SIGILL); 198 } 199 200 fpstate_drop(td); 201 regs->tf_rsp = (long)sfp; 202 regs->tf_rip = p->p_sysent->sv_sigcode_base; 203 regs->tf_rflags &= ~(PSL_T | PSL_D); 204 regs->tf_cs = _ucodesel; 205 regs->tf_ds = _udatasel; 206 regs->tf_ss = _udatasel; 207 regs->tf_es = _udatasel; 208 regs->tf_fs = _ufssel; 209 regs->tf_gs = _ugssel; 210 regs->tf_flags = TF_HASSEGS; 211 PROC_LOCK(p); 212 mtx_lock(&psp->ps_mtx); 213 } 214 215 /* 216 * System call to cleanup state after a signal 217 * has been taken. Reset signal mask and 218 * stack state from context left by sendsig (above). 219 * Return to previous pc and psl as specified by 220 * context left by sendsig. Check carefully to 221 * make sure that the user has not modified the 222 * state to gain improper privileges. 223 */ 224 int 225 sys_sigreturn(struct thread *td, struct sigreturn_args *uap) 226 { 227 ucontext_t uc; 228 struct pcb *pcb; 229 struct proc *p; 230 struct trapframe *regs; 231 ucontext_t *ucp; 232 char *xfpustate; 233 size_t xfpustate_len; 234 long rflags; 235 int cs, error, ret; 236 ksiginfo_t ksi; 237 238 pcb = td->td_pcb; 239 p = td->td_proc; 240 241 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 242 if (error != 0) { 243 uprintf("pid %d (%s): sigreturn copyin failed\n", 244 p->p_pid, td->td_name); 245 return (error); 246 } 247 ucp = &uc; 248 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) { 249 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid, 250 td->td_name, ucp->uc_mcontext.mc_flags); 251 return (EINVAL); 252 } 253 regs = td->td_frame; 254 rflags = ucp->uc_mcontext.mc_rflags; 255 /* 256 * Don't allow users to change privileged or reserved flags. 257 */ 258 if (!EFL_SECURE(rflags, regs->tf_rflags)) { 259 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid, 260 td->td_name, rflags); 261 return (EINVAL); 262 } 263 264 /* 265 * Don't allow users to load a valid privileged %cs. Let the 266 * hardware check for invalid selectors, excess privilege in 267 * other selectors, invalid %eip's and invalid %esp's. 268 */ 269 cs = ucp->uc_mcontext.mc_cs; 270 if (!CS_SECURE(cs)) { 271 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid, 272 td->td_name, cs); 273 ksiginfo_init_trap(&ksi); 274 ksi.ksi_signo = SIGBUS; 275 ksi.ksi_code = BUS_OBJERR; 276 ksi.ksi_trapno = T_PROTFLT; 277 ksi.ksi_addr = (void *)regs->tf_rip; 278 trapsignal(td, &ksi); 279 return (EINVAL); 280 } 281 282 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) { 283 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len; 284 if (xfpustate_len > cpu_max_ext_state_size - 285 sizeof(struct savefpu)) { 286 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n", 287 p->p_pid, td->td_name, xfpustate_len); 288 return (EINVAL); 289 } 290 xfpustate = (char *)fpu_save_area_alloc(); 291 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate, 292 xfpustate, xfpustate_len); 293 if (error != 0) { 294 fpu_save_area_free((struct savefpu *)xfpustate); 295 uprintf( 296 "pid %d (%s): sigreturn copying xfpustate failed\n", 297 p->p_pid, td->td_name); 298 return (error); 299 } 300 } else { 301 xfpustate = NULL; 302 xfpustate_len = 0; 303 } 304 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len); 305 fpu_save_area_free((struct savefpu *)xfpustate); 306 if (ret != 0) { 307 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n", 308 p->p_pid, td->td_name, ret); 309 return (ret); 310 } 311 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 312 update_pcb_bases(pcb); 313 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase; 314 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase; 315 316 #if defined(COMPAT_43) 317 if (ucp->uc_mcontext.mc_onstack & 1) 318 td->td_sigstk.ss_flags |= SS_ONSTACK; 319 else 320 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 321 #endif 322 323 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 324 return (EJUSTRETURN); 325 } 326 327 #ifdef COMPAT_FREEBSD4 328 int 329 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 330 { 331 332 return sys_sigreturn(td, (struct sigreturn_args *)uap); 333 } 334 #endif 335 336 /* 337 * Reset the hardware debug registers if they were in use. 338 * They won't have any meaning for the newly exec'd process. 339 */ 340 void 341 x86_clear_dbregs(struct pcb *pcb) 342 { 343 if ((pcb->pcb_flags & PCB_DBREGS) == 0) 344 return; 345 346 pcb->pcb_dr0 = 0; 347 pcb->pcb_dr1 = 0; 348 pcb->pcb_dr2 = 0; 349 pcb->pcb_dr3 = 0; 350 pcb->pcb_dr6 = 0; 351 pcb->pcb_dr7 = 0; 352 353 if (pcb == curpcb) { 354 /* 355 * Clear the debug registers on the running CPU, 356 * otherwise they will end up affecting the next 357 * process we switch to. 358 */ 359 reset_dbregs(); 360 } 361 clear_pcb_flags(pcb, PCB_DBREGS); 362 } 363 364 /* 365 * Reset registers to default values on exec. 366 */ 367 void 368 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) 369 { 370 struct trapframe *regs; 371 struct pcb *pcb; 372 register_t saved_rflags; 373 374 regs = td->td_frame; 375 pcb = td->td_pcb; 376 377 if (td->td_proc->p_md.md_ldt != NULL) 378 user_ldt_free(td); 379 380 update_pcb_bases(pcb); 381 pcb->pcb_fsbase = 0; 382 pcb->pcb_gsbase = 0; 383 clear_pcb_flags(pcb, PCB_32BIT); 384 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 385 386 saved_rflags = regs->tf_rflags & PSL_T; 387 bzero((char *)regs, sizeof(struct trapframe)); 388 regs->tf_rip = imgp->entry_addr; 389 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 390 regs->tf_rdi = stack; /* argv */ 391 regs->tf_rflags = PSL_USER | saved_rflags; 392 regs->tf_ss = _udatasel; 393 regs->tf_cs = _ucodesel; 394 regs->tf_ds = _udatasel; 395 regs->tf_es = _udatasel; 396 regs->tf_fs = _ufssel; 397 regs->tf_gs = _ugssel; 398 regs->tf_flags = TF_HASSEGS; 399 400 x86_clear_dbregs(pcb); 401 402 /* 403 * Drop the FP state if we hold it, so that the process gets a 404 * clean FP state if it uses the FPU again. 405 */ 406 fpstate_drop(td); 407 } 408 409 int 410 fill_regs(struct thread *td, struct reg *regs) 411 { 412 struct trapframe *tp; 413 414 tp = td->td_frame; 415 return (fill_frame_regs(tp, regs)); 416 } 417 418 int 419 fill_frame_regs(struct trapframe *tp, struct reg *regs) 420 { 421 422 regs->r_r15 = tp->tf_r15; 423 regs->r_r14 = tp->tf_r14; 424 regs->r_r13 = tp->tf_r13; 425 regs->r_r12 = tp->tf_r12; 426 regs->r_r11 = tp->tf_r11; 427 regs->r_r10 = tp->tf_r10; 428 regs->r_r9 = tp->tf_r9; 429 regs->r_r8 = tp->tf_r8; 430 regs->r_rdi = tp->tf_rdi; 431 regs->r_rsi = tp->tf_rsi; 432 regs->r_rbp = tp->tf_rbp; 433 regs->r_rbx = tp->tf_rbx; 434 regs->r_rdx = tp->tf_rdx; 435 regs->r_rcx = tp->tf_rcx; 436 regs->r_rax = tp->tf_rax; 437 regs->r_rip = tp->tf_rip; 438 regs->r_cs = tp->tf_cs; 439 regs->r_rflags = tp->tf_rflags; 440 regs->r_rsp = tp->tf_rsp; 441 regs->r_ss = tp->tf_ss; 442 if (tp->tf_flags & TF_HASSEGS) { 443 regs->r_ds = tp->tf_ds; 444 regs->r_es = tp->tf_es; 445 regs->r_fs = tp->tf_fs; 446 regs->r_gs = tp->tf_gs; 447 } else { 448 regs->r_ds = 0; 449 regs->r_es = 0; 450 regs->r_fs = 0; 451 regs->r_gs = 0; 452 } 453 regs->r_err = 0; 454 regs->r_trapno = 0; 455 return (0); 456 } 457 458 int 459 set_regs(struct thread *td, struct reg *regs) 460 { 461 struct trapframe *tp; 462 register_t rflags; 463 464 tp = td->td_frame; 465 rflags = regs->r_rflags & 0xffffffff; 466 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 467 return (EINVAL); 468 tp->tf_r15 = regs->r_r15; 469 tp->tf_r14 = regs->r_r14; 470 tp->tf_r13 = regs->r_r13; 471 tp->tf_r12 = regs->r_r12; 472 tp->tf_r11 = regs->r_r11; 473 tp->tf_r10 = regs->r_r10; 474 tp->tf_r9 = regs->r_r9; 475 tp->tf_r8 = regs->r_r8; 476 tp->tf_rdi = regs->r_rdi; 477 tp->tf_rsi = regs->r_rsi; 478 tp->tf_rbp = regs->r_rbp; 479 tp->tf_rbx = regs->r_rbx; 480 tp->tf_rdx = regs->r_rdx; 481 tp->tf_rcx = regs->r_rcx; 482 tp->tf_rax = regs->r_rax; 483 tp->tf_rip = regs->r_rip; 484 tp->tf_cs = regs->r_cs; 485 tp->tf_rflags = rflags; 486 tp->tf_rsp = regs->r_rsp; 487 tp->tf_ss = regs->r_ss; 488 if (0) { /* XXXKIB */ 489 tp->tf_ds = regs->r_ds; 490 tp->tf_es = regs->r_es; 491 tp->tf_fs = regs->r_fs; 492 tp->tf_gs = regs->r_gs; 493 tp->tf_flags = TF_HASSEGS; 494 } 495 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 496 return (0); 497 } 498 499 /* XXX check all this stuff! */ 500 /* externalize from sv_xmm */ 501 static void 502 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 503 { 504 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 505 struct envxmm *penv_xmm = &sv_xmm->sv_env; 506 int i; 507 508 /* pcb -> fpregs */ 509 bzero(fpregs, sizeof(*fpregs)); 510 511 /* FPU control/status */ 512 penv_fpreg->en_cw = penv_xmm->en_cw; 513 penv_fpreg->en_sw = penv_xmm->en_sw; 514 penv_fpreg->en_tw = penv_xmm->en_tw; 515 penv_fpreg->en_opcode = penv_xmm->en_opcode; 516 penv_fpreg->en_rip = penv_xmm->en_rip; 517 penv_fpreg->en_rdp = penv_xmm->en_rdp; 518 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 519 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 520 521 /* FPU registers */ 522 for (i = 0; i < 8; ++i) 523 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 524 525 /* SSE registers */ 526 for (i = 0; i < 16; ++i) 527 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 528 } 529 530 /* internalize from fpregs into sv_xmm */ 531 static void 532 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 533 { 534 struct envxmm *penv_xmm = &sv_xmm->sv_env; 535 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 536 int i; 537 538 /* fpregs -> pcb */ 539 /* FPU control/status */ 540 penv_xmm->en_cw = penv_fpreg->en_cw; 541 penv_xmm->en_sw = penv_fpreg->en_sw; 542 penv_xmm->en_tw = penv_fpreg->en_tw; 543 penv_xmm->en_opcode = penv_fpreg->en_opcode; 544 penv_xmm->en_rip = penv_fpreg->en_rip; 545 penv_xmm->en_rdp = penv_fpreg->en_rdp; 546 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 547 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 548 549 /* FPU registers */ 550 for (i = 0; i < 8; ++i) 551 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 552 553 /* SSE registers */ 554 for (i = 0; i < 16; ++i) 555 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 556 } 557 558 /* externalize from td->pcb */ 559 int 560 fill_fpregs(struct thread *td, struct fpreg *fpregs) 561 { 562 563 KASSERT(td == curthread || TD_IS_SUSPENDED(td) || 564 P_SHOULDSTOP(td->td_proc), 565 ("not suspended thread %p", td)); 566 fpugetregs(td); 567 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs); 568 return (0); 569 } 570 571 /* internalize to td->pcb */ 572 int 573 set_fpregs(struct thread *td, struct fpreg *fpregs) 574 { 575 576 critical_enter(); 577 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td)); 578 fpuuserinited(td); 579 critical_exit(); 580 return (0); 581 } 582 583 /* 584 * Get machine context. 585 */ 586 int 587 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 588 { 589 struct pcb *pcb; 590 struct trapframe *tp; 591 592 pcb = td->td_pcb; 593 tp = td->td_frame; 594 PROC_LOCK(curthread->td_proc); 595 mcp->mc_onstack = sigonstack(tp->tf_rsp); 596 PROC_UNLOCK(curthread->td_proc); 597 mcp->mc_r15 = tp->tf_r15; 598 mcp->mc_r14 = tp->tf_r14; 599 mcp->mc_r13 = tp->tf_r13; 600 mcp->mc_r12 = tp->tf_r12; 601 mcp->mc_r11 = tp->tf_r11; 602 mcp->mc_r10 = tp->tf_r10; 603 mcp->mc_r9 = tp->tf_r9; 604 mcp->mc_r8 = tp->tf_r8; 605 mcp->mc_rdi = tp->tf_rdi; 606 mcp->mc_rsi = tp->tf_rsi; 607 mcp->mc_rbp = tp->tf_rbp; 608 mcp->mc_rbx = tp->tf_rbx; 609 mcp->mc_rcx = tp->tf_rcx; 610 mcp->mc_rflags = tp->tf_rflags; 611 if (flags & GET_MC_CLEAR_RET) { 612 mcp->mc_rax = 0; 613 mcp->mc_rdx = 0; 614 mcp->mc_rflags &= ~PSL_C; 615 } else { 616 mcp->mc_rax = tp->tf_rax; 617 mcp->mc_rdx = tp->tf_rdx; 618 } 619 mcp->mc_rip = tp->tf_rip; 620 mcp->mc_cs = tp->tf_cs; 621 mcp->mc_rsp = tp->tf_rsp; 622 mcp->mc_ss = tp->tf_ss; 623 mcp->mc_ds = tp->tf_ds; 624 mcp->mc_es = tp->tf_es; 625 mcp->mc_fs = tp->tf_fs; 626 mcp->mc_gs = tp->tf_gs; 627 mcp->mc_flags = tp->tf_flags; 628 mcp->mc_len = sizeof(*mcp); 629 get_fpcontext(td, mcp, NULL, NULL); 630 update_pcb_bases(pcb); 631 mcp->mc_fsbase = pcb->pcb_fsbase; 632 mcp->mc_gsbase = pcb->pcb_gsbase; 633 mcp->mc_xfpustate = 0; 634 mcp->mc_xfpustate_len = 0; 635 bzero(mcp->mc_spare, sizeof(mcp->mc_spare)); 636 return (0); 637 } 638 639 /* 640 * Set machine context. 641 * 642 * However, we don't set any but the user modifiable flags, and we won't 643 * touch the cs selector. 644 */ 645 int 646 set_mcontext(struct thread *td, mcontext_t *mcp) 647 { 648 struct pcb *pcb; 649 struct trapframe *tp; 650 char *xfpustate; 651 long rflags; 652 int ret; 653 654 pcb = td->td_pcb; 655 tp = td->td_frame; 656 if (mcp->mc_len != sizeof(*mcp) || 657 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0) 658 return (EINVAL); 659 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 660 (tp->tf_rflags & ~PSL_USERCHANGE); 661 if (mcp->mc_flags & _MC_HASFPXSTATE) { 662 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size - 663 sizeof(struct savefpu)) 664 return (EINVAL); 665 xfpustate = (char *)fpu_save_area_alloc(); 666 ret = copyin((void *)mcp->mc_xfpustate, xfpustate, 667 mcp->mc_xfpustate_len); 668 if (ret != 0) { 669 fpu_save_area_free((struct savefpu *)xfpustate); 670 return (ret); 671 } 672 } else 673 xfpustate = NULL; 674 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len); 675 fpu_save_area_free((struct savefpu *)xfpustate); 676 if (ret != 0) 677 return (ret); 678 tp->tf_r15 = mcp->mc_r15; 679 tp->tf_r14 = mcp->mc_r14; 680 tp->tf_r13 = mcp->mc_r13; 681 tp->tf_r12 = mcp->mc_r12; 682 tp->tf_r11 = mcp->mc_r11; 683 tp->tf_r10 = mcp->mc_r10; 684 tp->tf_r9 = mcp->mc_r9; 685 tp->tf_r8 = mcp->mc_r8; 686 tp->tf_rdi = mcp->mc_rdi; 687 tp->tf_rsi = mcp->mc_rsi; 688 tp->tf_rbp = mcp->mc_rbp; 689 tp->tf_rbx = mcp->mc_rbx; 690 tp->tf_rdx = mcp->mc_rdx; 691 tp->tf_rcx = mcp->mc_rcx; 692 tp->tf_rax = mcp->mc_rax; 693 tp->tf_rip = mcp->mc_rip; 694 tp->tf_rflags = rflags; 695 tp->tf_rsp = mcp->mc_rsp; 696 tp->tf_ss = mcp->mc_ss; 697 tp->tf_flags = mcp->mc_flags; 698 if (tp->tf_flags & TF_HASSEGS) { 699 tp->tf_ds = mcp->mc_ds; 700 tp->tf_es = mcp->mc_es; 701 tp->tf_fs = mcp->mc_fs; 702 tp->tf_gs = mcp->mc_gs; 703 } 704 set_pcb_flags(pcb, PCB_FULL_IRET); 705 if (mcp->mc_flags & _MC_HASBASES) { 706 pcb->pcb_fsbase = mcp->mc_fsbase; 707 pcb->pcb_gsbase = mcp->mc_gsbase; 708 } 709 return (0); 710 } 711 712 void 713 get_fpcontext(struct thread *td, mcontext_t *mcp, char **xfpusave, 714 size_t *xfpusave_len) 715 { 716 mcp->mc_ownedfp = fpugetregs(td); 717 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0], 718 sizeof(mcp->mc_fpstate)); 719 mcp->mc_fpformat = fpuformat(); 720 if (xfpusave == NULL) 721 return; 722 if (!use_xsave || cpu_max_ext_state_size <= sizeof(struct savefpu)) { 723 *xfpusave_len = 0; 724 *xfpusave = NULL; 725 } else { 726 mcp->mc_flags |= _MC_HASFPXSTATE; 727 *xfpusave_len = mcp->mc_xfpustate_len = 728 cpu_max_ext_state_size - sizeof(struct savefpu); 729 *xfpusave = (char *)(get_pcb_user_save_td(td) + 1); 730 } 731 } 732 733 int 734 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate, 735 size_t xfpustate_len) 736 { 737 int error; 738 739 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 740 return (0); 741 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 742 return (EINVAL); 743 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) { 744 /* We don't care what state is left in the FPU or PCB. */ 745 fpstate_drop(td); 746 error = 0; 747 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 748 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 749 error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate, 750 xfpustate, xfpustate_len); 751 } else 752 return (EINVAL); 753 return (error); 754 } 755 756 void 757 fpstate_drop(struct thread *td) 758 { 759 760 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu")); 761 critical_enter(); 762 if (PCPU_GET(fpcurthread) == td) 763 fpudrop(); 764 /* 765 * XXX force a full drop of the fpu. The above only drops it if we 766 * owned it. 767 * 768 * XXX I don't much like fpugetuserregs()'s semantics of doing a full 769 * drop. Dropping only to the pcb matches fnsave's behaviour. 770 * We only need to drop to !PCB_INITDONE in sendsig(). But 771 * sendsig() is the only caller of fpugetuserregs()... perhaps we just 772 * have too many layers. 773 */ 774 clear_pcb_flags(curthread->td_pcb, 775 PCB_FPUINITDONE | PCB_USERFPUINITDONE); 776 critical_exit(); 777 } 778 779 int 780 fill_dbregs(struct thread *td, struct dbreg *dbregs) 781 { 782 struct pcb *pcb; 783 784 if (td == NULL) { 785 dbregs->dr[0] = rdr0(); 786 dbregs->dr[1] = rdr1(); 787 dbregs->dr[2] = rdr2(); 788 dbregs->dr[3] = rdr3(); 789 dbregs->dr[6] = rdr6(); 790 dbregs->dr[7] = rdr7(); 791 } else { 792 pcb = td->td_pcb; 793 dbregs->dr[0] = pcb->pcb_dr0; 794 dbregs->dr[1] = pcb->pcb_dr1; 795 dbregs->dr[2] = pcb->pcb_dr2; 796 dbregs->dr[3] = pcb->pcb_dr3; 797 dbregs->dr[6] = pcb->pcb_dr6; 798 dbregs->dr[7] = pcb->pcb_dr7; 799 } 800 dbregs->dr[4] = 0; 801 dbregs->dr[5] = 0; 802 dbregs->dr[8] = 0; 803 dbregs->dr[9] = 0; 804 dbregs->dr[10] = 0; 805 dbregs->dr[11] = 0; 806 dbregs->dr[12] = 0; 807 dbregs->dr[13] = 0; 808 dbregs->dr[14] = 0; 809 dbregs->dr[15] = 0; 810 return (0); 811 } 812 813 int 814 set_dbregs(struct thread *td, struct dbreg *dbregs) 815 { 816 struct pcb *pcb; 817 int i; 818 819 if (td == NULL) { 820 load_dr0(dbregs->dr[0]); 821 load_dr1(dbregs->dr[1]); 822 load_dr2(dbregs->dr[2]); 823 load_dr3(dbregs->dr[3]); 824 load_dr6(dbregs->dr[6]); 825 load_dr7(dbregs->dr[7]); 826 } else { 827 /* 828 * Don't let an illegal value for dr7 get set. Specifically, 829 * check for undefined settings. Setting these bit patterns 830 * result in undefined behaviour and can lead to an unexpected 831 * TRCTRAP or a general protection fault right here. 832 * Upper bits of dr6 and dr7 must not be set 833 */ 834 for (i = 0; i < 4; i++) { 835 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 836 return (EINVAL); 837 if (td->td_frame->tf_cs == _ucode32sel && 838 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 839 return (EINVAL); 840 } 841 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 842 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 843 return (EINVAL); 844 845 pcb = td->td_pcb; 846 847 /* 848 * Don't let a process set a breakpoint that is not within the 849 * process's address space. If a process could do this, it 850 * could halt the system by setting a breakpoint in the kernel 851 * (if ddb was enabled). Thus, we need to check to make sure 852 * that no breakpoints are being enabled for addresses outside 853 * process's address space. 854 * 855 * XXX - what about when the watched area of the user's 856 * address space is written into from within the kernel 857 * ... wouldn't that still cause a breakpoint to be generated 858 * from within kernel mode? 859 */ 860 861 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 862 /* dr0 is enabled */ 863 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 864 return (EINVAL); 865 } 866 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 867 /* dr1 is enabled */ 868 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 869 return (EINVAL); 870 } 871 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 872 /* dr2 is enabled */ 873 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 874 return (EINVAL); 875 } 876 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 877 /* dr3 is enabled */ 878 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 879 return (EINVAL); 880 } 881 882 pcb->pcb_dr0 = dbregs->dr[0]; 883 pcb->pcb_dr1 = dbregs->dr[1]; 884 pcb->pcb_dr2 = dbregs->dr[2]; 885 pcb->pcb_dr3 = dbregs->dr[3]; 886 pcb->pcb_dr6 = dbregs->dr[6]; 887 pcb->pcb_dr7 = dbregs->dr[7]; 888 889 set_pcb_flags(pcb, PCB_DBREGS); 890 } 891 892 return (0); 893 } 894 895 void 896 reset_dbregs(void) 897 { 898 899 load_dr7(0); /* Turn off the control bits first */ 900 load_dr0(0); 901 load_dr1(0); 902 load_dr2(0); 903 load_dr3(0); 904 load_dr6(0); 905 } 906 907 /* 908 * Return > 0 if a hardware breakpoint has been hit, and the 909 * breakpoint was in user space. Return 0, otherwise. 910 */ 911 int 912 user_dbreg_trap(register_t dr6) 913 { 914 u_int64_t dr7; 915 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 916 int nbp; /* number of breakpoints that triggered */ 917 caddr_t addr[4]; /* breakpoint addresses */ 918 int i; 919 920 bp = dr6 & DBREG_DR6_BMASK; 921 if (bp == 0) { 922 /* 923 * None of the breakpoint bits are set meaning this 924 * trap was not caused by any of the debug registers 925 */ 926 return (0); 927 } 928 929 dr7 = rdr7(); 930 if ((dr7 & 0x000000ff) == 0) { 931 /* 932 * all GE and LE bits in the dr7 register are zero, 933 * thus the trap couldn't have been caused by the 934 * hardware debug registers 935 */ 936 return (0); 937 } 938 939 nbp = 0; 940 941 /* 942 * at least one of the breakpoints were hit, check to see 943 * which ones and if any of them are user space addresses 944 */ 945 946 if (bp & 0x01) { 947 addr[nbp++] = (caddr_t)rdr0(); 948 } 949 if (bp & 0x02) { 950 addr[nbp++] = (caddr_t)rdr1(); 951 } 952 if (bp & 0x04) { 953 addr[nbp++] = (caddr_t)rdr2(); 954 } 955 if (bp & 0x08) { 956 addr[nbp++] = (caddr_t)rdr3(); 957 } 958 959 for (i = 0; i < nbp; i++) { 960 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 961 /* 962 * addr[i] is in user space 963 */ 964 return (nbp); 965 } 966 } 967 968 /* 969 * None of the breakpoints are in user space. 970 */ 971 return (0); 972 } 973