1 //===- AggressiveInstCombine.cpp ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the aggressive expression pattern combiner classes.
10 // Currently, it handles expression patterns for:
11 //  * Truncate instruction
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "llvm/Transforms/AggressiveInstCombine/AggressiveInstCombine.h"
16 #include "AggressiveInstCombineInternal.h"
17 #include "llvm-c/Initialization.h"
18 #include "llvm-c/Transforms/AggressiveInstCombine.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/Analysis/AliasAnalysis.h"
21 #include "llvm/Analysis/AssumptionCache.h"
22 #include "llvm/Analysis/BasicAliasAnalysis.h"
23 #include "llvm/Analysis/GlobalsModRef.h"
24 #include "llvm/Analysis/TargetLibraryInfo.h"
25 #include "llvm/Analysis/TargetTransformInfo.h"
26 #include "llvm/Analysis/ValueTracking.h"
27 #include "llvm/IR/Dominators.h"
28 #include "llvm/IR/Function.h"
29 #include "llvm/IR/IRBuilder.h"
30 #include "llvm/IR/LegacyPassManager.h"
31 #include "llvm/IR/PatternMatch.h"
32 #include "llvm/InitializePasses.h"
33 #include "llvm/Pass.h"
34 #include "llvm/Transforms/Utils/Local.h"
35 
36 using namespace llvm;
37 using namespace PatternMatch;
38 
39 namespace llvm {
40 class DataLayout;
41 }
42 
43 #define DEBUG_TYPE "aggressive-instcombine"
44 
45 STATISTIC(NumAnyOrAllBitsSet, "Number of any/all-bits-set patterns folded");
46 STATISTIC(NumGuardedRotates,
47           "Number of guarded rotates transformed into funnel shifts");
48 STATISTIC(NumGuardedFunnelShifts,
49           "Number of guarded funnel shifts transformed into funnel shifts");
50 STATISTIC(NumPopCountRecognized, "Number of popcount idioms recognized");
51 
52 namespace {
53 /// Contains expression pattern combiner logic.
54 /// This class provides both the logic to combine expression patterns and
55 /// combine them. It differs from InstCombiner class in that each pattern
56 /// combiner runs only once as opposed to InstCombine's multi-iteration,
57 /// which allows pattern combiner to have higher complexity than the O(1)
58 /// required by the instruction combiner.
59 class AggressiveInstCombinerLegacyPass : public FunctionPass {
60 public:
61   static char ID; // Pass identification, replacement for typeid
62 
63   AggressiveInstCombinerLegacyPass() : FunctionPass(ID) {
64     initializeAggressiveInstCombinerLegacyPassPass(
65         *PassRegistry::getPassRegistry());
66   }
67 
68   void getAnalysisUsage(AnalysisUsage &AU) const override;
69 
70   /// Run all expression pattern optimizations on the given /p F function.
71   ///
72   /// \param F function to optimize.
73   /// \returns true if the IR is changed.
74   bool runOnFunction(Function &F) override;
75 };
76 } // namespace
77 
78 /// Match a pattern for a bitwise funnel/rotate operation that partially guards
79 /// against undefined behavior by branching around the funnel-shift/rotation
80 /// when the shift amount is 0.
81 static bool foldGuardedFunnelShift(Instruction &I, const DominatorTree &DT) {
82   if (I.getOpcode() != Instruction::PHI || I.getNumOperands() != 2)
83     return false;
84 
85   // As with the one-use checks below, this is not strictly necessary, but we
86   // are being cautious to avoid potential perf regressions on targets that
87   // do not actually have a funnel/rotate instruction (where the funnel shift
88   // would be expanded back into math/shift/logic ops).
89   if (!isPowerOf2_32(I.getType()->getScalarSizeInBits()))
90     return false;
91 
92   // Match V to funnel shift left/right and capture the source operands and
93   // shift amount.
94   auto matchFunnelShift = [](Value *V, Value *&ShVal0, Value *&ShVal1,
95                              Value *&ShAmt) {
96     Value *SubAmt;
97     unsigned Width = V->getType()->getScalarSizeInBits();
98 
99     // fshl(ShVal0, ShVal1, ShAmt)
100     //  == (ShVal0 << ShAmt) | (ShVal1 >> (Width -ShAmt))
101     if (match(V, m_OneUse(m_c_Or(
102                      m_Shl(m_Value(ShVal0), m_Value(ShAmt)),
103                      m_LShr(m_Value(ShVal1),
104                             m_Sub(m_SpecificInt(Width), m_Value(SubAmt))))))) {
105       if (ShAmt == SubAmt) // TODO: Use m_Specific
106         return Intrinsic::fshl;
107     }
108 
109     // fshr(ShVal0, ShVal1, ShAmt)
110     //  == (ShVal0 >> ShAmt) | (ShVal1 << (Width - ShAmt))
111     if (match(V,
112               m_OneUse(m_c_Or(m_Shl(m_Value(ShVal0), m_Sub(m_SpecificInt(Width),
113                                                            m_Value(SubAmt))),
114                               m_LShr(m_Value(ShVal1), m_Value(ShAmt)))))) {
115       if (ShAmt == SubAmt) // TODO: Use m_Specific
116         return Intrinsic::fshr;
117     }
118 
119     return Intrinsic::not_intrinsic;
120   };
121 
122   // One phi operand must be a funnel/rotate operation, and the other phi
123   // operand must be the source value of that funnel/rotate operation:
124   // phi [ rotate(RotSrc, ShAmt), FunnelBB ], [ RotSrc, GuardBB ]
125   // phi [ fshl(ShVal0, ShVal1, ShAmt), FunnelBB ], [ ShVal0, GuardBB ]
126   // phi [ fshr(ShVal0, ShVal1, ShAmt), FunnelBB ], [ ShVal1, GuardBB ]
127   PHINode &Phi = cast<PHINode>(I);
128   unsigned FunnelOp = 0, GuardOp = 1;
129   Value *P0 = Phi.getOperand(0), *P1 = Phi.getOperand(1);
130   Value *ShVal0, *ShVal1, *ShAmt;
131   Intrinsic::ID IID = matchFunnelShift(P0, ShVal0, ShVal1, ShAmt);
132   if (IID == Intrinsic::not_intrinsic ||
133       (IID == Intrinsic::fshl && ShVal0 != P1) ||
134       (IID == Intrinsic::fshr && ShVal1 != P1)) {
135     IID = matchFunnelShift(P1, ShVal0, ShVal1, ShAmt);
136     if (IID == Intrinsic::not_intrinsic ||
137         (IID == Intrinsic::fshl && ShVal0 != P0) ||
138         (IID == Intrinsic::fshr && ShVal1 != P0))
139       return false;
140     assert((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
141            "Pattern must match funnel shift left or right");
142     std::swap(FunnelOp, GuardOp);
143   }
144 
145   // The incoming block with our source operand must be the "guard" block.
146   // That must contain a cmp+branch to avoid the funnel/rotate when the shift
147   // amount is equal to 0. The other incoming block is the block with the
148   // funnel/rotate.
149   BasicBlock *GuardBB = Phi.getIncomingBlock(GuardOp);
150   BasicBlock *FunnelBB = Phi.getIncomingBlock(FunnelOp);
151   Instruction *TermI = GuardBB->getTerminator();
152 
153   // Ensure that the shift values dominate each block.
154   if (!DT.dominates(ShVal0, TermI) || !DT.dominates(ShVal1, TermI))
155     return false;
156 
157   ICmpInst::Predicate Pred;
158   BasicBlock *PhiBB = Phi.getParent();
159   if (!match(TermI, m_Br(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()),
160                          m_SpecificBB(PhiBB), m_SpecificBB(FunnelBB))))
161     return false;
162 
163   if (Pred != CmpInst::ICMP_EQ)
164     return false;
165 
166   IRBuilder<> Builder(PhiBB, PhiBB->getFirstInsertionPt());
167 
168   if (ShVal0 == ShVal1)
169     ++NumGuardedRotates;
170   else
171     ++NumGuardedFunnelShifts;
172 
173   // If this is not a rotate then the select was blocking poison from the
174   // 'shift-by-zero' non-TVal, but a funnel shift won't - so freeze it.
175   bool IsFshl = IID == Intrinsic::fshl;
176   if (ShVal0 != ShVal1) {
177     if (IsFshl && !llvm::isGuaranteedNotToBePoison(ShVal1))
178       ShVal1 = Builder.CreateFreeze(ShVal1);
179     else if (!IsFshl && !llvm::isGuaranteedNotToBePoison(ShVal0))
180       ShVal0 = Builder.CreateFreeze(ShVal0);
181   }
182 
183   // We matched a variation of this IR pattern:
184   // GuardBB:
185   //   %cmp = icmp eq i32 %ShAmt, 0
186   //   br i1 %cmp, label %PhiBB, label %FunnelBB
187   // FunnelBB:
188   //   %sub = sub i32 32, %ShAmt
189   //   %shr = lshr i32 %ShVal1, %sub
190   //   %shl = shl i32 %ShVal0, %ShAmt
191   //   %fsh = or i32 %shr, %shl
192   //   br label %PhiBB
193   // PhiBB:
194   //   %cond = phi i32 [ %fsh, %FunnelBB ], [ %ShVal0, %GuardBB ]
195   // -->
196   // llvm.fshl.i32(i32 %ShVal0, i32 %ShVal1, i32 %ShAmt)
197   Function *F = Intrinsic::getDeclaration(Phi.getModule(), IID, Phi.getType());
198   Phi.replaceAllUsesWith(Builder.CreateCall(F, {ShVal0, ShVal1, ShAmt}));
199   return true;
200 }
201 
202 /// This is used by foldAnyOrAllBitsSet() to capture a source value (Root) and
203 /// the bit indexes (Mask) needed by a masked compare. If we're matching a chain
204 /// of 'and' ops, then we also need to capture the fact that we saw an
205 /// "and X, 1", so that's an extra return value for that case.
206 struct MaskOps {
207   Value *Root = nullptr;
208   APInt Mask;
209   bool MatchAndChain;
210   bool FoundAnd1 = false;
211 
212   MaskOps(unsigned BitWidth, bool MatchAnds)
213       : Mask(APInt::getZero(BitWidth)), MatchAndChain(MatchAnds) {}
214 };
215 
216 /// This is a recursive helper for foldAnyOrAllBitsSet() that walks through a
217 /// chain of 'and' or 'or' instructions looking for shift ops of a common source
218 /// value. Examples:
219 ///   or (or (or X, (X >> 3)), (X >> 5)), (X >> 8)
220 /// returns { X, 0x129 }
221 ///   and (and (X >> 1), 1), (X >> 4)
222 /// returns { X, 0x12 }
223 static bool matchAndOrChain(Value *V, MaskOps &MOps) {
224   Value *Op0, *Op1;
225   if (MOps.MatchAndChain) {
226     // Recurse through a chain of 'and' operands. This requires an extra check
227     // vs. the 'or' matcher: we must find an "and X, 1" instruction somewhere
228     // in the chain to know that all of the high bits are cleared.
229     if (match(V, m_And(m_Value(Op0), m_One()))) {
230       MOps.FoundAnd1 = true;
231       return matchAndOrChain(Op0, MOps);
232     }
233     if (match(V, m_And(m_Value(Op0), m_Value(Op1))))
234       return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps);
235   } else {
236     // Recurse through a chain of 'or' operands.
237     if (match(V, m_Or(m_Value(Op0), m_Value(Op1))))
238       return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps);
239   }
240 
241   // We need a shift-right or a bare value representing a compare of bit 0 of
242   // the original source operand.
243   Value *Candidate;
244   const APInt *BitIndex = nullptr;
245   if (!match(V, m_LShr(m_Value(Candidate), m_APInt(BitIndex))))
246     Candidate = V;
247 
248   // Initialize result source operand.
249   if (!MOps.Root)
250     MOps.Root = Candidate;
251 
252   // The shift constant is out-of-range? This code hasn't been simplified.
253   if (BitIndex && BitIndex->uge(MOps.Mask.getBitWidth()))
254     return false;
255 
256   // Fill in the mask bit derived from the shift constant.
257   MOps.Mask.setBit(BitIndex ? BitIndex->getZExtValue() : 0);
258   return MOps.Root == Candidate;
259 }
260 
261 /// Match patterns that correspond to "any-bits-set" and "all-bits-set".
262 /// These will include a chain of 'or' or 'and'-shifted bits from a
263 /// common source value:
264 /// and (or  (lshr X, C), ...), 1 --> (X & CMask) != 0
265 /// and (and (lshr X, C), ...), 1 --> (X & CMask) == CMask
266 /// Note: "any-bits-clear" and "all-bits-clear" are variations of these patterns
267 /// that differ only with a final 'not' of the result. We expect that final
268 /// 'not' to be folded with the compare that we create here (invert predicate).
269 static bool foldAnyOrAllBitsSet(Instruction &I) {
270   // The 'any-bits-set' ('or' chain) pattern is simpler to match because the
271   // final "and X, 1" instruction must be the final op in the sequence.
272   bool MatchAllBitsSet;
273   if (match(&I, m_c_And(m_OneUse(m_And(m_Value(), m_Value())), m_Value())))
274     MatchAllBitsSet = true;
275   else if (match(&I, m_And(m_OneUse(m_Or(m_Value(), m_Value())), m_One())))
276     MatchAllBitsSet = false;
277   else
278     return false;
279 
280   MaskOps MOps(I.getType()->getScalarSizeInBits(), MatchAllBitsSet);
281   if (MatchAllBitsSet) {
282     if (!matchAndOrChain(cast<BinaryOperator>(&I), MOps) || !MOps.FoundAnd1)
283       return false;
284   } else {
285     if (!matchAndOrChain(cast<BinaryOperator>(&I)->getOperand(0), MOps))
286       return false;
287   }
288 
289   // The pattern was found. Create a masked compare that replaces all of the
290   // shift and logic ops.
291   IRBuilder<> Builder(&I);
292   Constant *Mask = ConstantInt::get(I.getType(), MOps.Mask);
293   Value *And = Builder.CreateAnd(MOps.Root, Mask);
294   Value *Cmp = MatchAllBitsSet ? Builder.CreateICmpEQ(And, Mask)
295                                : Builder.CreateIsNotNull(And);
296   Value *Zext = Builder.CreateZExt(Cmp, I.getType());
297   I.replaceAllUsesWith(Zext);
298   ++NumAnyOrAllBitsSet;
299   return true;
300 }
301 
302 // Try to recognize below function as popcount intrinsic.
303 // This is the "best" algorithm from
304 // http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel
305 // Also used in TargetLowering::expandCTPOP().
306 //
307 // int popcount(unsigned int i) {
308 //   i = i - ((i >> 1) & 0x55555555);
309 //   i = (i & 0x33333333) + ((i >> 2) & 0x33333333);
310 //   i = ((i + (i >> 4)) & 0x0F0F0F0F);
311 //   return (i * 0x01010101) >> 24;
312 // }
313 static bool tryToRecognizePopCount(Instruction &I) {
314   if (I.getOpcode() != Instruction::LShr)
315     return false;
316 
317   Type *Ty = I.getType();
318   if (!Ty->isIntOrIntVectorTy())
319     return false;
320 
321   unsigned Len = Ty->getScalarSizeInBits();
322   // FIXME: fix Len == 8 and other irregular type lengths.
323   if (!(Len <= 128 && Len > 8 && Len % 8 == 0))
324     return false;
325 
326   APInt Mask55 = APInt::getSplat(Len, APInt(8, 0x55));
327   APInt Mask33 = APInt::getSplat(Len, APInt(8, 0x33));
328   APInt Mask0F = APInt::getSplat(Len, APInt(8, 0x0F));
329   APInt Mask01 = APInt::getSplat(Len, APInt(8, 0x01));
330   APInt MaskShift = APInt(Len, Len - 8);
331 
332   Value *Op0 = I.getOperand(0);
333   Value *Op1 = I.getOperand(1);
334   Value *MulOp0;
335   // Matching "(i * 0x01010101...) >> 24".
336   if ((match(Op0, m_Mul(m_Value(MulOp0), m_SpecificInt(Mask01)))) &&
337        match(Op1, m_SpecificInt(MaskShift))) {
338     Value *ShiftOp0;
339     // Matching "((i + (i >> 4)) & 0x0F0F0F0F...)".
340     if (match(MulOp0, m_And(m_c_Add(m_LShr(m_Value(ShiftOp0), m_SpecificInt(4)),
341                                     m_Deferred(ShiftOp0)),
342                             m_SpecificInt(Mask0F)))) {
343       Value *AndOp0;
344       // Matching "(i & 0x33333333...) + ((i >> 2) & 0x33333333...)".
345       if (match(ShiftOp0,
346                 m_c_Add(m_And(m_Value(AndOp0), m_SpecificInt(Mask33)),
347                         m_And(m_LShr(m_Deferred(AndOp0), m_SpecificInt(2)),
348                               m_SpecificInt(Mask33))))) {
349         Value *Root, *SubOp1;
350         // Matching "i - ((i >> 1) & 0x55555555...)".
351         if (match(AndOp0, m_Sub(m_Value(Root), m_Value(SubOp1))) &&
352             match(SubOp1, m_And(m_LShr(m_Specific(Root), m_SpecificInt(1)),
353                                 m_SpecificInt(Mask55)))) {
354           LLVM_DEBUG(dbgs() << "Recognized popcount intrinsic\n");
355           IRBuilder<> Builder(&I);
356           Function *Func = Intrinsic::getDeclaration(
357               I.getModule(), Intrinsic::ctpop, I.getType());
358           I.replaceAllUsesWith(Builder.CreateCall(Func, {Root}));
359           ++NumPopCountRecognized;
360           return true;
361         }
362       }
363     }
364   }
365 
366   return false;
367 }
368 
369 /// Fold smin(smax(fptosi(x), C1), C2) to llvm.fptosi.sat(x), providing C1 and
370 /// C2 saturate the value of the fp conversion. The transform is not reversable
371 /// as the fptosi.sat is more defined than the input - all values produce a
372 /// valid value for the fptosi.sat, where as some produce poison for original
373 /// that were out of range of the integer conversion. The reversed pattern may
374 /// use fmax and fmin instead. As we cannot directly reverse the transform, and
375 /// it is not always profitable, we make it conditional on the cost being
376 /// reported as lower by TTI.
377 static bool tryToFPToSat(Instruction &I, TargetTransformInfo &TTI) {
378   // Look for min(max(fptosi, converting to fptosi_sat.
379   Value *In;
380   const APInt *MinC, *MaxC;
381   if (!match(&I, m_SMax(m_OneUse(m_SMin(m_OneUse(m_FPToSI(m_Value(In))),
382                                         m_APInt(MinC))),
383                         m_APInt(MaxC))) &&
384       !match(&I, m_SMin(m_OneUse(m_SMax(m_OneUse(m_FPToSI(m_Value(In))),
385                                         m_APInt(MaxC))),
386                         m_APInt(MinC))))
387     return false;
388 
389   // Check that the constants clamp a saturate.
390   if (!(*MinC + 1).isPowerOf2() || -*MaxC != *MinC + 1)
391     return false;
392 
393   Type *IntTy = I.getType();
394   Type *FpTy = In->getType();
395   Type *SatTy =
396       IntegerType::get(IntTy->getContext(), (*MinC + 1).exactLogBase2() + 1);
397   if (auto *VecTy = dyn_cast<VectorType>(IntTy))
398     SatTy = VectorType::get(SatTy, VecTy->getElementCount());
399 
400   // Get the cost of the intrinsic, and check that against the cost of
401   // fptosi+smin+smax
402   InstructionCost SatCost = TTI.getIntrinsicInstrCost(
403       IntrinsicCostAttributes(Intrinsic::fptosi_sat, SatTy, {In}, {FpTy}),
404       TTI::TCK_RecipThroughput);
405   SatCost += TTI.getCastInstrCost(Instruction::SExt, SatTy, IntTy,
406                                   TTI::CastContextHint::None,
407                                   TTI::TCK_RecipThroughput);
408 
409   InstructionCost MinMaxCost = TTI.getCastInstrCost(
410       Instruction::FPToSI, IntTy, FpTy, TTI::CastContextHint::None,
411       TTI::TCK_RecipThroughput);
412   MinMaxCost += TTI.getIntrinsicInstrCost(
413       IntrinsicCostAttributes(Intrinsic::smin, IntTy, {IntTy}),
414       TTI::TCK_RecipThroughput);
415   MinMaxCost += TTI.getIntrinsicInstrCost(
416       IntrinsicCostAttributes(Intrinsic::smax, IntTy, {IntTy}),
417       TTI::TCK_RecipThroughput);
418 
419   if (SatCost >= MinMaxCost)
420     return false;
421 
422   IRBuilder<> Builder(&I);
423   Function *Fn = Intrinsic::getDeclaration(I.getModule(), Intrinsic::fptosi_sat,
424                                            {SatTy, FpTy});
425   Value *Sat = Builder.CreateCall(Fn, In);
426   I.replaceAllUsesWith(Builder.CreateSExt(Sat, IntTy));
427   return true;
428 }
429 
430 /// This is the entry point for folds that could be implemented in regular
431 /// InstCombine, but they are separated because they are not expected to
432 /// occur frequently and/or have more than a constant-length pattern match.
433 static bool foldUnusualPatterns(Function &F, DominatorTree &DT,
434                                 TargetTransformInfo &TTI) {
435   bool MadeChange = false;
436   for (BasicBlock &BB : F) {
437     // Ignore unreachable basic blocks.
438     if (!DT.isReachableFromEntry(&BB))
439       continue;
440     // Do not delete instructions under here and invalidate the iterator.
441     // Walk the block backwards for efficiency. We're matching a chain of
442     // use->defs, so we're more likely to succeed by starting from the bottom.
443     // Also, we want to avoid matching partial patterns.
444     // TODO: It would be more efficient if we removed dead instructions
445     // iteratively in this loop rather than waiting until the end.
446     for (Instruction &I : llvm::reverse(BB)) {
447       MadeChange |= foldAnyOrAllBitsSet(I);
448       MadeChange |= foldGuardedFunnelShift(I, DT);
449       MadeChange |= tryToRecognizePopCount(I);
450       MadeChange |= tryToFPToSat(I, TTI);
451     }
452   }
453 
454   // We're done with transforms, so remove dead instructions.
455   if (MadeChange)
456     for (BasicBlock &BB : F)
457       SimplifyInstructionsInBlock(&BB);
458 
459   return MadeChange;
460 }
461 
462 /// This is the entry point for all transforms. Pass manager differences are
463 /// handled in the callers of this function.
464 static bool runImpl(Function &F, AssumptionCache &AC, TargetTransformInfo &TTI,
465                     TargetLibraryInfo &TLI, DominatorTree &DT) {
466   bool MadeChange = false;
467   const DataLayout &DL = F.getParent()->getDataLayout();
468   TruncInstCombine TIC(AC, TLI, DL, DT);
469   MadeChange |= TIC.run(F);
470   MadeChange |= foldUnusualPatterns(F, DT, TTI);
471   return MadeChange;
472 }
473 
474 void AggressiveInstCombinerLegacyPass::getAnalysisUsage(
475     AnalysisUsage &AU) const {
476   AU.setPreservesCFG();
477   AU.addRequired<AssumptionCacheTracker>();
478   AU.addRequired<DominatorTreeWrapperPass>();
479   AU.addRequired<TargetLibraryInfoWrapperPass>();
480   AU.addRequired<TargetTransformInfoWrapperPass>();
481   AU.addPreserved<AAResultsWrapperPass>();
482   AU.addPreserved<BasicAAWrapperPass>();
483   AU.addPreserved<DominatorTreeWrapperPass>();
484   AU.addPreserved<GlobalsAAWrapperPass>();
485 }
486 
487 bool AggressiveInstCombinerLegacyPass::runOnFunction(Function &F) {
488   auto &AC = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
489   auto &TLI = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
490   auto &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
491   auto &TTI = getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
492   return runImpl(F, AC, TTI, TLI, DT);
493 }
494 
495 PreservedAnalyses AggressiveInstCombinePass::run(Function &F,
496                                                  FunctionAnalysisManager &AM) {
497   auto &AC = AM.getResult<AssumptionAnalysis>(F);
498   auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
499   auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
500   auto &TTI = AM.getResult<TargetIRAnalysis>(F);
501   if (!runImpl(F, AC, TTI, TLI, DT)) {
502     // No changes, all analyses are preserved.
503     return PreservedAnalyses::all();
504   }
505   // Mark all the analyses that instcombine updates as preserved.
506   PreservedAnalyses PA;
507   PA.preserveSet<CFGAnalyses>();
508   return PA;
509 }
510 
511 char AggressiveInstCombinerLegacyPass::ID = 0;
512 INITIALIZE_PASS_BEGIN(AggressiveInstCombinerLegacyPass,
513                       "aggressive-instcombine",
514                       "Combine pattern based expressions", false, false)
515 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
516 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
517 INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)
518 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
519 INITIALIZE_PASS_END(AggressiveInstCombinerLegacyPass, "aggressive-instcombine",
520                     "Combine pattern based expressions", false, false)
521 
522 // Initialization Routines
523 void llvm::initializeAggressiveInstCombine(PassRegistry &Registry) {
524   initializeAggressiveInstCombinerLegacyPassPass(Registry);
525 }
526 
527 void LLVMInitializeAggressiveInstCombiner(LLVMPassRegistryRef R) {
528   initializeAggressiveInstCombinerLegacyPassPass(*unwrap(R));
529 }
530 
531 FunctionPass *llvm::createAggressiveInstCombinerPass() {
532   return new AggressiveInstCombinerLegacyPass();
533 }
534 
535 void LLVMAddAggressiveInstCombinerPass(LLVMPassManagerRef PM) {
536   unwrap(PM)->add(createAggressiveInstCombinerPass());
537 }
538