1bdd1243dSDimitry Andric //===-- XtensaTargetMachine.h - Define TargetMachine for Xtensa -*- C++ -*-===// 2bdd1243dSDimitry Andric // 3bdd1243dSDimitry Andric // The LLVM Compiler Infrastructure 4bdd1243dSDimitry Andric // 5bdd1243dSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 6bdd1243dSDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 7bdd1243dSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 8bdd1243dSDimitry Andric // 9bdd1243dSDimitry Andric //===----------------------------------------------------------------------===// 10bdd1243dSDimitry Andric // 11bdd1243dSDimitry Andric // This file declares the Xtensa specific subclass of TargetMachine. 12bdd1243dSDimitry Andric // 13bdd1243dSDimitry Andric //===----------------------------------------------------------------------===// 14bdd1243dSDimitry Andric 15bdd1243dSDimitry Andric #ifndef LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H 16bdd1243dSDimitry Andric #define LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H 17bdd1243dSDimitry Andric 18*0fca6ea1SDimitry Andric #include "XtensaSubtarget.h" 19bdd1243dSDimitry Andric #include "llvm/Target/TargetMachine.h" 20bdd1243dSDimitry Andric #include <optional> 21bdd1243dSDimitry Andric 22bdd1243dSDimitry Andric namespace llvm { 23bdd1243dSDimitry Andric extern Target TheXtensaTarget; 24bdd1243dSDimitry Andric 25bdd1243dSDimitry Andric class XtensaTargetMachine : public LLVMTargetMachine { 26bdd1243dSDimitry Andric std::unique_ptr<TargetLoweringObjectFile> TLOF; 27bdd1243dSDimitry Andric public: 28bdd1243dSDimitry Andric XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 29bdd1243dSDimitry Andric StringRef FS, const TargetOptions &Options, 30bdd1243dSDimitry Andric std::optional<Reloc::Model> RM, 315f757f3fSDimitry Andric std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, 32bdd1243dSDimitry Andric bool JIT, bool isLittle); 33bdd1243dSDimitry Andric 34bdd1243dSDimitry Andric XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 35bdd1243dSDimitry Andric StringRef FS, const TargetOptions &Options, 36bdd1243dSDimitry Andric std::optional<Reloc::Model> RM, 375f757f3fSDimitry Andric std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, 38bdd1243dSDimitry Andric bool JIT); 39bdd1243dSDimitry Andric 40*0fca6ea1SDimitry Andric const XtensaSubtarget *getSubtargetImpl(const Function &F) const override; 41*0fca6ea1SDimitry Andric 42bdd1243dSDimitry Andric TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 43*0fca6ea1SDimitry Andric 44bdd1243dSDimitry Andric TargetLoweringObjectFile *getObjFileLowering() const override { 45bdd1243dSDimitry Andric return TLOF.get(); 46bdd1243dSDimitry Andric } 47*0fca6ea1SDimitry Andric 48*0fca6ea1SDimitry Andric protected: 49*0fca6ea1SDimitry Andric mutable StringMap<std::unique_ptr<XtensaSubtarget>> SubtargetMap; 50bdd1243dSDimitry Andric }; 51bdd1243dSDimitry Andric } // end namespace llvm 52bdd1243dSDimitry Andric 53bdd1243dSDimitry Andric #endif // LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H 54