1*bdd1243dSDimitry Andric //===- XtensaTargetMachine.cpp - Define TargetMachine for Xtensa ----------===// 2*bdd1243dSDimitry Andric // 3*bdd1243dSDimitry Andric // The LLVM Compiler Infrastructure 4*bdd1243dSDimitry Andric // 5*bdd1243dSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 6*bdd1243dSDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 7*bdd1243dSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 8*bdd1243dSDimitry Andric // 9*bdd1243dSDimitry Andric //===----------------------------------------------------------------------===// 10*bdd1243dSDimitry Andric // 11*bdd1243dSDimitry Andric // Implements the info about Xtensa target spec. 12*bdd1243dSDimitry Andric // 13*bdd1243dSDimitry Andric //===----------------------------------------------------------------------===// 14*bdd1243dSDimitry Andric 15*bdd1243dSDimitry Andric #include "XtensaTargetMachine.h" 16*bdd1243dSDimitry Andric #include "TargetInfo/XtensaTargetInfo.h" 17*bdd1243dSDimitry Andric #include "llvm/CodeGen/Passes.h" 18*bdd1243dSDimitry Andric #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 19*bdd1243dSDimitry Andric #include "llvm/CodeGen/TargetPassConfig.h" 20*bdd1243dSDimitry Andric #include "llvm/IR/LegacyPassManager.h" 21*bdd1243dSDimitry Andric #include "llvm/MC/TargetRegistry.h" 22*bdd1243dSDimitry Andric #include "llvm/Transforms/IPO/PassManagerBuilder.h" 23*bdd1243dSDimitry Andric #include "llvm/Transforms/Scalar.h" 24*bdd1243dSDimitry Andric #include <optional> 25*bdd1243dSDimitry Andric 26*bdd1243dSDimitry Andric using namespace llvm; 27*bdd1243dSDimitry Andric 28*bdd1243dSDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaTarget() { 29*bdd1243dSDimitry Andric // Register the target. 30*bdd1243dSDimitry Andric RegisterTargetMachine<XtensaTargetMachine> A(getTheXtensaTarget()); 31*bdd1243dSDimitry Andric } 32*bdd1243dSDimitry Andric 33*bdd1243dSDimitry Andric static std::string computeDataLayout(const Triple &TT, StringRef CPU, 34*bdd1243dSDimitry Andric const TargetOptions &Options, 35*bdd1243dSDimitry Andric bool IsLittle) { 36*bdd1243dSDimitry Andric std::string Ret = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32"; 37*bdd1243dSDimitry Andric return Ret; 38*bdd1243dSDimitry Andric } 39*bdd1243dSDimitry Andric 40*bdd1243dSDimitry Andric static Reloc::Model getEffectiveRelocModel(bool JIT, 41*bdd1243dSDimitry Andric std::optional<Reloc::Model> RM) { 42*bdd1243dSDimitry Andric if (!RM || JIT) 43*bdd1243dSDimitry Andric return Reloc::Static; 44*bdd1243dSDimitry Andric return *RM; 45*bdd1243dSDimitry Andric } 46*bdd1243dSDimitry Andric 47*bdd1243dSDimitry Andric XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, 48*bdd1243dSDimitry Andric StringRef CPU, StringRef FS, 49*bdd1243dSDimitry Andric const TargetOptions &Options, 50*bdd1243dSDimitry Andric std::optional<Reloc::Model> RM, 51*bdd1243dSDimitry Andric std::optional<CodeModel::Model> CM, 52*bdd1243dSDimitry Andric CodeGenOpt::Level OL, bool JIT, 53*bdd1243dSDimitry Andric bool IsLittle) 54*bdd1243dSDimitry Andric : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, IsLittle), TT, 55*bdd1243dSDimitry Andric CPU, FS, Options, getEffectiveRelocModel(JIT, RM), 56*bdd1243dSDimitry Andric getEffectiveCodeModel(CM, CodeModel::Small), OL), 57*bdd1243dSDimitry Andric TLOF(std::make_unique<TargetLoweringObjectFileELF>()) { 58*bdd1243dSDimitry Andric initAsmInfo(); 59*bdd1243dSDimitry Andric } 60*bdd1243dSDimitry Andric 61*bdd1243dSDimitry Andric XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, 62*bdd1243dSDimitry Andric StringRef CPU, StringRef FS, 63*bdd1243dSDimitry Andric const TargetOptions &Options, 64*bdd1243dSDimitry Andric std::optional<Reloc::Model> RM, 65*bdd1243dSDimitry Andric std::optional<CodeModel::Model> CM, 66*bdd1243dSDimitry Andric CodeGenOpt::Level OL, bool JIT) 67*bdd1243dSDimitry Andric : XtensaTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} 68*bdd1243dSDimitry Andric 69*bdd1243dSDimitry Andric TargetPassConfig *XtensaTargetMachine::createPassConfig(PassManagerBase &PM) { 70*bdd1243dSDimitry Andric return new TargetPassConfig(*this, PM); 71*bdd1243dSDimitry Andric } 72