1bdd1243dSDimitry Andric//===- Xtensa.td - Describe the Xtensa Target Machine ------*- tablegen -*-===// 2bdd1243dSDimitry Andric// 3bdd1243dSDimitry Andric// The LLVM Compiler Infrastructure 4bdd1243dSDimitry Andric// 5bdd1243dSDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 6bdd1243dSDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 7bdd1243dSDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 8bdd1243dSDimitry Andric// 9bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 10bdd1243dSDimitry Andric 11bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 12bdd1243dSDimitry Andric// Target-independent interfaces 13bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 14bdd1243dSDimitry Andric 15bdd1243dSDimitry Andricinclude "llvm/Target/Target.td" 16bdd1243dSDimitry Andric 17bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 18bdd1243dSDimitry Andric// Subtarget Features. 19bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 20bdd1243dSDimitry Andricdef FeatureDensity : SubtargetFeature<"density", "HasDensity", "true", 21bdd1243dSDimitry Andric "Enable Density instructions">; 22bdd1243dSDimitry Andricdef HasDensity : Predicate<"Subtarget->hasDensity()">, 23bdd1243dSDimitry Andric AssemblerPredicate<(all_of FeatureDensity)>; 24bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 25bdd1243dSDimitry Andric// Xtensa supported processors. 26bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 27bdd1243dSDimitry Andricclass Proc<string Name, list<SubtargetFeature> Features> 28bdd1243dSDimitry Andric : Processor<Name, NoItineraries, Features>; 29bdd1243dSDimitry Andric 30bdd1243dSDimitry Andricdef : Proc<"generic", []>; 31bdd1243dSDimitry Andric 32bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 33bdd1243dSDimitry Andric// Register File Description 34bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 35bdd1243dSDimitry Andric 36bdd1243dSDimitry Andricinclude "XtensaRegisterInfo.td" 37bdd1243dSDimitry Andric 38bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 39*0fca6ea1SDimitry Andric// Calling Convention Description 40*0fca6ea1SDimitry Andric//===----------------------------------------------------------------------===// 41*0fca6ea1SDimitry Andric 42*0fca6ea1SDimitry Andricinclude "XtensaCallingConv.td" 43*0fca6ea1SDimitry Andric 44*0fca6ea1SDimitry Andric//===----------------------------------------------------------------------===// 45bdd1243dSDimitry Andric// Instruction Descriptions 46bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 47bdd1243dSDimitry Andric 48bdd1243dSDimitry Andricinclude "XtensaInstrInfo.td" 49bdd1243dSDimitry Andric 50bdd1243dSDimitry Andricdef XtensaInstrInfo : InstrInfo; 51bdd1243dSDimitry Andric 52bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 53bdd1243dSDimitry Andric// Target Declaration 54bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 55bdd1243dSDimitry Andric 56bdd1243dSDimitry Andricdef XtensaAsmParser : AsmParser { 57bdd1243dSDimitry Andric let ShouldEmitMatchRegisterAltName = 1; 58bdd1243dSDimitry Andric} 59bdd1243dSDimitry Andric 60bdd1243dSDimitry Andricdef XtensaInstPrinter : AsmWriter { 61bdd1243dSDimitry Andric string AsmWriterClassName = "InstPrinter"; 62bdd1243dSDimitry Andric} 63bdd1243dSDimitry Andric 64bdd1243dSDimitry Andricdef Xtensa : Target { 65bdd1243dSDimitry Andric let InstructionSet = XtensaInstrInfo; 66bdd1243dSDimitry Andric let AssemblyWriters = [XtensaInstPrinter]; 67bdd1243dSDimitry Andric let AssemblyParsers = [XtensaAsmParser]; 68bdd1243dSDimitry Andric} 69bdd1243dSDimitry Andric 70