xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp (revision bdd1243df58e60e85101c09001d9812a789b6bc4)
1*bdd1243dSDimitry Andric //===- XtensaInstPrinter.cpp - Convert Xtensa MCInst to asm syntax --------===//
2*bdd1243dSDimitry Andric //
3*bdd1243dSDimitry Andric //                     The LLVM Compiler Infrastructure
4*bdd1243dSDimitry Andric //
5*bdd1243dSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
6*bdd1243dSDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
7*bdd1243dSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8*bdd1243dSDimitry Andric //
9*bdd1243dSDimitry Andric //===----------------------------------------------------------------------===//
10*bdd1243dSDimitry Andric //
11*bdd1243dSDimitry Andric // This class prints an Xtensa MCInst to a .s file.
12*bdd1243dSDimitry Andric //
13*bdd1243dSDimitry Andric //===----------------------------------------------------------------------===//
14*bdd1243dSDimitry Andric 
15*bdd1243dSDimitry Andric #include "XtensaInstPrinter.h"
16*bdd1243dSDimitry Andric #include "llvm/CodeGen/MachineOperand.h"
17*bdd1243dSDimitry Andric #include "llvm/MC/MCExpr.h"
18*bdd1243dSDimitry Andric #include "llvm/MC/MCInstrInfo.h"
19*bdd1243dSDimitry Andric #include "llvm/MC/MCRegister.h"
20*bdd1243dSDimitry Andric #include "llvm/MC/MCSymbol.h"
21*bdd1243dSDimitry Andric #include "llvm/Support/Casting.h"
22*bdd1243dSDimitry Andric #include "llvm/Support/raw_ostream.h"
23*bdd1243dSDimitry Andric 
24*bdd1243dSDimitry Andric using namespace llvm;
25*bdd1243dSDimitry Andric 
26*bdd1243dSDimitry Andric #define DEBUG_TYPE "asm-printer"
27*bdd1243dSDimitry Andric 
28*bdd1243dSDimitry Andric #include "XtensaGenAsmWriter.inc"
29*bdd1243dSDimitry Andric 
printExpr(const MCExpr * Expr,raw_ostream & OS)30*bdd1243dSDimitry Andric static void printExpr(const MCExpr *Expr, raw_ostream &OS) {
31*bdd1243dSDimitry Andric   int Offset = 0;
32*bdd1243dSDimitry Andric   const MCSymbolRefExpr *SRE;
33*bdd1243dSDimitry Andric 
34*bdd1243dSDimitry Andric   if (!(SRE = cast<MCSymbolRefExpr>(Expr)))
35*bdd1243dSDimitry Andric     assert(false && "Unexpected MCExpr type.");
36*bdd1243dSDimitry Andric 
37*bdd1243dSDimitry Andric   MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
38*bdd1243dSDimitry Andric 
39*bdd1243dSDimitry Andric   switch (Kind) {
40*bdd1243dSDimitry Andric   case MCSymbolRefExpr::VK_None:
41*bdd1243dSDimitry Andric     break;
42*bdd1243dSDimitry Andric   // TODO
43*bdd1243dSDimitry Andric   default:
44*bdd1243dSDimitry Andric     report_fatal_error("Invalid kind!");
45*bdd1243dSDimitry Andric   }
46*bdd1243dSDimitry Andric 
47*bdd1243dSDimitry Andric   OS << SRE->getSymbol();
48*bdd1243dSDimitry Andric 
49*bdd1243dSDimitry Andric   if (Offset) {
50*bdd1243dSDimitry Andric     if (Offset > 0)
51*bdd1243dSDimitry Andric       OS << '+';
52*bdd1243dSDimitry Andric     OS << Offset;
53*bdd1243dSDimitry Andric   }
54*bdd1243dSDimitry Andric 
55*bdd1243dSDimitry Andric   if (Kind != MCSymbolRefExpr::VK_None)
56*bdd1243dSDimitry Andric     OS << ')';
57*bdd1243dSDimitry Andric }
58*bdd1243dSDimitry Andric 
printOperand(const MCOperand & MC,raw_ostream & O)59*bdd1243dSDimitry Andric void XtensaInstPrinter::printOperand(const MCOperand &MC, raw_ostream &O) {
60*bdd1243dSDimitry Andric   if (MC.isReg())
61*bdd1243dSDimitry Andric     O << getRegisterName(MC.getReg());
62*bdd1243dSDimitry Andric   else if (MC.isImm())
63*bdd1243dSDimitry Andric     O << MC.getImm();
64*bdd1243dSDimitry Andric   else if (MC.isExpr())
65*bdd1243dSDimitry Andric     printExpr(MC.getExpr(), O);
66*bdd1243dSDimitry Andric   else
67*bdd1243dSDimitry Andric     report_fatal_error("Invalid operand");
68*bdd1243dSDimitry Andric }
69*bdd1243dSDimitry Andric 
printInst(const MCInst * MI,uint64_t Address,StringRef Annot,const MCSubtargetInfo & STI,raw_ostream & O)70*bdd1243dSDimitry Andric void XtensaInstPrinter::printInst(const MCInst *MI, uint64_t Address,
71*bdd1243dSDimitry Andric                                   StringRef Annot, const MCSubtargetInfo &STI,
72*bdd1243dSDimitry Andric                                   raw_ostream &O) {
73*bdd1243dSDimitry Andric   printInstruction(MI, Address, O);
74*bdd1243dSDimitry Andric   printAnnotation(O, Annot);
75*bdd1243dSDimitry Andric }
76*bdd1243dSDimitry Andric 
printRegName(raw_ostream & O,MCRegister Reg) const77*bdd1243dSDimitry Andric void XtensaInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
78*bdd1243dSDimitry Andric   O << getRegisterName(Reg);
79*bdd1243dSDimitry Andric }
80*bdd1243dSDimitry Andric 
printOperand(const MCInst * MI,int OpNum,raw_ostream & O)81*bdd1243dSDimitry Andric void XtensaInstPrinter::printOperand(const MCInst *MI, int OpNum,
82*bdd1243dSDimitry Andric                                      raw_ostream &O) {
83*bdd1243dSDimitry Andric   printOperand(MI->getOperand(OpNum), O);
84*bdd1243dSDimitry Andric }
85*bdd1243dSDimitry Andric 
printMemOperand(const MCInst * MI,int OpNum,raw_ostream & OS)86*bdd1243dSDimitry Andric void XtensaInstPrinter::printMemOperand(const MCInst *MI, int OpNum,
87*bdd1243dSDimitry Andric                                         raw_ostream &OS) {
88*bdd1243dSDimitry Andric   OS << getRegisterName(MI->getOperand(OpNum).getReg());
89*bdd1243dSDimitry Andric   OS << ", ";
90*bdd1243dSDimitry Andric   printOperand(MI, OpNum + 1, OS);
91*bdd1243dSDimitry Andric }
92*bdd1243dSDimitry Andric 
printBranchTarget(const MCInst * MI,int OpNum,raw_ostream & OS)93*bdd1243dSDimitry Andric void XtensaInstPrinter::printBranchTarget(const MCInst *MI, int OpNum,
94*bdd1243dSDimitry Andric                                           raw_ostream &OS) {
95*bdd1243dSDimitry Andric   const MCOperand &MC = MI->getOperand(OpNum);
96*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
97*bdd1243dSDimitry Andric     int64_t Val = MC.getImm() + 4;
98*bdd1243dSDimitry Andric     OS << ". ";
99*bdd1243dSDimitry Andric     if (Val > 0)
100*bdd1243dSDimitry Andric       OS << '+';
101*bdd1243dSDimitry Andric     OS << Val;
102*bdd1243dSDimitry Andric   } else if (MC.isExpr())
103*bdd1243dSDimitry Andric     MC.getExpr()->print(OS, &MAI, true);
104*bdd1243dSDimitry Andric   else
105*bdd1243dSDimitry Andric     llvm_unreachable("Invalid operand");
106*bdd1243dSDimitry Andric }
107*bdd1243dSDimitry Andric 
printJumpTarget(const MCInst * MI,int OpNum,raw_ostream & OS)108*bdd1243dSDimitry Andric void XtensaInstPrinter::printJumpTarget(const MCInst *MI, int OpNum,
109*bdd1243dSDimitry Andric                                         raw_ostream &OS) {
110*bdd1243dSDimitry Andric   const MCOperand &MC = MI->getOperand(OpNum);
111*bdd1243dSDimitry Andric   if (MC.isImm()) {
112*bdd1243dSDimitry Andric     int64_t Val = MC.getImm() + 4;
113*bdd1243dSDimitry Andric     OS << ". ";
114*bdd1243dSDimitry Andric     if (Val > 0)
115*bdd1243dSDimitry Andric       OS << '+';
116*bdd1243dSDimitry Andric     OS << Val;
117*bdd1243dSDimitry Andric   } else if (MC.isExpr())
118*bdd1243dSDimitry Andric     MC.getExpr()->print(OS, &MAI, true);
119*bdd1243dSDimitry Andric   else
120*bdd1243dSDimitry Andric     llvm_unreachable("Invalid operand");
121*bdd1243dSDimitry Andric   ;
122*bdd1243dSDimitry Andric }
123*bdd1243dSDimitry Andric 
printCallOperand(const MCInst * MI,int OpNum,raw_ostream & OS)124*bdd1243dSDimitry Andric void XtensaInstPrinter::printCallOperand(const MCInst *MI, int OpNum,
125*bdd1243dSDimitry Andric                                          raw_ostream &OS) {
126*bdd1243dSDimitry Andric   const MCOperand &MC = MI->getOperand(OpNum);
127*bdd1243dSDimitry Andric   if (MC.isImm()) {
128*bdd1243dSDimitry Andric     int64_t Val = MC.getImm() + 4;
129*bdd1243dSDimitry Andric     OS << ". ";
130*bdd1243dSDimitry Andric     if (Val > 0)
131*bdd1243dSDimitry Andric       OS << '+';
132*bdd1243dSDimitry Andric     OS << Val;
133*bdd1243dSDimitry Andric   } else if (MC.isExpr())
134*bdd1243dSDimitry Andric     MC.getExpr()->print(OS, &MAI, true);
135*bdd1243dSDimitry Andric   else
136*bdd1243dSDimitry Andric     llvm_unreachable("Invalid operand");
137*bdd1243dSDimitry Andric }
138*bdd1243dSDimitry Andric 
printL32RTarget(const MCInst * MI,int OpNum,raw_ostream & O)139*bdd1243dSDimitry Andric void XtensaInstPrinter::printL32RTarget(const MCInst *MI, int OpNum,
140*bdd1243dSDimitry Andric                                         raw_ostream &O) {
141*bdd1243dSDimitry Andric   const MCOperand &MC = MI->getOperand(OpNum);
142*bdd1243dSDimitry Andric   if (MC.isImm()) {
143*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
144*bdd1243dSDimitry Andric     int64_t InstrOff = Value & 0x3;
145*bdd1243dSDimitry Andric     Value -= InstrOff;
146*bdd1243dSDimitry Andric     assert((Value >= -262144 && Value <= -4) &&
147*bdd1243dSDimitry Andric            "Invalid argument, value must be in ranges [-262144,-4]");
148*bdd1243dSDimitry Andric     Value += ((InstrOff + 0x3) & 0x4) - InstrOff;
149*bdd1243dSDimitry Andric     O << ". ";
150*bdd1243dSDimitry Andric     O << Value;
151*bdd1243dSDimitry Andric   } else if (MC.isExpr())
152*bdd1243dSDimitry Andric     MC.getExpr()->print(O, &MAI, true);
153*bdd1243dSDimitry Andric   else
154*bdd1243dSDimitry Andric     llvm_unreachable("Invalid operand");
155*bdd1243dSDimitry Andric }
156*bdd1243dSDimitry Andric 
printImm8_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)157*bdd1243dSDimitry Andric void XtensaInstPrinter::printImm8_AsmOperand(const MCInst *MI, int OpNum,
158*bdd1243dSDimitry Andric                                              raw_ostream &O) {
159*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
160*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
161*bdd1243dSDimitry Andric     assert(isInt<8>(Value) &&
162*bdd1243dSDimitry Andric            "Invalid argument, value must be in ranges [-128,127]");
163*bdd1243dSDimitry Andric     O << Value;
164*bdd1243dSDimitry Andric   } else {
165*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
166*bdd1243dSDimitry Andric   }
167*bdd1243dSDimitry Andric }
168*bdd1243dSDimitry Andric 
printImm8_sh8_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)169*bdd1243dSDimitry Andric void XtensaInstPrinter::printImm8_sh8_AsmOperand(const MCInst *MI, int OpNum,
170*bdd1243dSDimitry Andric                                                  raw_ostream &O) {
171*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
172*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
173*bdd1243dSDimitry Andric     assert((isInt<16>(Value) && ((Value & 0xFF) == 0)) &&
174*bdd1243dSDimitry Andric            "Invalid argument, value must be multiples of 256 in range "
175*bdd1243dSDimitry Andric            "[-32768,32512]");
176*bdd1243dSDimitry Andric     O << Value;
177*bdd1243dSDimitry Andric   } else
178*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
179*bdd1243dSDimitry Andric }
180*bdd1243dSDimitry Andric 
printImm12_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)181*bdd1243dSDimitry Andric void XtensaInstPrinter::printImm12_AsmOperand(const MCInst *MI, int OpNum,
182*bdd1243dSDimitry Andric                                               raw_ostream &O) {
183*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
184*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
185*bdd1243dSDimitry Andric     assert((Value >= -2048 && Value <= 2047) &&
186*bdd1243dSDimitry Andric            "Invalid argument, value must be in ranges [-2048,2047]");
187*bdd1243dSDimitry Andric     O << Value;
188*bdd1243dSDimitry Andric   } else
189*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
190*bdd1243dSDimitry Andric }
191*bdd1243dSDimitry Andric 
printImm12m_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)192*bdd1243dSDimitry Andric void XtensaInstPrinter::printImm12m_AsmOperand(const MCInst *MI, int OpNum,
193*bdd1243dSDimitry Andric                                                raw_ostream &O) {
194*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
195*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
196*bdd1243dSDimitry Andric     assert((Value >= -2048 && Value <= 2047) &&
197*bdd1243dSDimitry Andric            "Invalid argument, value must be in ranges [-2048,2047]");
198*bdd1243dSDimitry Andric     O << Value;
199*bdd1243dSDimitry Andric   } else
200*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
201*bdd1243dSDimitry Andric }
202*bdd1243dSDimitry Andric 
printUimm4_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)203*bdd1243dSDimitry Andric void XtensaInstPrinter::printUimm4_AsmOperand(const MCInst *MI, int OpNum,
204*bdd1243dSDimitry Andric                                               raw_ostream &O) {
205*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
206*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
207*bdd1243dSDimitry Andric     assert((Value >= 0 && Value <= 15) && "Invalid argument");
208*bdd1243dSDimitry Andric     O << Value;
209*bdd1243dSDimitry Andric   } else
210*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
211*bdd1243dSDimitry Andric }
212*bdd1243dSDimitry Andric 
printUimm5_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)213*bdd1243dSDimitry Andric void XtensaInstPrinter::printUimm5_AsmOperand(const MCInst *MI, int OpNum,
214*bdd1243dSDimitry Andric                                               raw_ostream &O) {
215*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
216*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
217*bdd1243dSDimitry Andric     assert((Value >= 0 && Value <= 31) && "Invalid argument");
218*bdd1243dSDimitry Andric     O << Value;
219*bdd1243dSDimitry Andric   } else
220*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
221*bdd1243dSDimitry Andric }
222*bdd1243dSDimitry Andric 
printShimm1_31_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)223*bdd1243dSDimitry Andric void XtensaInstPrinter::printShimm1_31_AsmOperand(const MCInst *MI, int OpNum,
224*bdd1243dSDimitry Andric                                                   raw_ostream &O) {
225*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
226*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
227*bdd1243dSDimitry Andric     assert((Value >= 1 && Value <= 31) &&
228*bdd1243dSDimitry Andric            "Invalid argument, value must be in range [1,31]");
229*bdd1243dSDimitry Andric     O << Value;
230*bdd1243dSDimitry Andric   } else
231*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
232*bdd1243dSDimitry Andric }
233*bdd1243dSDimitry Andric 
printImm1_16_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)234*bdd1243dSDimitry Andric void XtensaInstPrinter::printImm1_16_AsmOperand(const MCInst *MI, int OpNum,
235*bdd1243dSDimitry Andric                                                 raw_ostream &O) {
236*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
237*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
238*bdd1243dSDimitry Andric     assert((Value >= 1 && Value <= 16) &&
239*bdd1243dSDimitry Andric            "Invalid argument, value must be in range [1,16]");
240*bdd1243dSDimitry Andric     O << Value;
241*bdd1243dSDimitry Andric   } else
242*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
243*bdd1243dSDimitry Andric }
244*bdd1243dSDimitry Andric 
printOffset8m8_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)245*bdd1243dSDimitry Andric void XtensaInstPrinter::printOffset8m8_AsmOperand(const MCInst *MI, int OpNum,
246*bdd1243dSDimitry Andric                                                   raw_ostream &O) {
247*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
248*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
249*bdd1243dSDimitry Andric     assert((Value >= 0 && Value <= 255) &&
250*bdd1243dSDimitry Andric            "Invalid argument, value must be in range [0,255]");
251*bdd1243dSDimitry Andric     O << Value;
252*bdd1243dSDimitry Andric   } else
253*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
254*bdd1243dSDimitry Andric }
255*bdd1243dSDimitry Andric 
printOffset8m16_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)256*bdd1243dSDimitry Andric void XtensaInstPrinter::printOffset8m16_AsmOperand(const MCInst *MI, int OpNum,
257*bdd1243dSDimitry Andric                                                    raw_ostream &O) {
258*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
259*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
260*bdd1243dSDimitry Andric     assert((Value >= 0 && Value <= 510 && ((Value & 0x1) == 0)) &&
261*bdd1243dSDimitry Andric            "Invalid argument, value must be multiples of two in range [0,510]");
262*bdd1243dSDimitry Andric     O << Value;
263*bdd1243dSDimitry Andric   } else
264*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
265*bdd1243dSDimitry Andric }
266*bdd1243dSDimitry Andric 
printOffset8m32_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)267*bdd1243dSDimitry Andric void XtensaInstPrinter::printOffset8m32_AsmOperand(const MCInst *MI, int OpNum,
268*bdd1243dSDimitry Andric                                                    raw_ostream &O) {
269*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
270*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
271*bdd1243dSDimitry Andric     assert(
272*bdd1243dSDimitry Andric         (Value >= 0 && Value <= 1020 && ((Value & 0x3) == 0)) &&
273*bdd1243dSDimitry Andric         "Invalid argument, value must be multiples of four in range [0,1020]");
274*bdd1243dSDimitry Andric     O << Value;
275*bdd1243dSDimitry Andric   } else
276*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
277*bdd1243dSDimitry Andric }
278*bdd1243dSDimitry Andric 
printOffset4m32_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)279*bdd1243dSDimitry Andric void XtensaInstPrinter::printOffset4m32_AsmOperand(const MCInst *MI, int OpNum,
280*bdd1243dSDimitry Andric                                                    raw_ostream &O) {
281*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
282*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
283*bdd1243dSDimitry Andric     assert((Value >= 0 && Value <= 60 && ((Value & 0x3) == 0)) &&
284*bdd1243dSDimitry Andric            "Invalid argument, value must be multiples of four in range [0,60]");
285*bdd1243dSDimitry Andric     O << Value;
286*bdd1243dSDimitry Andric   } else
287*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
288*bdd1243dSDimitry Andric }
289*bdd1243dSDimitry Andric 
printB4const_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)290*bdd1243dSDimitry Andric void XtensaInstPrinter::printB4const_AsmOperand(const MCInst *MI, int OpNum,
291*bdd1243dSDimitry Andric                                                 raw_ostream &O) {
292*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
293*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
294*bdd1243dSDimitry Andric 
295*bdd1243dSDimitry Andric     switch (Value) {
296*bdd1243dSDimitry Andric     case -1:
297*bdd1243dSDimitry Andric     case 1:
298*bdd1243dSDimitry Andric     case 2:
299*bdd1243dSDimitry Andric     case 3:
300*bdd1243dSDimitry Andric     case 4:
301*bdd1243dSDimitry Andric     case 5:
302*bdd1243dSDimitry Andric     case 6:
303*bdd1243dSDimitry Andric     case 7:
304*bdd1243dSDimitry Andric     case 8:
305*bdd1243dSDimitry Andric     case 10:
306*bdd1243dSDimitry Andric     case 12:
307*bdd1243dSDimitry Andric     case 16:
308*bdd1243dSDimitry Andric     case 32:
309*bdd1243dSDimitry Andric     case 64:
310*bdd1243dSDimitry Andric     case 128:
311*bdd1243dSDimitry Andric     case 256:
312*bdd1243dSDimitry Andric       break;
313*bdd1243dSDimitry Andric     default:
314*bdd1243dSDimitry Andric       assert((0) && "Invalid B4const argument");
315*bdd1243dSDimitry Andric     }
316*bdd1243dSDimitry Andric     O << Value;
317*bdd1243dSDimitry Andric   } else
318*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
319*bdd1243dSDimitry Andric }
320*bdd1243dSDimitry Andric 
printB4constu_AsmOperand(const MCInst * MI,int OpNum,raw_ostream & O)321*bdd1243dSDimitry Andric void XtensaInstPrinter::printB4constu_AsmOperand(const MCInst *MI, int OpNum,
322*bdd1243dSDimitry Andric                                                  raw_ostream &O) {
323*bdd1243dSDimitry Andric   if (MI->getOperand(OpNum).isImm()) {
324*bdd1243dSDimitry Andric     int64_t Value = MI->getOperand(OpNum).getImm();
325*bdd1243dSDimitry Andric 
326*bdd1243dSDimitry Andric     switch (Value) {
327*bdd1243dSDimitry Andric     case 32768:
328*bdd1243dSDimitry Andric     case 65536:
329*bdd1243dSDimitry Andric     case 2:
330*bdd1243dSDimitry Andric     case 3:
331*bdd1243dSDimitry Andric     case 4:
332*bdd1243dSDimitry Andric     case 5:
333*bdd1243dSDimitry Andric     case 6:
334*bdd1243dSDimitry Andric     case 7:
335*bdd1243dSDimitry Andric     case 8:
336*bdd1243dSDimitry Andric     case 10:
337*bdd1243dSDimitry Andric     case 12:
338*bdd1243dSDimitry Andric     case 16:
339*bdd1243dSDimitry Andric     case 32:
340*bdd1243dSDimitry Andric     case 64:
341*bdd1243dSDimitry Andric     case 128:
342*bdd1243dSDimitry Andric     case 256:
343*bdd1243dSDimitry Andric       break;
344*bdd1243dSDimitry Andric     default:
345*bdd1243dSDimitry Andric       assert((0) && "Invalid B4constu argument");
346*bdd1243dSDimitry Andric     }
347*bdd1243dSDimitry Andric     O << Value;
348*bdd1243dSDimitry Andric   } else
349*bdd1243dSDimitry Andric     printOperand(MI, OpNum, O);
350*bdd1243dSDimitry Andric }
351