10b57cec5SDimitry Andric //==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric /// 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// This file provides WebAssembly-specific target descriptions. 110b57cec5SDimitry Andric /// 120b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H 150b57cec5SDimitry Andric #define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric #include "llvm/BinaryFormat/Wasm.h" 1806c3fb27SDimitry Andric #include "llvm/MC/MCContext.h" 190b57cec5SDimitry Andric #include "llvm/MC/MCInstrDesc.h" 205f757f3fSDimitry Andric #include "llvm/Support/CommandLine.h" 210b57cec5SDimitry Andric #include "llvm/Support/DataTypes.h" 220b57cec5SDimitry Andric #include <memory> 230b57cec5SDimitry Andric 240b57cec5SDimitry Andric namespace llvm { 250b57cec5SDimitry Andric 260b57cec5SDimitry Andric class MCAsmBackend; 270b57cec5SDimitry Andric class MCCodeEmitter; 280b57cec5SDimitry Andric class MCInstrInfo; 290b57cec5SDimitry Andric class MCObjectTargetWriter; 300b57cec5SDimitry Andric class Triple; 310b57cec5SDimitry Andric 3206c3fb27SDimitry Andric MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII, 3306c3fb27SDimitry Andric MCContext &Ctx); 340b57cec5SDimitry Andric 350b57cec5SDimitry Andric MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT); 360b57cec5SDimitry Andric 370b57cec5SDimitry Andric std::unique_ptr<MCObjectTargetWriter> 388bcb0991SDimitry Andric createWebAssemblyWasmObjectWriter(bool Is64Bit, bool IsEmscripten); 390b57cec5SDimitry Andric 400b57cec5SDimitry Andric namespace WebAssembly { 4106c3fb27SDimitry Andric 4206c3fb27SDimitry Andric // Exception handling / setjmp-longjmp handling command-line options 4306c3fb27SDimitry Andric extern cl::opt<bool> WasmEnableEmEH; // asm.js-style EH 4406c3fb27SDimitry Andric extern cl::opt<bool> WasmEnableEmSjLj; // asm.js-style SjLJ 4506c3fb27SDimitry Andric extern cl::opt<bool> WasmEnableEH; // EH using Wasm EH instructions 4606c3fb27SDimitry Andric extern cl::opt<bool> WasmEnableSjLj; // SjLj using Wasm EH instructions 47*0fca6ea1SDimitry Andric extern cl::opt<bool> WasmEnableExnref; // EH using new Wasm EH (exnref) 4806c3fb27SDimitry Andric 490b57cec5SDimitry Andric enum OperandType { 500b57cec5SDimitry Andric /// Basic block label in a branch construct. 510b57cec5SDimitry Andric OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET, 520b57cec5SDimitry Andric /// Local index. 530b57cec5SDimitry Andric OPERAND_LOCAL, 540b57cec5SDimitry Andric /// Global index. 550b57cec5SDimitry Andric OPERAND_GLOBAL, 560b57cec5SDimitry Andric /// 32-bit integer immediates. 570b57cec5SDimitry Andric OPERAND_I32IMM, 580b57cec5SDimitry Andric /// 64-bit integer immediates. 590b57cec5SDimitry Andric OPERAND_I64IMM, 600b57cec5SDimitry Andric /// 32-bit floating-point immediates. 610b57cec5SDimitry Andric OPERAND_F32IMM, 620b57cec5SDimitry Andric /// 64-bit floating-point immediates. 630b57cec5SDimitry Andric OPERAND_F64IMM, 640b57cec5SDimitry Andric /// 8-bit vector lane immediate 650b57cec5SDimitry Andric OPERAND_VEC_I8IMM, 660b57cec5SDimitry Andric /// 16-bit vector lane immediate 670b57cec5SDimitry Andric OPERAND_VEC_I16IMM, 680b57cec5SDimitry Andric /// 32-bit vector lane immediate 690b57cec5SDimitry Andric OPERAND_VEC_I32IMM, 700b57cec5SDimitry Andric /// 64-bit vector lane immediate 710b57cec5SDimitry Andric OPERAND_VEC_I64IMM, 720b57cec5SDimitry Andric /// 32-bit unsigned function indices. 730b57cec5SDimitry Andric OPERAND_FUNCTION32, 740b57cec5SDimitry Andric /// 32-bit unsigned memory offsets. 750b57cec5SDimitry Andric OPERAND_OFFSET32, 765ffd83dbSDimitry Andric /// 64-bit unsigned memory offsets. 775ffd83dbSDimitry Andric OPERAND_OFFSET64, 780b57cec5SDimitry Andric /// p2align immediate for load and store address alignment. 790b57cec5SDimitry Andric OPERAND_P2ALIGN, 800b57cec5SDimitry Andric /// signature immediate for block/loop. 810b57cec5SDimitry Andric OPERAND_SIGNATURE, 820b57cec5SDimitry Andric /// type signature immediate for call_indirect. 830b57cec5SDimitry Andric OPERAND_TYPEINDEX, 84fe6060f1SDimitry Andric /// Tag index. 85fe6060f1SDimitry Andric OPERAND_TAG, 860b57cec5SDimitry Andric /// A list of branch targets for br_list. 870b57cec5SDimitry Andric OPERAND_BRLIST, 88e8d8bef9SDimitry Andric /// 32-bit unsigned table number. 89e8d8bef9SDimitry Andric OPERAND_TABLE, 900b57cec5SDimitry Andric }; 910b57cec5SDimitry Andric } // end namespace WebAssembly 920b57cec5SDimitry Andric 930b57cec5SDimitry Andric namespace WebAssemblyII { 940b57cec5SDimitry Andric 950b57cec5SDimitry Andric /// Target Operand Flag enum. 960b57cec5SDimitry Andric enum TOF { 970b57cec5SDimitry Andric MO_NO_FLAG = 0, 980b57cec5SDimitry Andric 990b57cec5SDimitry Andric // On a symbol operand this indicates that the immediate is a wasm global 1000b57cec5SDimitry Andric // index. The value of the wasm global will be set to the symbol address at 1010b57cec5SDimitry Andric // runtime. This adds a level of indirection similar to the GOT on native 1020b57cec5SDimitry Andric // platforms. 1030b57cec5SDimitry Andric MO_GOT, 1040b57cec5SDimitry Andric 105349cc55cSDimitry Andric // Same as MO_GOT but the address stored in the global is a TLS address. 106349cc55cSDimitry Andric MO_GOT_TLS, 107349cc55cSDimitry Andric 1080b57cec5SDimitry Andric // On a symbol operand this indicates that the immediate is the symbol 1090b57cec5SDimitry Andric // address relative the __memory_base wasm global. 1100b57cec5SDimitry Andric // Only applicable to data symbols. 1110b57cec5SDimitry Andric MO_MEMORY_BASE_REL, 1120b57cec5SDimitry Andric 1130b57cec5SDimitry Andric // On a symbol operand this indicates that the immediate is the symbol 114e8d8bef9SDimitry Andric // address relative the __tls_base wasm global. 115e8d8bef9SDimitry Andric // Only applicable to data symbols. 116e8d8bef9SDimitry Andric MO_TLS_BASE_REL, 117e8d8bef9SDimitry Andric 118e8d8bef9SDimitry Andric // On a symbol operand this indicates that the immediate is the symbol 1190b57cec5SDimitry Andric // address relative the __table_base wasm global. 1200b57cec5SDimitry Andric // Only applicable to function symbols. 1210b57cec5SDimitry Andric MO_TABLE_BASE_REL, 1220b57cec5SDimitry Andric }; 1230b57cec5SDimitry Andric 1240b57cec5SDimitry Andric } // end namespace WebAssemblyII 1250b57cec5SDimitry Andric 1260b57cec5SDimitry Andric } // end namespace llvm 1270b57cec5SDimitry Andric 1280b57cec5SDimitry Andric // Defines symbolic names for WebAssembly registers. This defines a mapping from 1290b57cec5SDimitry Andric // register name to register number. 1300b57cec5SDimitry Andric // 1310b57cec5SDimitry Andric #define GET_REGINFO_ENUM 1320b57cec5SDimitry Andric #include "WebAssemblyGenRegisterInfo.inc" 1330b57cec5SDimitry Andric 1340b57cec5SDimitry Andric // Defines symbolic names for the WebAssembly instructions. 1350b57cec5SDimitry Andric // 1360b57cec5SDimitry Andric #define GET_INSTRINFO_ENUM 137753f127fSDimitry Andric #define GET_INSTRINFO_MC_HELPER_DECLS 1380b57cec5SDimitry Andric #include "WebAssemblyGenInstrInfo.inc" 1390b57cec5SDimitry Andric 1400b57cec5SDimitry Andric namespace llvm { 1410b57cec5SDimitry Andric namespace WebAssembly { 1420b57cec5SDimitry Andric 1430b57cec5SDimitry Andric /// Instruction opcodes emitted via means other than CodeGen. 1440b57cec5SDimitry Andric static const unsigned Nop = 0x01; 1450b57cec5SDimitry Andric static const unsigned End = 0x0b; 1460b57cec5SDimitry Andric 1470b57cec5SDimitry Andric /// Return the default p2align value for a load or store with the given opcode. 1480b57cec5SDimitry Andric inline unsigned GetDefaultP2AlignAny(unsigned Opc) { 1490b57cec5SDimitry Andric switch (Opc) { 1505ffd83dbSDimitry Andric #define WASM_LOAD_STORE(NAME) \ 1515ffd83dbSDimitry Andric case WebAssembly::NAME##_A32: \ 1525ffd83dbSDimitry Andric case WebAssembly::NAME##_A64: \ 1535ffd83dbSDimitry Andric case WebAssembly::NAME##_A32_S: \ 1545ffd83dbSDimitry Andric case WebAssembly::NAME##_A64_S: 1555ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD8_S_I32) 1565ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD8_U_I32) 1575ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD8_S_I64) 1585ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD8_U_I64) 1595ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_LOAD8_U_I32) 1605ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_LOAD8_U_I64) 1615ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE8_I32) 1625ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE8_I64) 1635ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_STORE8_I32) 1645ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_STORE8_I64) 1655ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_ADD_I32) 1665ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_ADD_I64) 1675ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_SUB_I32) 1685ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_SUB_I64) 1695ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_AND_I32) 1705ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_AND_I64) 1715ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_OR_I32) 1725ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_OR_I64) 1735ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_XOR_I32) 1745ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_XOR_I64) 1755ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_XCHG_I32) 1765ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_XCHG_I64) 1775ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_CMPXCHG_I32) 1785ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW8_U_CMPXCHG_I64) 179e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD8_SPLAT) 180e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_LANE_I8x16) 181e8d8bef9SDimitry Andric WASM_LOAD_STORE(STORE_LANE_I8x16) 1820b57cec5SDimitry Andric return 0; 1835ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD16_S_I32) 1845ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD16_U_I32) 1855ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD16_S_I64) 1865ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD16_U_I64) 1875ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_LOAD16_U_I32) 1885ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_LOAD16_U_I64) 1895ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE16_I32) 1905ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE16_I64) 1915ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_STORE16_I32) 1925ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_STORE16_I64) 1935ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_ADD_I32) 1945ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_ADD_I64) 1955ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_SUB_I32) 1965ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_SUB_I64) 1975ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_AND_I32) 1985ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_AND_I64) 1995ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_OR_I32) 2005ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_OR_I64) 2015ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_XOR_I32) 2025ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_XOR_I64) 2035ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_XCHG_I32) 2045ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_XCHG_I64) 2055ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_CMPXCHG_I32) 2065ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW16_U_CMPXCHG_I64) 207e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD16_SPLAT) 208e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_LANE_I16x8) 209e8d8bef9SDimitry Andric WASM_LOAD_STORE(STORE_LANE_I16x8) 210*0fca6ea1SDimitry Andric WASM_LOAD_STORE(LOAD_F16_F32) 211*0fca6ea1SDimitry Andric WASM_LOAD_STORE(STORE_F16_F32) 2120b57cec5SDimitry Andric return 1; 2135ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD_I32) 2145ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD_F32) 2155ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE_I32) 2165ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE_F32) 2175ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD32_S_I64) 2185ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD32_U_I64) 2195ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE32_I64) 2205ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_LOAD_I32) 2215ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_LOAD32_U_I64) 2225ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_STORE_I32) 2235ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_STORE32_I64) 2245ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_ADD_I32) 2255ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW32_U_ADD_I64) 2265ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_SUB_I32) 2275ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW32_U_SUB_I64) 2285ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_AND_I32) 2295ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW32_U_AND_I64) 2305ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_OR_I32) 2315ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW32_U_OR_I64) 2325ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_XOR_I32) 2335ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW32_U_XOR_I64) 2345ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I32) 2355ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW32_U_XCHG_I64) 2365ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I32) 2375ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW32_U_CMPXCHG_I64) 238e8d8bef9SDimitry Andric WASM_LOAD_STORE(MEMORY_ATOMIC_NOTIFY) 239e8d8bef9SDimitry Andric WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT32) 240e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD32_SPLAT) 241e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_ZERO_I32x4) 242e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_LANE_I32x4) 243e8d8bef9SDimitry Andric WASM_LOAD_STORE(STORE_LANE_I32x4) 2440b57cec5SDimitry Andric return 2; 2455ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD_I64) 2465ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD_F64) 2475ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE_I64) 2485ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE_F64) 2495ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_LOAD_I64) 2505ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_STORE_I64) 2515ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_ADD_I64) 2525ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_SUB_I64) 2535ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_AND_I64) 2545ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_OR_I64) 2555ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_XOR_I64) 2565ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I64) 2575ffd83dbSDimitry Andric WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I64) 258e8d8bef9SDimitry Andric WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT64) 259e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD64_SPLAT) 260e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_EXTEND_S_I16x8) 261e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_EXTEND_U_I16x8) 262e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_EXTEND_S_I32x4) 263e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_EXTEND_U_I32x4) 264e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_EXTEND_S_I64x2) 265e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_EXTEND_U_I64x2) 266e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_ZERO_I64x2) 267e8d8bef9SDimitry Andric WASM_LOAD_STORE(LOAD_LANE_I64x2) 268e8d8bef9SDimitry Andric WASM_LOAD_STORE(STORE_LANE_I64x2) 2690b57cec5SDimitry Andric return 3; 2705ffd83dbSDimitry Andric WASM_LOAD_STORE(LOAD_V128) 2715ffd83dbSDimitry Andric WASM_LOAD_STORE(STORE_V128) 2720b57cec5SDimitry Andric return 4; 2730b57cec5SDimitry Andric default: 2740b57cec5SDimitry Andric return -1; 2750b57cec5SDimitry Andric } 2765ffd83dbSDimitry Andric #undef WASM_LOAD_STORE 2770b57cec5SDimitry Andric } 2780b57cec5SDimitry Andric 2790b57cec5SDimitry Andric inline unsigned GetDefaultP2Align(unsigned Opc) { 2800b57cec5SDimitry Andric auto Align = GetDefaultP2AlignAny(Opc); 2810b57cec5SDimitry Andric if (Align == -1U) { 2820b57cec5SDimitry Andric llvm_unreachable("Only loads and stores have p2align values"); 2830b57cec5SDimitry Andric } 2840b57cec5SDimitry Andric return Align; 2850b57cec5SDimitry Andric } 2860b57cec5SDimitry Andric 28706c3fb27SDimitry Andric inline bool isConst(unsigned Opc) { 28806c3fb27SDimitry Andric switch (Opc) { 28906c3fb27SDimitry Andric case WebAssembly::CONST_I32: 29006c3fb27SDimitry Andric case WebAssembly::CONST_I32_S: 29106c3fb27SDimitry Andric case WebAssembly::CONST_I64: 29206c3fb27SDimitry Andric case WebAssembly::CONST_I64_S: 29306c3fb27SDimitry Andric case WebAssembly::CONST_F32: 29406c3fb27SDimitry Andric case WebAssembly::CONST_F32_S: 29506c3fb27SDimitry Andric case WebAssembly::CONST_F64: 29606c3fb27SDimitry Andric case WebAssembly::CONST_F64_S: 29706c3fb27SDimitry Andric case WebAssembly::CONST_V128_I8x16: 29806c3fb27SDimitry Andric case WebAssembly::CONST_V128_I8x16_S: 29906c3fb27SDimitry Andric case WebAssembly::CONST_V128_I16x8: 30006c3fb27SDimitry Andric case WebAssembly::CONST_V128_I16x8_S: 30106c3fb27SDimitry Andric case WebAssembly::CONST_V128_I32x4: 30206c3fb27SDimitry Andric case WebAssembly::CONST_V128_I32x4_S: 30306c3fb27SDimitry Andric case WebAssembly::CONST_V128_I64x2: 30406c3fb27SDimitry Andric case WebAssembly::CONST_V128_I64x2_S: 30506c3fb27SDimitry Andric case WebAssembly::CONST_V128_F32x4: 30606c3fb27SDimitry Andric case WebAssembly::CONST_V128_F32x4_S: 30706c3fb27SDimitry Andric case WebAssembly::CONST_V128_F64x2: 30806c3fb27SDimitry Andric case WebAssembly::CONST_V128_F64x2_S: 30906c3fb27SDimitry Andric return true; 31006c3fb27SDimitry Andric default: 31106c3fb27SDimitry Andric return false; 31206c3fb27SDimitry Andric } 31306c3fb27SDimitry Andric } 31406c3fb27SDimitry Andric 31506c3fb27SDimitry Andric inline bool isScalarConst(unsigned Opc) { 31606c3fb27SDimitry Andric switch (Opc) { 31706c3fb27SDimitry Andric case WebAssembly::CONST_I32: 31806c3fb27SDimitry Andric case WebAssembly::CONST_I32_S: 31906c3fb27SDimitry Andric case WebAssembly::CONST_I64: 32006c3fb27SDimitry Andric case WebAssembly::CONST_I64_S: 32106c3fb27SDimitry Andric case WebAssembly::CONST_F32: 32206c3fb27SDimitry Andric case WebAssembly::CONST_F32_S: 32306c3fb27SDimitry Andric case WebAssembly::CONST_F64: 32406c3fb27SDimitry Andric case WebAssembly::CONST_F64_S: 32506c3fb27SDimitry Andric return true; 32606c3fb27SDimitry Andric default: 32706c3fb27SDimitry Andric return false; 32806c3fb27SDimitry Andric } 32906c3fb27SDimitry Andric } 33006c3fb27SDimitry Andric 3310b57cec5SDimitry Andric inline bool isArgument(unsigned Opc) { 3320b57cec5SDimitry Andric switch (Opc) { 3330b57cec5SDimitry Andric case WebAssembly::ARGUMENT_i32: 3340b57cec5SDimitry Andric case WebAssembly::ARGUMENT_i32_S: 3350b57cec5SDimitry Andric case WebAssembly::ARGUMENT_i64: 3360b57cec5SDimitry Andric case WebAssembly::ARGUMENT_i64_S: 3370b57cec5SDimitry Andric case WebAssembly::ARGUMENT_f32: 3380b57cec5SDimitry Andric case WebAssembly::ARGUMENT_f32_S: 3390b57cec5SDimitry Andric case WebAssembly::ARGUMENT_f64: 3400b57cec5SDimitry Andric case WebAssembly::ARGUMENT_f64_S: 3410b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v16i8: 3420b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v16i8_S: 3430b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v8i16: 3440b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v8i16_S: 3450b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v4i32: 3460b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v4i32_S: 3470b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v2i64: 3480b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v2i64_S: 349*0fca6ea1SDimitry Andric case WebAssembly::ARGUMENT_v8f16: 350*0fca6ea1SDimitry Andric case WebAssembly::ARGUMENT_v8f16_S: 3510b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v4f32: 3520b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v4f32_S: 3530b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v2f64: 3540b57cec5SDimitry Andric case WebAssembly::ARGUMENT_v2f64_S: 355e8d8bef9SDimitry Andric case WebAssembly::ARGUMENT_funcref: 356e8d8bef9SDimitry Andric case WebAssembly::ARGUMENT_funcref_S: 357e8d8bef9SDimitry Andric case WebAssembly::ARGUMENT_externref: 358e8d8bef9SDimitry Andric case WebAssembly::ARGUMENT_externref_S: 359*0fca6ea1SDimitry Andric case WebAssembly::ARGUMENT_exnref: 360*0fca6ea1SDimitry Andric case WebAssembly::ARGUMENT_exnref_S: 3610b57cec5SDimitry Andric return true; 3620b57cec5SDimitry Andric default: 3630b57cec5SDimitry Andric return false; 3640b57cec5SDimitry Andric } 3650b57cec5SDimitry Andric } 3660b57cec5SDimitry Andric 3670b57cec5SDimitry Andric inline bool isCopy(unsigned Opc) { 3680b57cec5SDimitry Andric switch (Opc) { 3690b57cec5SDimitry Andric case WebAssembly::COPY_I32: 3700b57cec5SDimitry Andric case WebAssembly::COPY_I32_S: 3710b57cec5SDimitry Andric case WebAssembly::COPY_I64: 3720b57cec5SDimitry Andric case WebAssembly::COPY_I64_S: 3730b57cec5SDimitry Andric case WebAssembly::COPY_F32: 3740b57cec5SDimitry Andric case WebAssembly::COPY_F32_S: 3750b57cec5SDimitry Andric case WebAssembly::COPY_F64: 3760b57cec5SDimitry Andric case WebAssembly::COPY_F64_S: 3770b57cec5SDimitry Andric case WebAssembly::COPY_V128: 3780b57cec5SDimitry Andric case WebAssembly::COPY_V128_S: 379e8d8bef9SDimitry Andric case WebAssembly::COPY_FUNCREF: 380e8d8bef9SDimitry Andric case WebAssembly::COPY_FUNCREF_S: 381e8d8bef9SDimitry Andric case WebAssembly::COPY_EXTERNREF: 382e8d8bef9SDimitry Andric case WebAssembly::COPY_EXTERNREF_S: 383*0fca6ea1SDimitry Andric case WebAssembly::COPY_EXNREF: 384*0fca6ea1SDimitry Andric case WebAssembly::COPY_EXNREF_S: 3850b57cec5SDimitry Andric return true; 3860b57cec5SDimitry Andric default: 3870b57cec5SDimitry Andric return false; 3880b57cec5SDimitry Andric } 3890b57cec5SDimitry Andric } 3900b57cec5SDimitry Andric 3910b57cec5SDimitry Andric inline bool isTee(unsigned Opc) { 3920b57cec5SDimitry Andric switch (Opc) { 3930b57cec5SDimitry Andric case WebAssembly::TEE_I32: 3940b57cec5SDimitry Andric case WebAssembly::TEE_I32_S: 3950b57cec5SDimitry Andric case WebAssembly::TEE_I64: 3960b57cec5SDimitry Andric case WebAssembly::TEE_I64_S: 3970b57cec5SDimitry Andric case WebAssembly::TEE_F32: 3980b57cec5SDimitry Andric case WebAssembly::TEE_F32_S: 3990b57cec5SDimitry Andric case WebAssembly::TEE_F64: 4000b57cec5SDimitry Andric case WebAssembly::TEE_F64_S: 4010b57cec5SDimitry Andric case WebAssembly::TEE_V128: 4020b57cec5SDimitry Andric case WebAssembly::TEE_V128_S: 403e8d8bef9SDimitry Andric case WebAssembly::TEE_FUNCREF: 404e8d8bef9SDimitry Andric case WebAssembly::TEE_FUNCREF_S: 405e8d8bef9SDimitry Andric case WebAssembly::TEE_EXTERNREF: 406e8d8bef9SDimitry Andric case WebAssembly::TEE_EXTERNREF_S: 407*0fca6ea1SDimitry Andric case WebAssembly::TEE_EXNREF: 408*0fca6ea1SDimitry Andric case WebAssembly::TEE_EXNREF_S: 4090b57cec5SDimitry Andric return true; 4100b57cec5SDimitry Andric default: 4110b57cec5SDimitry Andric return false; 4120b57cec5SDimitry Andric } 4130b57cec5SDimitry Andric } 4140b57cec5SDimitry Andric 4150b57cec5SDimitry Andric inline bool isCallDirect(unsigned Opc) { 4160b57cec5SDimitry Andric switch (Opc) { 4175ffd83dbSDimitry Andric case WebAssembly::CALL: 4185ffd83dbSDimitry Andric case WebAssembly::CALL_S: 4190b57cec5SDimitry Andric case WebAssembly::RET_CALL: 4200b57cec5SDimitry Andric case WebAssembly::RET_CALL_S: 4210b57cec5SDimitry Andric return true; 4220b57cec5SDimitry Andric default: 4230b57cec5SDimitry Andric return false; 4240b57cec5SDimitry Andric } 4250b57cec5SDimitry Andric } 4260b57cec5SDimitry Andric 4270b57cec5SDimitry Andric inline bool isCallIndirect(unsigned Opc) { 4280b57cec5SDimitry Andric switch (Opc) { 4295ffd83dbSDimitry Andric case WebAssembly::CALL_INDIRECT: 4305ffd83dbSDimitry Andric case WebAssembly::CALL_INDIRECT_S: 4310b57cec5SDimitry Andric case WebAssembly::RET_CALL_INDIRECT: 4320b57cec5SDimitry Andric case WebAssembly::RET_CALL_INDIRECT_S: 4330b57cec5SDimitry Andric return true; 4340b57cec5SDimitry Andric default: 4350b57cec5SDimitry Andric return false; 4360b57cec5SDimitry Andric } 4370b57cec5SDimitry Andric } 4380b57cec5SDimitry Andric 4395f757f3fSDimitry Andric inline bool isBrTable(unsigned Opc) { 4405f757f3fSDimitry Andric switch (Opc) { 4415ffd83dbSDimitry Andric case WebAssembly::BR_TABLE_I32: 4425ffd83dbSDimitry Andric case WebAssembly::BR_TABLE_I32_S: 4435ffd83dbSDimitry Andric case WebAssembly::BR_TABLE_I64: 4445ffd83dbSDimitry Andric case WebAssembly::BR_TABLE_I64_S: 4455ffd83dbSDimitry Andric return true; 4460b57cec5SDimitry Andric default: 4475ffd83dbSDimitry Andric return false; 4480b57cec5SDimitry Andric } 4490b57cec5SDimitry Andric } 4500b57cec5SDimitry Andric 4510b57cec5SDimitry Andric inline bool isMarker(unsigned Opc) { 4520b57cec5SDimitry Andric switch (Opc) { 4530b57cec5SDimitry Andric case WebAssembly::BLOCK: 4540b57cec5SDimitry Andric case WebAssembly::BLOCK_S: 4550b57cec5SDimitry Andric case WebAssembly::END_BLOCK: 4560b57cec5SDimitry Andric case WebAssembly::END_BLOCK_S: 4570b57cec5SDimitry Andric case WebAssembly::LOOP: 4580b57cec5SDimitry Andric case WebAssembly::LOOP_S: 4590b57cec5SDimitry Andric case WebAssembly::END_LOOP: 4600b57cec5SDimitry Andric case WebAssembly::END_LOOP_S: 4610b57cec5SDimitry Andric case WebAssembly::TRY: 4620b57cec5SDimitry Andric case WebAssembly::TRY_S: 4630b57cec5SDimitry Andric case WebAssembly::END_TRY: 4640b57cec5SDimitry Andric case WebAssembly::END_TRY_S: 4650b57cec5SDimitry Andric return true; 4660b57cec5SDimitry Andric default: 4670b57cec5SDimitry Andric return false; 4680b57cec5SDimitry Andric } 4690b57cec5SDimitry Andric } 4700b57cec5SDimitry Andric 471e8d8bef9SDimitry Andric inline bool isCatch(unsigned Opc) { 472e8d8bef9SDimitry Andric switch (Opc) { 473e8d8bef9SDimitry Andric case WebAssembly::CATCH: 474e8d8bef9SDimitry Andric case WebAssembly::CATCH_S: 475e8d8bef9SDimitry Andric case WebAssembly::CATCH_ALL: 476e8d8bef9SDimitry Andric case WebAssembly::CATCH_ALL_S: 477e8d8bef9SDimitry Andric return true; 478e8d8bef9SDimitry Andric default: 479e8d8bef9SDimitry Andric return false; 480e8d8bef9SDimitry Andric } 481e8d8bef9SDimitry Andric } 482e8d8bef9SDimitry Andric 483bdd1243dSDimitry Andric inline bool isLocalGet(unsigned Opc) { 484bdd1243dSDimitry Andric switch (Opc) { 485bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_I32: 486bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_I32_S: 487bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_I64: 488bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_I64_S: 489bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_F32: 490bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_F32_S: 491bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_F64: 492bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_F64_S: 493bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_V128: 494bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_V128_S: 495bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_FUNCREF: 496bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_FUNCREF_S: 497bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_EXTERNREF: 498bdd1243dSDimitry Andric case WebAssembly::LOCAL_GET_EXTERNREF_S: 499*0fca6ea1SDimitry Andric case WebAssembly::LOCAL_GET_EXNREF: 500*0fca6ea1SDimitry Andric case WebAssembly::LOCAL_GET_EXNREF_S: 501bdd1243dSDimitry Andric return true; 502bdd1243dSDimitry Andric default: 503bdd1243dSDimitry Andric return false; 504bdd1243dSDimitry Andric } 505bdd1243dSDimitry Andric } 506bdd1243dSDimitry Andric 507bdd1243dSDimitry Andric inline bool isLocalSet(unsigned Opc) { 508bdd1243dSDimitry Andric switch (Opc) { 509bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_I32: 510bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_I32_S: 511bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_I64: 512bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_I64_S: 513bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_F32: 514bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_F32_S: 515bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_F64: 516bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_F64_S: 517bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_V128: 518bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_V128_S: 519bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_FUNCREF: 520bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_FUNCREF_S: 521bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_EXTERNREF: 522bdd1243dSDimitry Andric case WebAssembly::LOCAL_SET_EXTERNREF_S: 523*0fca6ea1SDimitry Andric case WebAssembly::LOCAL_SET_EXNREF: 524*0fca6ea1SDimitry Andric case WebAssembly::LOCAL_SET_EXNREF_S: 525bdd1243dSDimitry Andric return true; 526bdd1243dSDimitry Andric default: 527bdd1243dSDimitry Andric return false; 528bdd1243dSDimitry Andric } 529bdd1243dSDimitry Andric } 530bdd1243dSDimitry Andric 531bdd1243dSDimitry Andric inline bool isLocalTee(unsigned Opc) { 532bdd1243dSDimitry Andric switch (Opc) { 533bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_I32: 534bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_I32_S: 535bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_I64: 536bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_I64_S: 537bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_F32: 538bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_F32_S: 539bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_F64: 540bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_F64_S: 541bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_V128: 542bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_V128_S: 543bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_FUNCREF: 544bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_FUNCREF_S: 545bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_EXTERNREF: 546bdd1243dSDimitry Andric case WebAssembly::LOCAL_TEE_EXTERNREF_S: 547*0fca6ea1SDimitry Andric case WebAssembly::LOCAL_TEE_EXNREF: 548*0fca6ea1SDimitry Andric case WebAssembly::LOCAL_TEE_EXNREF_S: 549bdd1243dSDimitry Andric return true; 550bdd1243dSDimitry Andric default: 551bdd1243dSDimitry Andric return false; 552bdd1243dSDimitry Andric } 553bdd1243dSDimitry Andric } 554bdd1243dSDimitry Andric 5555f757f3fSDimitry Andric static const unsigned UnusedReg = -1u; 5565f757f3fSDimitry Andric 5575f757f3fSDimitry Andric // For a given stackified WAReg, return the id number to print with push/pop. 5585f757f3fSDimitry Andric unsigned inline getWARegStackId(unsigned Reg) { 5595f757f3fSDimitry Andric assert(Reg & INT32_MIN); 5605f757f3fSDimitry Andric return Reg & INT32_MAX; 5615f757f3fSDimitry Andric } 5625f757f3fSDimitry Andric 5630b57cec5SDimitry Andric } // end namespace WebAssembly 5640b57cec5SDimitry Andric } // end namespace llvm 5650b57cec5SDimitry Andric 5665f757f3fSDimitry Andric #define GET_SUBTARGETINFO_ENUM 5675f757f3fSDimitry Andric #include "WebAssemblyGenSubtargetInfo.inc" 5685f757f3fSDimitry Andric 5690b57cec5SDimitry Andric #endif 570