1480093f4SDimitry Andric //===-- VEMCInstLower.cpp - Convert VE MachineInstr to MCInst -------------===// 2480093f4SDimitry Andric // 3480093f4SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4480093f4SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5480093f4SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6480093f4SDimitry Andric // 7480093f4SDimitry Andric //===----------------------------------------------------------------------===// 8480093f4SDimitry Andric // 9480093f4SDimitry Andric // This file contains code to lower VE MachineInstrs to their corresponding 10480093f4SDimitry Andric // MCInst records. 11480093f4SDimitry Andric // 12480093f4SDimitry Andric //===----------------------------------------------------------------------===// 13480093f4SDimitry Andric 14*5ffd83dbSDimitry Andric #include "MCTargetDesc/VEMCExpr.h" 15480093f4SDimitry Andric #include "VE.h" 16480093f4SDimitry Andric #include "llvm/CodeGen/AsmPrinter.h" 17480093f4SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 18480093f4SDimitry Andric #include "llvm/CodeGen/MachineInstr.h" 19480093f4SDimitry Andric #include "llvm/CodeGen/MachineOperand.h" 20480093f4SDimitry Andric #include "llvm/IR/Mangler.h" 21480093f4SDimitry Andric #include "llvm/MC/MCAsmInfo.h" 22480093f4SDimitry Andric #include "llvm/MC/MCContext.h" 23480093f4SDimitry Andric #include "llvm/MC/MCExpr.h" 24480093f4SDimitry Andric #include "llvm/MC/MCInst.h" 25480093f4SDimitry Andric 26480093f4SDimitry Andric using namespace llvm; 27480093f4SDimitry Andric 28480093f4SDimitry Andric static MCOperand LowerSymbolOperand(const MachineInstr *MI, 29480093f4SDimitry Andric const MachineOperand &MO, 30480093f4SDimitry Andric const MCSymbol *Symbol, AsmPrinter &AP) { 31*5ffd83dbSDimitry Andric VEMCExpr::VariantKind Kind = (VEMCExpr::VariantKind)MO.getTargetFlags(); 32480093f4SDimitry Andric 33*5ffd83dbSDimitry Andric const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, AP.OutContext); 34*5ffd83dbSDimitry Andric // Add offset iff MO is not jump table info or machine basic block. 35*5ffd83dbSDimitry Andric if (!MO.isJTI() && !MO.isMBB() && MO.getOffset()) 36*5ffd83dbSDimitry Andric Expr = MCBinaryExpr::createAdd( 37*5ffd83dbSDimitry Andric Expr, MCConstantExpr::create(MO.getOffset(), AP.OutContext), 38*5ffd83dbSDimitry Andric AP.OutContext); 39*5ffd83dbSDimitry Andric Expr = VEMCExpr::create(Kind, Expr, AP.OutContext); 40*5ffd83dbSDimitry Andric return MCOperand::createExpr(Expr); 41480093f4SDimitry Andric } 42480093f4SDimitry Andric 43480093f4SDimitry Andric static MCOperand LowerOperand(const MachineInstr *MI, const MachineOperand &MO, 44480093f4SDimitry Andric AsmPrinter &AP) { 45480093f4SDimitry Andric switch (MO.getType()) { 46480093f4SDimitry Andric default: 47480093f4SDimitry Andric report_fatal_error("unsupported operand type"); 48480093f4SDimitry Andric 49480093f4SDimitry Andric case MachineOperand::MO_Register: 50480093f4SDimitry Andric if (MO.isImplicit()) 51480093f4SDimitry Andric break; 52480093f4SDimitry Andric return MCOperand::createReg(MO.getReg()); 53480093f4SDimitry Andric 54*5ffd83dbSDimitry Andric case MachineOperand::MO_ExternalSymbol: 55*5ffd83dbSDimitry Andric return LowerSymbolOperand( 56*5ffd83dbSDimitry Andric MI, MO, AP.GetExternalSymbolSymbol(MO.getSymbolName()), AP); 57*5ffd83dbSDimitry Andric case MachineOperand::MO_GlobalAddress: 58*5ffd83dbSDimitry Andric return LowerSymbolOperand(MI, MO, AP.getSymbol(MO.getGlobal()), AP); 59480093f4SDimitry Andric case MachineOperand::MO_Immediate: 60480093f4SDimitry Andric return MCOperand::createImm(MO.getImm()); 61480093f4SDimitry Andric 62480093f4SDimitry Andric case MachineOperand::MO_MachineBasicBlock: 63480093f4SDimitry Andric return LowerSymbolOperand(MI, MO, MO.getMBB()->getSymbol(), AP); 64480093f4SDimitry Andric 65480093f4SDimitry Andric case MachineOperand::MO_RegisterMask: 66480093f4SDimitry Andric break; 67480093f4SDimitry Andric } 68480093f4SDimitry Andric return MCOperand(); 69480093f4SDimitry Andric } 70480093f4SDimitry Andric 71480093f4SDimitry Andric void llvm::LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, 72480093f4SDimitry Andric AsmPrinter &AP) { 73480093f4SDimitry Andric OutMI.setOpcode(MI->getOpcode()); 74480093f4SDimitry Andric 75480093f4SDimitry Andric for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 76480093f4SDimitry Andric const MachineOperand &MO = MI->getOperand(i); 77480093f4SDimitry Andric MCOperand MCOp = LowerOperand(MI, MO, AP); 78480093f4SDimitry Andric 79480093f4SDimitry Andric if (MCOp.isValid()) 80480093f4SDimitry Andric OutMI.addOperand(MCOp); 81480093f4SDimitry Andric } 82480093f4SDimitry Andric } 83