1*480093f4SDimitry Andric //===-- VEMCInstLower.cpp - Convert VE MachineInstr to MCInst -------------===// 2*480093f4SDimitry Andric // 3*480093f4SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*480093f4SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*480093f4SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*480093f4SDimitry Andric // 7*480093f4SDimitry Andric //===----------------------------------------------------------------------===// 8*480093f4SDimitry Andric // 9*480093f4SDimitry Andric // This file contains code to lower VE MachineInstrs to their corresponding 10*480093f4SDimitry Andric // MCInst records. 11*480093f4SDimitry Andric // 12*480093f4SDimitry Andric //===----------------------------------------------------------------------===// 13*480093f4SDimitry Andric 14*480093f4SDimitry Andric #include "VE.h" 15*480093f4SDimitry Andric #include "llvm/CodeGen/AsmPrinter.h" 16*480093f4SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 17*480093f4SDimitry Andric #include "llvm/CodeGen/MachineInstr.h" 18*480093f4SDimitry Andric #include "llvm/CodeGen/MachineOperand.h" 19*480093f4SDimitry Andric #include "llvm/IR/Mangler.h" 20*480093f4SDimitry Andric #include "llvm/MC/MCAsmInfo.h" 21*480093f4SDimitry Andric #include "llvm/MC/MCContext.h" 22*480093f4SDimitry Andric #include "llvm/MC/MCExpr.h" 23*480093f4SDimitry Andric #include "llvm/MC/MCInst.h" 24*480093f4SDimitry Andric 25*480093f4SDimitry Andric using namespace llvm; 26*480093f4SDimitry Andric 27*480093f4SDimitry Andric static MCOperand LowerSymbolOperand(const MachineInstr *MI, 28*480093f4SDimitry Andric const MachineOperand &MO, 29*480093f4SDimitry Andric const MCSymbol *Symbol, AsmPrinter &AP) { 30*480093f4SDimitry Andric 31*480093f4SDimitry Andric const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::create(Symbol, AP.OutContext); 32*480093f4SDimitry Andric return MCOperand::createExpr(MCSym); 33*480093f4SDimitry Andric } 34*480093f4SDimitry Andric 35*480093f4SDimitry Andric static MCOperand LowerOperand(const MachineInstr *MI, const MachineOperand &MO, 36*480093f4SDimitry Andric AsmPrinter &AP) { 37*480093f4SDimitry Andric switch (MO.getType()) { 38*480093f4SDimitry Andric default: 39*480093f4SDimitry Andric report_fatal_error("unsupported operand type"); 40*480093f4SDimitry Andric 41*480093f4SDimitry Andric case MachineOperand::MO_Register: 42*480093f4SDimitry Andric if (MO.isImplicit()) 43*480093f4SDimitry Andric break; 44*480093f4SDimitry Andric return MCOperand::createReg(MO.getReg()); 45*480093f4SDimitry Andric 46*480093f4SDimitry Andric case MachineOperand::MO_Immediate: 47*480093f4SDimitry Andric return MCOperand::createImm(MO.getImm()); 48*480093f4SDimitry Andric 49*480093f4SDimitry Andric case MachineOperand::MO_MachineBasicBlock: 50*480093f4SDimitry Andric return LowerSymbolOperand(MI, MO, MO.getMBB()->getSymbol(), AP); 51*480093f4SDimitry Andric 52*480093f4SDimitry Andric case MachineOperand::MO_RegisterMask: 53*480093f4SDimitry Andric break; 54*480093f4SDimitry Andric } 55*480093f4SDimitry Andric return MCOperand(); 56*480093f4SDimitry Andric } 57*480093f4SDimitry Andric 58*480093f4SDimitry Andric void llvm::LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, 59*480093f4SDimitry Andric AsmPrinter &AP) { 60*480093f4SDimitry Andric OutMI.setOpcode(MI->getOpcode()); 61*480093f4SDimitry Andric 62*480093f4SDimitry Andric for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 63*480093f4SDimitry Andric const MachineOperand &MO = MI->getOperand(i); 64*480093f4SDimitry Andric MCOperand MCOp = LowerOperand(MI, MO, AP); 65*480093f4SDimitry Andric 66*480093f4SDimitry Andric if (MCOp.isValid()) 67*480093f4SDimitry Andric OutMI.addOperand(MCOp); 68*480093f4SDimitry Andric } 69*480093f4SDimitry Andric } 70