xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
10b57cec5SDimitry Andric //===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric //
90b57cec5SDimitry Andric // This file provides Sparc specific target descriptions.
100b57cec5SDimitry Andric //
110b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
120b57cec5SDimitry Andric 
130b57cec5SDimitry Andric #include "SparcMCTargetDesc.h"
140b57cec5SDimitry Andric #include "SparcInstPrinter.h"
150b57cec5SDimitry Andric #include "SparcMCAsmInfo.h"
160b57cec5SDimitry Andric #include "SparcTargetStreamer.h"
170b57cec5SDimitry Andric #include "TargetInfo/SparcTargetInfo.h"
180b57cec5SDimitry Andric #include "llvm/MC/MCInstrInfo.h"
190b57cec5SDimitry Andric #include "llvm/MC/MCRegisterInfo.h"
200b57cec5SDimitry Andric #include "llvm/MC/MCSubtargetInfo.h"
21349cc55cSDimitry Andric #include "llvm/MC/TargetRegistry.h"
220b57cec5SDimitry Andric #include "llvm/Support/ErrorHandling.h"
230b57cec5SDimitry Andric 
245f757f3fSDimitry Andric namespace llvm {
255f757f3fSDimitry Andric namespace SparcASITag {
265f757f3fSDimitry Andric #define GET_ASITagsList_IMPL
275f757f3fSDimitry Andric #include "SparcGenSearchableTables.inc"
285f757f3fSDimitry Andric } // end namespace SparcASITag
29*0fca6ea1SDimitry Andric 
30*0fca6ea1SDimitry Andric namespace SparcPrefetchTag {
31*0fca6ea1SDimitry Andric #define GET_PrefetchTagsList_IMPL
32*0fca6ea1SDimitry Andric #include "SparcGenSearchableTables.inc"
33*0fca6ea1SDimitry Andric } // end namespace SparcPrefetchTag
345f757f3fSDimitry Andric } // end namespace llvm
355f757f3fSDimitry Andric 
360b57cec5SDimitry Andric using namespace llvm;
370b57cec5SDimitry Andric 
380b57cec5SDimitry Andric #define GET_INSTRINFO_MC_DESC
39753f127fSDimitry Andric #define ENABLE_INSTR_PREDICATE_VERIFIER
400b57cec5SDimitry Andric #include "SparcGenInstrInfo.inc"
410b57cec5SDimitry Andric 
420b57cec5SDimitry Andric #define GET_SUBTARGETINFO_MC_DESC
430b57cec5SDimitry Andric #include "SparcGenSubtargetInfo.inc"
440b57cec5SDimitry Andric 
450b57cec5SDimitry Andric #define GET_REGINFO_MC_DESC
460b57cec5SDimitry Andric #include "SparcGenRegisterInfo.inc"
470b57cec5SDimitry Andric 
480b57cec5SDimitry Andric static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
49480093f4SDimitry Andric                                        const Triple &TT,
50480093f4SDimitry Andric                                        const MCTargetOptions &Options) {
510b57cec5SDimitry Andric   MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
520b57cec5SDimitry Andric   unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
535ffd83dbSDimitry Andric   MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
540b57cec5SDimitry Andric   MAI->addInitialFrameState(Inst);
550b57cec5SDimitry Andric   return MAI;
560b57cec5SDimitry Andric }
570b57cec5SDimitry Andric 
580b57cec5SDimitry Andric static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
59480093f4SDimitry Andric                                          const Triple &TT,
60480093f4SDimitry Andric                                          const MCTargetOptions &Options) {
610b57cec5SDimitry Andric   MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
620b57cec5SDimitry Andric   unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
635ffd83dbSDimitry Andric   MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 2047);
640b57cec5SDimitry Andric   MAI->addInitialFrameState(Inst);
650b57cec5SDimitry Andric   return MAI;
660b57cec5SDimitry Andric }
670b57cec5SDimitry Andric 
680b57cec5SDimitry Andric static MCInstrInfo *createSparcMCInstrInfo() {
690b57cec5SDimitry Andric   MCInstrInfo *X = new MCInstrInfo();
700b57cec5SDimitry Andric   InitSparcMCInstrInfo(X);
710b57cec5SDimitry Andric   return X;
720b57cec5SDimitry Andric }
730b57cec5SDimitry Andric 
740b57cec5SDimitry Andric static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) {
750b57cec5SDimitry Andric   MCRegisterInfo *X = new MCRegisterInfo();
760b57cec5SDimitry Andric   InitSparcMCRegisterInfo(X, SP::O7);
770b57cec5SDimitry Andric   return X;
780b57cec5SDimitry Andric }
790b57cec5SDimitry Andric 
800b57cec5SDimitry Andric static MCSubtargetInfo *
810b57cec5SDimitry Andric createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
820b57cec5SDimitry Andric   if (CPU.empty())
830b57cec5SDimitry Andric     CPU = (TT.getArch() == Triple::sparcv9) ? "v9" : "v8";
84e8d8bef9SDimitry Andric   return createSparcMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
850b57cec5SDimitry Andric }
860b57cec5SDimitry Andric 
870b57cec5SDimitry Andric static MCTargetStreamer *
880b57cec5SDimitry Andric createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
890b57cec5SDimitry Andric   return new SparcTargetELFStreamer(S);
900b57cec5SDimitry Andric }
910b57cec5SDimitry Andric 
920b57cec5SDimitry Andric static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
930b57cec5SDimitry Andric                                                  formatted_raw_ostream &OS,
94*0fca6ea1SDimitry Andric                                                  MCInstPrinter *InstPrint) {
950b57cec5SDimitry Andric   return new SparcTargetAsmStreamer(S, OS);
960b57cec5SDimitry Andric }
970b57cec5SDimitry Andric 
98bdd1243dSDimitry Andric static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) {
99bdd1243dSDimitry Andric   return new SparcTargetStreamer(S);
100bdd1243dSDimitry Andric }
101bdd1243dSDimitry Andric 
1020b57cec5SDimitry Andric static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
1030b57cec5SDimitry Andric                                                unsigned SyntaxVariant,
1040b57cec5SDimitry Andric                                                const MCAsmInfo &MAI,
1050b57cec5SDimitry Andric                                                const MCInstrInfo &MII,
1060b57cec5SDimitry Andric                                                const MCRegisterInfo &MRI) {
1070b57cec5SDimitry Andric   return new SparcInstPrinter(MAI, MII, MRI);
1080b57cec5SDimitry Andric }
1090b57cec5SDimitry Andric 
110480093f4SDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTargetMC() {
1110b57cec5SDimitry Andric   // Register the MC asm info.
1120b57cec5SDimitry Andric   RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo);
1130b57cec5SDimitry Andric   RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo);
1140b57cec5SDimitry Andric   RegisterMCAsmInfoFn Z(getTheSparcelTarget(), createSparcMCAsmInfo);
1150b57cec5SDimitry Andric 
1160b57cec5SDimitry Andric   for (Target *T :
1170b57cec5SDimitry Andric        {&getTheSparcTarget(), &getTheSparcV9Target(), &getTheSparcelTarget()}) {
1180b57cec5SDimitry Andric     // Register the MC instruction info.
1190b57cec5SDimitry Andric     TargetRegistry::RegisterMCInstrInfo(*T, createSparcMCInstrInfo);
1200b57cec5SDimitry Andric 
1210b57cec5SDimitry Andric     // Register the MC register info.
1220b57cec5SDimitry Andric     TargetRegistry::RegisterMCRegInfo(*T, createSparcMCRegisterInfo);
1230b57cec5SDimitry Andric 
1240b57cec5SDimitry Andric     // Register the MC subtarget info.
1250b57cec5SDimitry Andric     TargetRegistry::RegisterMCSubtargetInfo(*T, createSparcMCSubtargetInfo);
1260b57cec5SDimitry Andric 
1270b57cec5SDimitry Andric     // Register the MC Code Emitter.
1280b57cec5SDimitry Andric     TargetRegistry::RegisterMCCodeEmitter(*T, createSparcMCCodeEmitter);
1290b57cec5SDimitry Andric 
1300b57cec5SDimitry Andric     // Register the asm backend.
1310b57cec5SDimitry Andric     TargetRegistry::RegisterMCAsmBackend(*T, createSparcAsmBackend);
1320b57cec5SDimitry Andric 
1330b57cec5SDimitry Andric     // Register the object target streamer.
1340b57cec5SDimitry Andric     TargetRegistry::RegisterObjectTargetStreamer(*T,
1350b57cec5SDimitry Andric                                                  createObjectTargetStreamer);
1360b57cec5SDimitry Andric 
1370b57cec5SDimitry Andric     // Register the asm streamer.
1380b57cec5SDimitry Andric     TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
1390b57cec5SDimitry Andric 
140bdd1243dSDimitry Andric     // Register the null streamer.
141bdd1243dSDimitry Andric     TargetRegistry::RegisterNullTargetStreamer(*T, createNullTargetStreamer);
142bdd1243dSDimitry Andric 
1430b57cec5SDimitry Andric     // Register the MCInstPrinter
1440b57cec5SDimitry Andric     TargetRegistry::RegisterMCInstPrinter(*T, createSparcMCInstPrinter);
1450b57cec5SDimitry Andric   }
1460b57cec5SDimitry Andric }
147