181ad6265SDimitry Andric //===-- SPIRVAsmBackend.cpp - SPIR-V Assembler Backend ---------*- C++ -*--===// 281ad6265SDimitry Andric // 381ad6265SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 481ad6265SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 581ad6265SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 681ad6265SDimitry Andric // 781ad6265SDimitry Andric //===----------------------------------------------------------------------===// 881ad6265SDimitry Andric 981ad6265SDimitry Andric #include "MCTargetDesc/SPIRVMCTargetDesc.h" 1081ad6265SDimitry Andric #include "llvm/MC/MCAsmBackend.h" 1181ad6265SDimitry Andric #include "llvm/MC/MCAssembler.h" 1281ad6265SDimitry Andric #include "llvm/MC/MCObjectWriter.h" 1381ad6265SDimitry Andric #include "llvm/Support/EndianStream.h" 1481ad6265SDimitry Andric 1581ad6265SDimitry Andric using namespace llvm; 1681ad6265SDimitry Andric 1781ad6265SDimitry Andric namespace { 1881ad6265SDimitry Andric 1981ad6265SDimitry Andric class SPIRVAsmBackend : public MCAsmBackend { 2081ad6265SDimitry Andric public: 21*5f757f3fSDimitry Andric SPIRVAsmBackend(llvm::endianness Endian) : MCAsmBackend(Endian) {} 2281ad6265SDimitry Andric 2381ad6265SDimitry Andric void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 2481ad6265SDimitry Andric const MCValue &Target, MutableArrayRef<char> Data, 2581ad6265SDimitry Andric uint64_t Value, bool IsResolved, 2681ad6265SDimitry Andric const MCSubtargetInfo *STI) const override {} 2781ad6265SDimitry Andric 2881ad6265SDimitry Andric std::unique_ptr<MCObjectTargetWriter> 2981ad6265SDimitry Andric createObjectTargetWriter() const override { 3081ad6265SDimitry Andric return createSPIRVObjectTargetWriter(); 3181ad6265SDimitry Andric } 3281ad6265SDimitry Andric 3381ad6265SDimitry Andric unsigned getNumFixupKinds() const override { return 1; } 3481ad6265SDimitry Andric 3581ad6265SDimitry Andric bool mayNeedRelaxation(const MCInst &Inst, 3681ad6265SDimitry Andric const MCSubtargetInfo &STI) const override { 3781ad6265SDimitry Andric return false; 3881ad6265SDimitry Andric } 3981ad6265SDimitry Andric 4081ad6265SDimitry Andric void relaxInstruction(MCInst &Inst, 4181ad6265SDimitry Andric const MCSubtargetInfo &STI) const override {} 4281ad6265SDimitry Andric 4381ad6265SDimitry Andric bool writeNopData(raw_ostream &OS, uint64_t Count, 4481ad6265SDimitry Andric const MCSubtargetInfo *STI) const override { 4581ad6265SDimitry Andric return false; 4681ad6265SDimitry Andric } 4781ad6265SDimitry Andric }; 4881ad6265SDimitry Andric 4981ad6265SDimitry Andric } // end anonymous namespace 5081ad6265SDimitry Andric 5181ad6265SDimitry Andric MCAsmBackend *llvm::createSPIRVAsmBackend(const Target &T, 5281ad6265SDimitry Andric const MCSubtargetInfo &STI, 5381ad6265SDimitry Andric const MCRegisterInfo &MRI, 5481ad6265SDimitry Andric const MCTargetOptions &) { 55*5f757f3fSDimitry Andric return new SPIRVAsmBackend(llvm::endianness::little); 5681ad6265SDimitry Andric } 57