106c3fb27SDimitry Andric//===-- RISCVProcessors.td - RISC-V Processors -------------*- tablegen -*-===// 2bdd1243dSDimitry Andric// 3bdd1243dSDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4bdd1243dSDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5bdd1243dSDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6bdd1243dSDimitry Andric// 7bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 8bdd1243dSDimitry Andric 9bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 10bdd1243dSDimitry Andric// RISC-V processors supported. 11bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 12bdd1243dSDimitry Andric 135f757f3fSDimitry Andricclass RISCVTuneInfo { 145f757f3fSDimitry Andric bits<8> PrefFunctionAlignment = 1; 155f757f3fSDimitry Andric bits<8> PrefLoopAlignment = 1; 165f757f3fSDimitry Andric 175f757f3fSDimitry Andric // Information needed by LoopDataPrefetch. 185f757f3fSDimitry Andric bits<16> CacheLineSize = 0; 195f757f3fSDimitry Andric bits<16> PrefetchDistance = 0; 205f757f3fSDimitry Andric bits<16> MinPrefetchStride = 1; 215f757f3fSDimitry Andric bits<32> MaxPrefetchIterationsAhead = -1; 225f757f3fSDimitry Andric 235f757f3fSDimitry Andric bits<32> MinimumJumpTableEntries = 5; 245f757f3fSDimitry Andric} 255f757f3fSDimitry Andric 265f757f3fSDimitry Andricdef RISCVTuneInfoTable : GenericTable { 275f757f3fSDimitry Andric let FilterClass = "RISCVTuneInfo"; 285f757f3fSDimitry Andric let CppTypeName = "RISCVTuneInfo"; 295f757f3fSDimitry Andric let Fields = ["Name", "PrefFunctionAlignment", "PrefLoopAlignment", 305f757f3fSDimitry Andric "CacheLineSize", "PrefetchDistance", 315f757f3fSDimitry Andric "MinPrefetchStride", "MaxPrefetchIterationsAhead", 325f757f3fSDimitry Andric "MinimumJumpTableEntries"]; 335f757f3fSDimitry Andric} 345f757f3fSDimitry Andric 355f757f3fSDimitry Andricdef getRISCVTuneInfo : SearchIndex { 365f757f3fSDimitry Andric let Table = RISCVTuneInfoTable; 375f757f3fSDimitry Andric let Key = ["Name"]; 385f757f3fSDimitry Andric} 395f757f3fSDimitry Andric 405f757f3fSDimitry Andricclass GenericTuneInfo: RISCVTuneInfo; 415f757f3fSDimitry Andric 42bdd1243dSDimitry Andricclass RISCVProcessorModel<string n, 43bdd1243dSDimitry Andric SchedMachineModel m, 44bdd1243dSDimitry Andric list<SubtargetFeature> f, 45bdd1243dSDimitry Andric list<SubtargetFeature> tunef = [], 46bdd1243dSDimitry Andric string default_march = ""> 47bdd1243dSDimitry Andric : ProcessorModel<n, m, f, tunef> { 48bdd1243dSDimitry Andric string DefaultMarch = default_march; 49bdd1243dSDimitry Andric} 50bdd1243dSDimitry Andric 51bdd1243dSDimitry Andricclass RISCVTuneProcessorModel<string n, 52bdd1243dSDimitry Andric SchedMachineModel m, 53bdd1243dSDimitry Andric list<SubtargetFeature> tunef = [], 54bdd1243dSDimitry Andric list<SubtargetFeature> f = []> 55bdd1243dSDimitry Andric : ProcessorModel<n, m, f,tunef>; 56bdd1243dSDimitry Andric 57bdd1243dSDimitry Andricdef GENERIC_RV32 : RISCVProcessorModel<"generic-rv32", 58bdd1243dSDimitry Andric NoSchedModel, 595f757f3fSDimitry Andric [Feature32Bit]>, 605f757f3fSDimitry Andric GenericTuneInfo; 61bdd1243dSDimitry Andricdef GENERIC_RV64 : RISCVProcessorModel<"generic-rv64", 62bdd1243dSDimitry Andric NoSchedModel, 635f757f3fSDimitry Andric [Feature64Bit]>, 645f757f3fSDimitry Andric GenericTuneInfo; 65bdd1243dSDimitry Andric// Support generic for compatibility with other targets. The triple will be used 66bdd1243dSDimitry Andric// to change to the appropriate rv32/rv64 version. 675f757f3fSDimitry Andricdef : ProcessorModel<"generic", NoSchedModel, []>, GenericTuneInfo; 68bdd1243dSDimitry Andric 69bdd1243dSDimitry Andricdef ROCKET_RV32 : RISCVProcessorModel<"rocket-rv32", 70bdd1243dSDimitry Andric RocketModel, 7106c3fb27SDimitry Andric [Feature32Bit, 7206c3fb27SDimitry Andric FeatureStdExtZifencei, 7306c3fb27SDimitry Andric FeatureStdExtZicsr]>; 74bdd1243dSDimitry Andricdef ROCKET_RV64 : RISCVProcessorModel<"rocket-rv64", 75bdd1243dSDimitry Andric RocketModel, 7606c3fb27SDimitry Andric [Feature64Bit, 7706c3fb27SDimitry Andric FeatureStdExtZifencei, 7806c3fb27SDimitry Andric FeatureStdExtZicsr]>; 79bdd1243dSDimitry Andricdef ROCKET : RISCVTuneProcessorModel<"rocket", 80bdd1243dSDimitry Andric RocketModel>; 81bdd1243dSDimitry Andric 82bdd1243dSDimitry Andricdef SIFIVE_7 : RISCVTuneProcessorModel<"sifive-7-series", 83bdd1243dSDimitry Andric SiFive7Model, 84bdd1243dSDimitry Andric [TuneSiFive7]>; 85bdd1243dSDimitry Andric 86bdd1243dSDimitry Andricdef SIFIVE_E20 : RISCVProcessorModel<"sifive-e20", 87bdd1243dSDimitry Andric RocketModel, 88bdd1243dSDimitry Andric [Feature32Bit, 8906c3fb27SDimitry Andric FeatureStdExtZicsr, 9006c3fb27SDimitry Andric FeatureStdExtZifencei, 91bdd1243dSDimitry Andric FeatureStdExtM, 92bdd1243dSDimitry Andric FeatureStdExtC]>; 93bdd1243dSDimitry Andric 94bdd1243dSDimitry Andricdef SIFIVE_E21 : RISCVProcessorModel<"sifive-e21", 95bdd1243dSDimitry Andric RocketModel, 96bdd1243dSDimitry Andric [Feature32Bit, 9706c3fb27SDimitry Andric FeatureStdExtZicsr, 9806c3fb27SDimitry Andric FeatureStdExtZifencei, 99bdd1243dSDimitry Andric FeatureStdExtM, 100bdd1243dSDimitry Andric FeatureStdExtA, 101bdd1243dSDimitry Andric FeatureStdExtC]>; 102bdd1243dSDimitry Andric 103bdd1243dSDimitry Andricdef SIFIVE_E24 : RISCVProcessorModel<"sifive-e24", 104bdd1243dSDimitry Andric RocketModel, 105bdd1243dSDimitry Andric [Feature32Bit, 10606c3fb27SDimitry Andric FeatureStdExtZifencei, 107bdd1243dSDimitry Andric FeatureStdExtM, 108bdd1243dSDimitry Andric FeatureStdExtA, 109bdd1243dSDimitry Andric FeatureStdExtF, 110bdd1243dSDimitry Andric FeatureStdExtC]>; 111bdd1243dSDimitry Andric 112bdd1243dSDimitry Andricdef SIFIVE_E31 : RISCVProcessorModel<"sifive-e31", 113bdd1243dSDimitry Andric RocketModel, 114bdd1243dSDimitry Andric [Feature32Bit, 11506c3fb27SDimitry Andric FeatureStdExtZifencei, 11606c3fb27SDimitry Andric FeatureStdExtZicsr, 117bdd1243dSDimitry Andric FeatureStdExtM, 118bdd1243dSDimitry Andric FeatureStdExtA, 119bdd1243dSDimitry Andric FeatureStdExtC]>; 120bdd1243dSDimitry Andric 121bdd1243dSDimitry Andricdef SIFIVE_E34 : RISCVProcessorModel<"sifive-e34", 122bdd1243dSDimitry Andric RocketModel, 123bdd1243dSDimitry Andric [Feature32Bit, 12406c3fb27SDimitry Andric FeatureStdExtZifencei, 125bdd1243dSDimitry Andric FeatureStdExtM, 126bdd1243dSDimitry Andric FeatureStdExtA, 127bdd1243dSDimitry Andric FeatureStdExtF, 128bdd1243dSDimitry Andric FeatureStdExtC]>; 129bdd1243dSDimitry Andric 130bdd1243dSDimitry Andricdef SIFIVE_E76 : RISCVProcessorModel<"sifive-e76", 131bdd1243dSDimitry Andric SiFive7Model, 132bdd1243dSDimitry Andric [Feature32Bit, 13306c3fb27SDimitry Andric FeatureStdExtZifencei, 134bdd1243dSDimitry Andric FeatureStdExtM, 135bdd1243dSDimitry Andric FeatureStdExtA, 136bdd1243dSDimitry Andric FeatureStdExtF, 137bdd1243dSDimitry Andric FeatureStdExtC], 138bdd1243dSDimitry Andric [TuneSiFive7]>; 139bdd1243dSDimitry Andric 140bdd1243dSDimitry Andricdef SIFIVE_S21 : RISCVProcessorModel<"sifive-s21", 141bdd1243dSDimitry Andric RocketModel, 142bdd1243dSDimitry Andric [Feature64Bit, 14306c3fb27SDimitry Andric FeatureStdExtZicsr, 14406c3fb27SDimitry Andric FeatureStdExtZifencei, 145bdd1243dSDimitry Andric FeatureStdExtM, 146bdd1243dSDimitry Andric FeatureStdExtA, 147bdd1243dSDimitry Andric FeatureStdExtC]>; 148bdd1243dSDimitry Andric 149bdd1243dSDimitry Andricdef SIFIVE_S51 : RISCVProcessorModel<"sifive-s51", 150bdd1243dSDimitry Andric RocketModel, 151bdd1243dSDimitry Andric [Feature64Bit, 15206c3fb27SDimitry Andric FeatureStdExtZicsr, 15306c3fb27SDimitry Andric FeatureStdExtZifencei, 154bdd1243dSDimitry Andric FeatureStdExtM, 155bdd1243dSDimitry Andric FeatureStdExtA, 156bdd1243dSDimitry Andric FeatureStdExtC]>; 157bdd1243dSDimitry Andric 158bdd1243dSDimitry Andricdef SIFIVE_S54 : RISCVProcessorModel<"sifive-s54", 159bdd1243dSDimitry Andric RocketModel, 160bdd1243dSDimitry Andric [Feature64Bit, 16106c3fb27SDimitry Andric FeatureStdExtZifencei, 162bdd1243dSDimitry Andric FeatureStdExtM, 163bdd1243dSDimitry Andric FeatureStdExtA, 164bdd1243dSDimitry Andric FeatureStdExtF, 165bdd1243dSDimitry Andric FeatureStdExtD, 166bdd1243dSDimitry Andric FeatureStdExtC]>; 167bdd1243dSDimitry Andric 168bdd1243dSDimitry Andricdef SIFIVE_S76 : RISCVProcessorModel<"sifive-s76", 169bdd1243dSDimitry Andric SiFive7Model, 170bdd1243dSDimitry Andric [Feature64Bit, 17106c3fb27SDimitry Andric FeatureStdExtZifencei, 172bdd1243dSDimitry Andric FeatureStdExtM, 173bdd1243dSDimitry Andric FeatureStdExtA, 174bdd1243dSDimitry Andric FeatureStdExtF, 175bdd1243dSDimitry Andric FeatureStdExtD, 17606c3fb27SDimitry Andric FeatureStdExtC, 177*647cbc5dSDimitry Andric FeatureStdExtZihintpause], 178bdd1243dSDimitry Andric [TuneSiFive7]>; 179bdd1243dSDimitry Andric 180bdd1243dSDimitry Andricdef SIFIVE_U54 : RISCVProcessorModel<"sifive-u54", 181bdd1243dSDimitry Andric RocketModel, 182bdd1243dSDimitry Andric [Feature64Bit, 18306c3fb27SDimitry Andric FeatureStdExtZifencei, 184bdd1243dSDimitry Andric FeatureStdExtM, 185bdd1243dSDimitry Andric FeatureStdExtA, 186bdd1243dSDimitry Andric FeatureStdExtF, 187bdd1243dSDimitry Andric FeatureStdExtD, 188bdd1243dSDimitry Andric FeatureStdExtC]>; 189bdd1243dSDimitry Andric 190bdd1243dSDimitry Andricdef SIFIVE_U74 : RISCVProcessorModel<"sifive-u74", 191bdd1243dSDimitry Andric SiFive7Model, 192bdd1243dSDimitry Andric [Feature64Bit, 19306c3fb27SDimitry Andric FeatureStdExtZifencei, 194bdd1243dSDimitry Andric FeatureStdExtM, 195bdd1243dSDimitry Andric FeatureStdExtA, 196bdd1243dSDimitry Andric FeatureStdExtF, 197bdd1243dSDimitry Andric FeatureStdExtD, 198bdd1243dSDimitry Andric FeatureStdExtC], 199bdd1243dSDimitry Andric [TuneSiFive7]>; 200bdd1243dSDimitry Andric 20106c3fb27SDimitry Andricdef SIFIVE_X280 : RISCVProcessorModel<"sifive-x280", SiFive7Model, 20206c3fb27SDimitry Andric [Feature64Bit, 20306c3fb27SDimitry Andric FeatureStdExtZifencei, 20406c3fb27SDimitry Andric FeatureStdExtM, 20506c3fb27SDimitry Andric FeatureStdExtA, 20606c3fb27SDimitry Andric FeatureStdExtF, 20706c3fb27SDimitry Andric FeatureStdExtD, 20806c3fb27SDimitry Andric FeatureStdExtC, 20906c3fb27SDimitry Andric FeatureStdExtV, 21006c3fb27SDimitry Andric FeatureStdExtZvl512b, 21106c3fb27SDimitry Andric FeatureStdExtZfh, 21206c3fb27SDimitry Andric FeatureStdExtZvfh, 21306c3fb27SDimitry Andric FeatureStdExtZba, 21406c3fb27SDimitry Andric FeatureStdExtZbb], 21506c3fb27SDimitry Andric [TuneSiFive7, 21606c3fb27SDimitry Andric TuneDLenFactor2]>; 21706c3fb27SDimitry Andric 218cb14a3feSDimitry Andricdef SIFIVE_P450 : RISCVProcessorModel<"sifive-p450", NoSchedModel, 219cb14a3feSDimitry Andric [Feature64Bit, 220cb14a3feSDimitry Andric FeatureStdExtZifencei, 221cb14a3feSDimitry Andric FeatureStdExtM, 222cb14a3feSDimitry Andric FeatureStdExtA, 223cb14a3feSDimitry Andric FeatureStdExtF, 224cb14a3feSDimitry Andric FeatureStdExtD, 225cb14a3feSDimitry Andric FeatureStdExtC, 226cb14a3feSDimitry Andric FeatureStdExtZicbop, 227cb14a3feSDimitry Andric FeatureStdExtZicbom, 228cb14a3feSDimitry Andric FeatureStdExtZicboz, 229cb14a3feSDimitry Andric FeatureStdExtZihintntl, 230cb14a3feSDimitry Andric FeatureStdExtZihintpause, 231cb14a3feSDimitry Andric FeatureStdExtZihpm, 232cb14a3feSDimitry Andric FeatureStdExtZba, 233cb14a3feSDimitry Andric FeatureStdExtZbb, 234cb14a3feSDimitry Andric FeatureStdExtZbs, 235cb14a3feSDimitry Andric FeatureStdExtZfhmin]>; 236cb14a3feSDimitry Andric 237bdd1243dSDimitry Andricdef SYNTACORE_SCR1_BASE : RISCVProcessorModel<"syntacore-scr1-base", 238bdd1243dSDimitry Andric SyntacoreSCR1Model, 239bdd1243dSDimitry Andric [Feature32Bit, 24006c3fb27SDimitry Andric FeatureStdExtZicsr, 24106c3fb27SDimitry Andric FeatureStdExtZifencei, 242bdd1243dSDimitry Andric FeatureStdExtC], 243bdd1243dSDimitry Andric [TuneNoDefaultUnroll]>; 244bdd1243dSDimitry Andric 245bdd1243dSDimitry Andricdef SYNTACORE_SCR1_MAX : RISCVProcessorModel<"syntacore-scr1-max", 246bdd1243dSDimitry Andric SyntacoreSCR1Model, 247bdd1243dSDimitry Andric [Feature32Bit, 24806c3fb27SDimitry Andric FeatureStdExtZicsr, 24906c3fb27SDimitry Andric FeatureStdExtZifencei, 250bdd1243dSDimitry Andric FeatureStdExtM, 251bdd1243dSDimitry Andric FeatureStdExtC], 252bdd1243dSDimitry Andric [TuneNoDefaultUnroll]>; 2535f757f3fSDimitry Andric 2545f757f3fSDimitry Andricdef VENTANA_VEYRON_V1 : RISCVProcessorModel<"veyron-v1", 2555f757f3fSDimitry Andric NoSchedModel, 2565f757f3fSDimitry Andric [Feature64Bit, 2575f757f3fSDimitry Andric FeatureStdExtZifencei, 2585f757f3fSDimitry Andric FeatureStdExtZicsr, 2595f757f3fSDimitry Andric FeatureStdExtZicntr, 2605f757f3fSDimitry Andric FeatureStdExtZihpm, 2615f757f3fSDimitry Andric FeatureStdExtZihintpause, 2625f757f3fSDimitry Andric FeatureStdExtM, 2635f757f3fSDimitry Andric FeatureStdExtA, 2645f757f3fSDimitry Andric FeatureStdExtF, 2655f757f3fSDimitry Andric FeatureStdExtD, 2665f757f3fSDimitry Andric FeatureStdExtC, 2675f757f3fSDimitry Andric FeatureStdExtZba, 2685f757f3fSDimitry Andric FeatureStdExtZbb, 2695f757f3fSDimitry Andric FeatureStdExtZbc, 2705f757f3fSDimitry Andric FeatureStdExtZbs, 2715f757f3fSDimitry Andric FeatureStdExtZicbom, 2725f757f3fSDimitry Andric FeatureStdExtZicbop, 2735f757f3fSDimitry Andric FeatureStdExtZicboz, 2745f757f3fSDimitry Andric FeatureVendorXVentanaCondOps], 275cb14a3feSDimitry Andric [TuneVentanaVeyron, 276cb14a3feSDimitry Andric TuneLUIADDIFusion, 277cb14a3feSDimitry Andric TuneAUIPCADDIFusion, 278cb14a3feSDimitry Andric TuneZExtHFusion, 279cb14a3feSDimitry Andric TuneZExtWFusion, 280cb14a3feSDimitry Andric TuneShiftedZExtWFusion, 281cb14a3feSDimitry Andric TuneLDADDFusion]>; 2825f757f3fSDimitry Andric 2835f757f3fSDimitry Andricdef XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", 2845f757f3fSDimitry Andric NoSchedModel, 2855f757f3fSDimitry Andric [Feature64Bit, 2865f757f3fSDimitry Andric FeatureStdExtZicsr, 2875f757f3fSDimitry Andric FeatureStdExtZifencei, 2885f757f3fSDimitry Andric FeatureStdExtM, 2895f757f3fSDimitry Andric FeatureStdExtA, 2905f757f3fSDimitry Andric FeatureStdExtF, 2915f757f3fSDimitry Andric FeatureStdExtD, 2925f757f3fSDimitry Andric FeatureStdExtC, 2935f757f3fSDimitry Andric FeatureStdExtZba, 2945f757f3fSDimitry Andric FeatureStdExtZbb, 2955f757f3fSDimitry Andric FeatureStdExtZbc, 2965f757f3fSDimitry Andric FeatureStdExtZbs, 2975f757f3fSDimitry Andric FeatureStdExtZkn, 2985f757f3fSDimitry Andric FeatureStdExtZksed, 2995f757f3fSDimitry Andric FeatureStdExtZksh, 3005f757f3fSDimitry Andric FeatureStdExtSvinval, 3015f757f3fSDimitry Andric FeatureStdExtZicbom, 3025f757f3fSDimitry Andric FeatureStdExtZicboz]>; 303