106c3fb27SDimitry Andric//===-- RISCVProcessors.td - RISC-V Processors -------------*- tablegen -*-===// 2bdd1243dSDimitry Andric// 3bdd1243dSDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4bdd1243dSDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5bdd1243dSDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6bdd1243dSDimitry Andric// 7bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 8bdd1243dSDimitry Andric 9bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 10bdd1243dSDimitry Andric// RISC-V processors supported. 11bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 12bdd1243dSDimitry Andric 135f757f3fSDimitry Andricclass RISCVTuneInfo { 145f757f3fSDimitry Andric bits<8> PrefFunctionAlignment = 1; 155f757f3fSDimitry Andric bits<8> PrefLoopAlignment = 1; 165f757f3fSDimitry Andric 175f757f3fSDimitry Andric // Information needed by LoopDataPrefetch. 185f757f3fSDimitry Andric bits<16> CacheLineSize = 0; 195f757f3fSDimitry Andric bits<16> PrefetchDistance = 0; 205f757f3fSDimitry Andric bits<16> MinPrefetchStride = 1; 215f757f3fSDimitry Andric bits<32> MaxPrefetchIterationsAhead = -1; 225f757f3fSDimitry Andric 235f757f3fSDimitry Andric bits<32> MinimumJumpTableEntries = 5; 245f757f3fSDimitry Andric} 255f757f3fSDimitry Andric 265f757f3fSDimitry Andricdef RISCVTuneInfoTable : GenericTable { 275f757f3fSDimitry Andric let FilterClass = "RISCVTuneInfo"; 285f757f3fSDimitry Andric let CppTypeName = "RISCVTuneInfo"; 295f757f3fSDimitry Andric let Fields = ["Name", "PrefFunctionAlignment", "PrefLoopAlignment", 305f757f3fSDimitry Andric "CacheLineSize", "PrefetchDistance", 315f757f3fSDimitry Andric "MinPrefetchStride", "MaxPrefetchIterationsAhead", 325f757f3fSDimitry Andric "MinimumJumpTableEntries"]; 335f757f3fSDimitry Andric} 345f757f3fSDimitry Andric 355f757f3fSDimitry Andricdef getRISCVTuneInfo : SearchIndex { 365f757f3fSDimitry Andric let Table = RISCVTuneInfoTable; 375f757f3fSDimitry Andric let Key = ["Name"]; 385f757f3fSDimitry Andric} 395f757f3fSDimitry Andric 405f757f3fSDimitry Andricclass GenericTuneInfo: RISCVTuneInfo; 415f757f3fSDimitry Andric 42bdd1243dSDimitry Andricclass RISCVProcessorModel<string n, 43bdd1243dSDimitry Andric SchedMachineModel m, 44bdd1243dSDimitry Andric list<SubtargetFeature> f, 45bdd1243dSDimitry Andric list<SubtargetFeature> tunef = [], 46bdd1243dSDimitry Andric string default_march = ""> 47bdd1243dSDimitry Andric : ProcessorModel<n, m, f, tunef> { 48bdd1243dSDimitry Andric string DefaultMarch = default_march; 49bdd1243dSDimitry Andric} 50bdd1243dSDimitry Andric 51bdd1243dSDimitry Andricclass RISCVTuneProcessorModel<string n, 52bdd1243dSDimitry Andric SchedMachineModel m, 53bdd1243dSDimitry Andric list<SubtargetFeature> tunef = [], 54bdd1243dSDimitry Andric list<SubtargetFeature> f = []> 55bdd1243dSDimitry Andric : ProcessorModel<n, m, f,tunef>; 56bdd1243dSDimitry Andric 57bdd1243dSDimitry Andricdef GENERIC_RV32 : RISCVProcessorModel<"generic-rv32", 58bdd1243dSDimitry Andric NoSchedModel, 59*0fca6ea1SDimitry Andric [Feature32Bit, 60*0fca6ea1SDimitry Andric FeatureStdExtI]>, 615f757f3fSDimitry Andric GenericTuneInfo; 62bdd1243dSDimitry Andricdef GENERIC_RV64 : RISCVProcessorModel<"generic-rv64", 63bdd1243dSDimitry Andric NoSchedModel, 64*0fca6ea1SDimitry Andric [Feature64Bit, 65*0fca6ea1SDimitry Andric FeatureStdExtI]>, 665f757f3fSDimitry Andric GenericTuneInfo; 67bdd1243dSDimitry Andric// Support generic for compatibility with other targets. The triple will be used 68bdd1243dSDimitry Andric// to change to the appropriate rv32/rv64 version. 69*0fca6ea1SDimitry Andricdef GENERIC : RISCVTuneProcessorModel<"generic", NoSchedModel>, GenericTuneInfo; 70bdd1243dSDimitry Andric 71bdd1243dSDimitry Andricdef ROCKET_RV32 : RISCVProcessorModel<"rocket-rv32", 72bdd1243dSDimitry Andric RocketModel, 7306c3fb27SDimitry Andric [Feature32Bit, 74*0fca6ea1SDimitry Andric FeatureStdExtI, 7506c3fb27SDimitry Andric FeatureStdExtZifencei, 7606c3fb27SDimitry Andric FeatureStdExtZicsr]>; 77bdd1243dSDimitry Andricdef ROCKET_RV64 : RISCVProcessorModel<"rocket-rv64", 78bdd1243dSDimitry Andric RocketModel, 7906c3fb27SDimitry Andric [Feature64Bit, 80*0fca6ea1SDimitry Andric FeatureStdExtI, 8106c3fb27SDimitry Andric FeatureStdExtZifencei, 8206c3fb27SDimitry Andric FeatureStdExtZicsr]>; 83bdd1243dSDimitry Andricdef ROCKET : RISCVTuneProcessorModel<"rocket", 84bdd1243dSDimitry Andric RocketModel>; 85bdd1243dSDimitry Andric 86bdd1243dSDimitry Andricdef SIFIVE_7 : RISCVTuneProcessorModel<"sifive-7-series", 87bdd1243dSDimitry Andric SiFive7Model, 88*0fca6ea1SDimitry Andric [TuneSiFive7, FeaturePostRAScheduler]>; 89bdd1243dSDimitry Andric 90bdd1243dSDimitry Andricdef SIFIVE_E20 : RISCVProcessorModel<"sifive-e20", 91bdd1243dSDimitry Andric RocketModel, 92bdd1243dSDimitry Andric [Feature32Bit, 93*0fca6ea1SDimitry Andric FeatureStdExtI, 9406c3fb27SDimitry Andric FeatureStdExtZicsr, 9506c3fb27SDimitry Andric FeatureStdExtZifencei, 96bdd1243dSDimitry Andric FeatureStdExtM, 97bdd1243dSDimitry Andric FeatureStdExtC]>; 98bdd1243dSDimitry Andric 99bdd1243dSDimitry Andricdef SIFIVE_E21 : RISCVProcessorModel<"sifive-e21", 100bdd1243dSDimitry Andric RocketModel, 101bdd1243dSDimitry Andric [Feature32Bit, 102*0fca6ea1SDimitry Andric FeatureStdExtI, 10306c3fb27SDimitry Andric FeatureStdExtZicsr, 10406c3fb27SDimitry Andric FeatureStdExtZifencei, 105bdd1243dSDimitry Andric FeatureStdExtM, 106bdd1243dSDimitry Andric FeatureStdExtA, 107bdd1243dSDimitry Andric FeatureStdExtC]>; 108bdd1243dSDimitry Andric 109bdd1243dSDimitry Andricdef SIFIVE_E24 : RISCVProcessorModel<"sifive-e24", 110bdd1243dSDimitry Andric RocketModel, 111bdd1243dSDimitry Andric [Feature32Bit, 112*0fca6ea1SDimitry Andric FeatureStdExtI, 11306c3fb27SDimitry Andric FeatureStdExtZifencei, 114bdd1243dSDimitry Andric FeatureStdExtM, 115bdd1243dSDimitry Andric FeatureStdExtA, 116bdd1243dSDimitry Andric FeatureStdExtF, 117bdd1243dSDimitry Andric FeatureStdExtC]>; 118bdd1243dSDimitry Andric 119bdd1243dSDimitry Andricdef SIFIVE_E31 : RISCVProcessorModel<"sifive-e31", 120bdd1243dSDimitry Andric RocketModel, 121bdd1243dSDimitry Andric [Feature32Bit, 122*0fca6ea1SDimitry Andric FeatureStdExtI, 12306c3fb27SDimitry Andric FeatureStdExtZifencei, 12406c3fb27SDimitry Andric FeatureStdExtZicsr, 125bdd1243dSDimitry Andric FeatureStdExtM, 126bdd1243dSDimitry Andric FeatureStdExtA, 127bdd1243dSDimitry Andric FeatureStdExtC]>; 128bdd1243dSDimitry Andric 129bdd1243dSDimitry Andricdef SIFIVE_E34 : RISCVProcessorModel<"sifive-e34", 130bdd1243dSDimitry Andric RocketModel, 131bdd1243dSDimitry Andric [Feature32Bit, 132*0fca6ea1SDimitry Andric FeatureStdExtI, 13306c3fb27SDimitry Andric FeatureStdExtZifencei, 134bdd1243dSDimitry Andric FeatureStdExtM, 135bdd1243dSDimitry Andric FeatureStdExtA, 136bdd1243dSDimitry Andric FeatureStdExtF, 137bdd1243dSDimitry Andric FeatureStdExtC]>; 138bdd1243dSDimitry Andric 139bdd1243dSDimitry Andricdef SIFIVE_E76 : RISCVProcessorModel<"sifive-e76", 140bdd1243dSDimitry Andric SiFive7Model, 141bdd1243dSDimitry Andric [Feature32Bit, 142*0fca6ea1SDimitry Andric FeatureStdExtI, 14306c3fb27SDimitry Andric FeatureStdExtZifencei, 144bdd1243dSDimitry Andric FeatureStdExtM, 145bdd1243dSDimitry Andric FeatureStdExtA, 146bdd1243dSDimitry Andric FeatureStdExtF, 147bdd1243dSDimitry Andric FeatureStdExtC], 148*0fca6ea1SDimitry Andric [TuneSiFive7, FeaturePostRAScheduler]>; 149bdd1243dSDimitry Andric 150bdd1243dSDimitry Andricdef SIFIVE_S21 : RISCVProcessorModel<"sifive-s21", 151bdd1243dSDimitry Andric RocketModel, 152bdd1243dSDimitry Andric [Feature64Bit, 153*0fca6ea1SDimitry Andric FeatureStdExtI, 15406c3fb27SDimitry Andric FeatureStdExtZicsr, 15506c3fb27SDimitry Andric FeatureStdExtZifencei, 156bdd1243dSDimitry Andric FeatureStdExtM, 157bdd1243dSDimitry Andric FeatureStdExtA, 158bdd1243dSDimitry Andric FeatureStdExtC]>; 159bdd1243dSDimitry Andric 160bdd1243dSDimitry Andricdef SIFIVE_S51 : RISCVProcessorModel<"sifive-s51", 161bdd1243dSDimitry Andric RocketModel, 162bdd1243dSDimitry Andric [Feature64Bit, 163*0fca6ea1SDimitry Andric FeatureStdExtI, 16406c3fb27SDimitry Andric FeatureStdExtZicsr, 16506c3fb27SDimitry Andric FeatureStdExtZifencei, 166bdd1243dSDimitry Andric FeatureStdExtM, 167bdd1243dSDimitry Andric FeatureStdExtA, 168bdd1243dSDimitry Andric FeatureStdExtC]>; 169bdd1243dSDimitry Andric 170bdd1243dSDimitry Andricdef SIFIVE_S54 : RISCVProcessorModel<"sifive-s54", 171bdd1243dSDimitry Andric RocketModel, 172bdd1243dSDimitry Andric [Feature64Bit, 173*0fca6ea1SDimitry Andric FeatureStdExtI, 17406c3fb27SDimitry Andric FeatureStdExtZifencei, 175bdd1243dSDimitry Andric FeatureStdExtM, 176bdd1243dSDimitry Andric FeatureStdExtA, 177bdd1243dSDimitry Andric FeatureStdExtF, 178bdd1243dSDimitry Andric FeatureStdExtD, 179bdd1243dSDimitry Andric FeatureStdExtC]>; 180bdd1243dSDimitry Andric 181bdd1243dSDimitry Andricdef SIFIVE_S76 : RISCVProcessorModel<"sifive-s76", 182bdd1243dSDimitry Andric SiFive7Model, 183bdd1243dSDimitry Andric [Feature64Bit, 184*0fca6ea1SDimitry Andric FeatureStdExtI, 18506c3fb27SDimitry Andric FeatureStdExtZifencei, 186bdd1243dSDimitry Andric FeatureStdExtM, 187bdd1243dSDimitry Andric FeatureStdExtA, 188bdd1243dSDimitry Andric FeatureStdExtF, 189bdd1243dSDimitry Andric FeatureStdExtD, 19006c3fb27SDimitry Andric FeatureStdExtC, 191647cbc5dSDimitry Andric FeatureStdExtZihintpause], 192*0fca6ea1SDimitry Andric [TuneSiFive7, FeaturePostRAScheduler]>; 193bdd1243dSDimitry Andric 194bdd1243dSDimitry Andricdef SIFIVE_U54 : RISCVProcessorModel<"sifive-u54", 195bdd1243dSDimitry Andric RocketModel, 196bdd1243dSDimitry Andric [Feature64Bit, 197*0fca6ea1SDimitry Andric FeatureStdExtI, 19806c3fb27SDimitry Andric FeatureStdExtZifencei, 199bdd1243dSDimitry Andric FeatureStdExtM, 200bdd1243dSDimitry Andric FeatureStdExtA, 201bdd1243dSDimitry Andric FeatureStdExtF, 202bdd1243dSDimitry Andric FeatureStdExtD, 203bdd1243dSDimitry Andric FeatureStdExtC]>; 204bdd1243dSDimitry Andric 205bdd1243dSDimitry Andricdef SIFIVE_U74 : RISCVProcessorModel<"sifive-u74", 206bdd1243dSDimitry Andric SiFive7Model, 207bdd1243dSDimitry Andric [Feature64Bit, 208*0fca6ea1SDimitry Andric FeatureStdExtI, 20906c3fb27SDimitry Andric FeatureStdExtZifencei, 210bdd1243dSDimitry Andric FeatureStdExtM, 211bdd1243dSDimitry Andric FeatureStdExtA, 212bdd1243dSDimitry Andric FeatureStdExtF, 213bdd1243dSDimitry Andric FeatureStdExtD, 214bdd1243dSDimitry Andric FeatureStdExtC], 215*0fca6ea1SDimitry Andric [TuneSiFive7, FeaturePostRAScheduler]>; 216bdd1243dSDimitry Andric 21706c3fb27SDimitry Andricdef SIFIVE_X280 : RISCVProcessorModel<"sifive-x280", SiFive7Model, 21806c3fb27SDimitry Andric [Feature64Bit, 219*0fca6ea1SDimitry Andric FeatureStdExtI, 22006c3fb27SDimitry Andric FeatureStdExtZifencei, 22106c3fb27SDimitry Andric FeatureStdExtM, 22206c3fb27SDimitry Andric FeatureStdExtA, 22306c3fb27SDimitry Andric FeatureStdExtF, 22406c3fb27SDimitry Andric FeatureStdExtD, 22506c3fb27SDimitry Andric FeatureStdExtC, 22606c3fb27SDimitry Andric FeatureStdExtV, 22706c3fb27SDimitry Andric FeatureStdExtZvl512b, 22806c3fb27SDimitry Andric FeatureStdExtZfh, 22906c3fb27SDimitry Andric FeatureStdExtZvfh, 23006c3fb27SDimitry Andric FeatureStdExtZba, 23106c3fb27SDimitry Andric FeatureStdExtZbb], 23206c3fb27SDimitry Andric [TuneSiFive7, 233*0fca6ea1SDimitry Andric FeaturePostRAScheduler, 234*0fca6ea1SDimitry Andric TuneDLenFactor2, 235*0fca6ea1SDimitry Andric TuneOptimizedZeroStrideLoad]>; 23606c3fb27SDimitry Andric 2377a6dacacSDimitry Andricdef SIFIVE_P450 : RISCVProcessorModel<"sifive-p450", SiFiveP400Model, 238cb14a3feSDimitry Andric [Feature64Bit, 239*0fca6ea1SDimitry Andric FeatureStdExtI, 240cb14a3feSDimitry Andric FeatureStdExtZifencei, 241cb14a3feSDimitry Andric FeatureStdExtM, 242cb14a3feSDimitry Andric FeatureStdExtA, 243cb14a3feSDimitry Andric FeatureStdExtF, 244cb14a3feSDimitry Andric FeatureStdExtD, 245cb14a3feSDimitry Andric FeatureStdExtC, 2467a6dacacSDimitry Andric FeatureStdExtZa64rs, 2477a6dacacSDimitry Andric FeatureStdExtZic64b, 248cb14a3feSDimitry Andric FeatureStdExtZicbop, 249cb14a3feSDimitry Andric FeatureStdExtZicbom, 250cb14a3feSDimitry Andric FeatureStdExtZicboz, 2517a6dacacSDimitry Andric FeatureStdExtZiccamoa, 2527a6dacacSDimitry Andric FeatureStdExtZiccif, 2537a6dacacSDimitry Andric FeatureStdExtZicclsm, 2547a6dacacSDimitry Andric FeatureStdExtZiccrse, 255cb14a3feSDimitry Andric FeatureStdExtZihintntl, 256cb14a3feSDimitry Andric FeatureStdExtZihintpause, 257cb14a3feSDimitry Andric FeatureStdExtZihpm, 258cb14a3feSDimitry Andric FeatureStdExtZba, 259cb14a3feSDimitry Andric FeatureStdExtZbb, 260cb14a3feSDimitry Andric FeatureStdExtZbs, 2617a6dacacSDimitry Andric FeatureStdExtZfhmin, 262*0fca6ea1SDimitry Andric FeatureUnalignedScalarMem, 263*0fca6ea1SDimitry Andric FeatureUnalignedVectorMem], 2647a6dacacSDimitry Andric [TuneNoDefaultUnroll, 2657a6dacacSDimitry Andric TuneConditionalCompressedMoveFusion, 2667a6dacacSDimitry Andric TuneLUIADDIFusion, 267*0fca6ea1SDimitry Andric TuneAUIPCADDIFusion, 268*0fca6ea1SDimitry Andric FeaturePostRAScheduler]>; 2697a6dacacSDimitry Andric 270*0fca6ea1SDimitry Andricdef SIFIVE_P670 : RISCVProcessorModel<"sifive-p670", SiFiveP600Model, 2717a6dacacSDimitry Andric [Feature64Bit, 272*0fca6ea1SDimitry Andric FeatureStdExtI, 2737a6dacacSDimitry Andric FeatureStdExtZifencei, 2747a6dacacSDimitry Andric FeatureStdExtM, 2757a6dacacSDimitry Andric FeatureStdExtA, 2767a6dacacSDimitry Andric FeatureStdExtF, 2777a6dacacSDimitry Andric FeatureStdExtD, 2787a6dacacSDimitry Andric FeatureStdExtC, 2797a6dacacSDimitry Andric FeatureStdExtZa64rs, 2807a6dacacSDimitry Andric FeatureStdExtZic64b, 2817a6dacacSDimitry Andric FeatureStdExtZicbop, 2827a6dacacSDimitry Andric FeatureStdExtZicbom, 2837a6dacacSDimitry Andric FeatureStdExtZicboz, 2847a6dacacSDimitry Andric FeatureStdExtZiccamoa, 2857a6dacacSDimitry Andric FeatureStdExtZiccif, 2867a6dacacSDimitry Andric FeatureStdExtZicclsm, 2877a6dacacSDimitry Andric FeatureStdExtZiccrse, 2887a6dacacSDimitry Andric FeatureStdExtZihintntl, 2897a6dacacSDimitry Andric FeatureStdExtZihintpause, 2907a6dacacSDimitry Andric FeatureStdExtZihpm, 2917a6dacacSDimitry Andric FeatureStdExtZba, 2927a6dacacSDimitry Andric FeatureStdExtZbb, 2937a6dacacSDimitry Andric FeatureStdExtZbs, 2947a6dacacSDimitry Andric FeatureStdExtZfhmin, 2957a6dacacSDimitry Andric FeatureStdExtV, 2967a6dacacSDimitry Andric FeatureStdExtZvl128b, 2977a6dacacSDimitry Andric FeatureStdExtZvbb, 2987a6dacacSDimitry Andric FeatureStdExtZvknc, 2997a6dacacSDimitry Andric FeatureStdExtZvkng, 3007a6dacacSDimitry Andric FeatureStdExtZvksc, 3017a6dacacSDimitry Andric FeatureStdExtZvksg, 302*0fca6ea1SDimitry Andric FeatureUnalignedScalarMem, 303*0fca6ea1SDimitry Andric FeatureUnalignedVectorMem], 3047a6dacacSDimitry Andric [TuneNoDefaultUnroll, 3057a6dacacSDimitry Andric TuneConditionalCompressedMoveFusion, 3067a6dacacSDimitry Andric TuneLUIADDIFusion, 307*0fca6ea1SDimitry Andric TuneAUIPCADDIFusion, 308*0fca6ea1SDimitry Andric TuneNoSinkSplatOperands, 309*0fca6ea1SDimitry Andric FeaturePostRAScheduler]>; 310cb14a3feSDimitry Andric 311bdd1243dSDimitry Andricdef SYNTACORE_SCR1_BASE : RISCVProcessorModel<"syntacore-scr1-base", 312bdd1243dSDimitry Andric SyntacoreSCR1Model, 313bdd1243dSDimitry Andric [Feature32Bit, 314*0fca6ea1SDimitry Andric FeatureStdExtI, 31506c3fb27SDimitry Andric FeatureStdExtZicsr, 31606c3fb27SDimitry Andric FeatureStdExtZifencei, 317bdd1243dSDimitry Andric FeatureStdExtC], 318bdd1243dSDimitry Andric [TuneNoDefaultUnroll]>; 319bdd1243dSDimitry Andric 320bdd1243dSDimitry Andricdef SYNTACORE_SCR1_MAX : RISCVProcessorModel<"syntacore-scr1-max", 321bdd1243dSDimitry Andric SyntacoreSCR1Model, 322bdd1243dSDimitry Andric [Feature32Bit, 323*0fca6ea1SDimitry Andric FeatureStdExtI, 32406c3fb27SDimitry Andric FeatureStdExtZicsr, 32506c3fb27SDimitry Andric FeatureStdExtZifencei, 326bdd1243dSDimitry Andric FeatureStdExtM, 327bdd1243dSDimitry Andric FeatureStdExtC], 328bdd1243dSDimitry Andric [TuneNoDefaultUnroll]>; 3295f757f3fSDimitry Andric 330*0fca6ea1SDimitry Andricdef SYNTACORE_SCR3_RV32 : RISCVProcessorModel<"syntacore-scr3-rv32", 331*0fca6ea1SDimitry Andric SyntacoreSCR3RV32Model, 332*0fca6ea1SDimitry Andric [Feature32Bit, 333*0fca6ea1SDimitry Andric FeatureStdExtI, 334*0fca6ea1SDimitry Andric FeatureStdExtZicsr, 335*0fca6ea1SDimitry Andric FeatureStdExtZifencei, 336*0fca6ea1SDimitry Andric FeatureStdExtM, 337*0fca6ea1SDimitry Andric FeatureStdExtC], 338*0fca6ea1SDimitry Andric [TuneNoDefaultUnroll, FeaturePostRAScheduler]>; 339*0fca6ea1SDimitry Andric 340*0fca6ea1SDimitry Andricdef SYNTACORE_SCR3_RV64 : RISCVProcessorModel<"syntacore-scr3-rv64", 341*0fca6ea1SDimitry Andric SyntacoreSCR3RV64Model, 342*0fca6ea1SDimitry Andric [Feature64Bit, 343*0fca6ea1SDimitry Andric FeatureStdExtI, 344*0fca6ea1SDimitry Andric FeatureStdExtZicsr, 345*0fca6ea1SDimitry Andric FeatureStdExtZifencei, 346*0fca6ea1SDimitry Andric FeatureStdExtM, 347*0fca6ea1SDimitry Andric FeatureStdExtA, 348*0fca6ea1SDimitry Andric FeatureStdExtC], 349*0fca6ea1SDimitry Andric [TuneNoDefaultUnroll, FeaturePostRAScheduler]>; 350*0fca6ea1SDimitry Andric 3515f757f3fSDimitry Andricdef VENTANA_VEYRON_V1 : RISCVProcessorModel<"veyron-v1", 3525f757f3fSDimitry Andric NoSchedModel, 3535f757f3fSDimitry Andric [Feature64Bit, 354*0fca6ea1SDimitry Andric FeatureStdExtI, 3555f757f3fSDimitry Andric FeatureStdExtZifencei, 3565f757f3fSDimitry Andric FeatureStdExtZicsr, 3575f757f3fSDimitry Andric FeatureStdExtZicntr, 3585f757f3fSDimitry Andric FeatureStdExtZihpm, 3595f757f3fSDimitry Andric FeatureStdExtZihintpause, 3605f757f3fSDimitry Andric FeatureStdExtM, 3615f757f3fSDimitry Andric FeatureStdExtA, 3625f757f3fSDimitry Andric FeatureStdExtF, 3635f757f3fSDimitry Andric FeatureStdExtD, 3645f757f3fSDimitry Andric FeatureStdExtC, 3655f757f3fSDimitry Andric FeatureStdExtZba, 3665f757f3fSDimitry Andric FeatureStdExtZbb, 3675f757f3fSDimitry Andric FeatureStdExtZbc, 3685f757f3fSDimitry Andric FeatureStdExtZbs, 3695f757f3fSDimitry Andric FeatureStdExtZicbom, 3705f757f3fSDimitry Andric FeatureStdExtZicbop, 3715f757f3fSDimitry Andric FeatureStdExtZicboz, 3725f757f3fSDimitry Andric FeatureVendorXVentanaCondOps], 373cb14a3feSDimitry Andric [TuneVentanaVeyron, 374cb14a3feSDimitry Andric TuneLUIADDIFusion, 375cb14a3feSDimitry Andric TuneAUIPCADDIFusion, 376cb14a3feSDimitry Andric TuneZExtHFusion, 377cb14a3feSDimitry Andric TuneZExtWFusion, 378cb14a3feSDimitry Andric TuneShiftedZExtWFusion, 379cb14a3feSDimitry Andric TuneLDADDFusion]>; 3805f757f3fSDimitry Andric 3815f757f3fSDimitry Andricdef XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", 382*0fca6ea1SDimitry Andric XiangShanNanHuModel, 3835f757f3fSDimitry Andric [Feature64Bit, 384*0fca6ea1SDimitry Andric FeatureStdExtI, 3855f757f3fSDimitry Andric FeatureStdExtZicsr, 3865f757f3fSDimitry Andric FeatureStdExtZifencei, 3875f757f3fSDimitry Andric FeatureStdExtM, 3885f757f3fSDimitry Andric FeatureStdExtA, 3895f757f3fSDimitry Andric FeatureStdExtF, 3905f757f3fSDimitry Andric FeatureStdExtD, 3915f757f3fSDimitry Andric FeatureStdExtC, 3925f757f3fSDimitry Andric FeatureStdExtZba, 3935f757f3fSDimitry Andric FeatureStdExtZbb, 3945f757f3fSDimitry Andric FeatureStdExtZbc, 3955f757f3fSDimitry Andric FeatureStdExtZbs, 3965f757f3fSDimitry Andric FeatureStdExtZkn, 3975f757f3fSDimitry Andric FeatureStdExtZksed, 3985f757f3fSDimitry Andric FeatureStdExtZksh, 3995f757f3fSDimitry Andric FeatureStdExtSvinval, 4005f757f3fSDimitry Andric FeatureStdExtZicbom, 401*0fca6ea1SDimitry Andric FeatureStdExtZicboz], 402*0fca6ea1SDimitry Andric [TuneNoDefaultUnroll, 403*0fca6ea1SDimitry Andric TuneZExtHFusion, 404*0fca6ea1SDimitry Andric TuneZExtWFusion, 405*0fca6ea1SDimitry Andric TuneShiftedZExtWFusion]>; 406*0fca6ea1SDimitry Andric 407*0fca6ea1SDimitry Andricdef SPACEMIT_X60 : RISCVProcessorModel<"spacemit-x60", 408*0fca6ea1SDimitry Andric NoSchedModel, 409*0fca6ea1SDimitry Andric !listconcat(RVA22S64Features, 410*0fca6ea1SDimitry Andric [FeatureStdExtV, 411*0fca6ea1SDimitry Andric FeatureStdExtSscofpmf, 412*0fca6ea1SDimitry Andric FeatureStdExtSstc, 413*0fca6ea1SDimitry Andric FeatureStdExtSvnapot, 414*0fca6ea1SDimitry Andric FeatureStdExtZbc, 415*0fca6ea1SDimitry Andric FeatureStdExtZbkc, 416*0fca6ea1SDimitry Andric FeatureStdExtZfh, 417*0fca6ea1SDimitry Andric FeatureStdExtZicond, 418*0fca6ea1SDimitry Andric FeatureStdExtZvfh, 419*0fca6ea1SDimitry Andric FeatureStdExtZvkt, 420*0fca6ea1SDimitry Andric FeatureStdExtZvl256b]), 421*0fca6ea1SDimitry Andric [TuneDLenFactor2]>; 422