xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td (revision 5f757f3ff9144b609b3c433dfd370cc6bdc191ad)
106c3fb27SDimitry Andric//===-- RISCVInstrInfoZvfbf.td - 'Zvfbf*' instructions -----*- tablegen -*-===//
206c3fb27SDimitry Andric//
306c3fb27SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
406c3fb27SDimitry Andric// See https://llvm.org/LICENSE.txt for license information.
506c3fb27SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
606c3fb27SDimitry Andric//
706c3fb27SDimitry Andric//===----------------------------------------------------------------------===//
806c3fb27SDimitry Andric//
906c3fb27SDimitry Andric// This file describes the RISC-V instructions from the standard 'Zvfbfmin'
1006c3fb27SDimitry Andric// extension, providing vector conversion instructions for BFloat16.
1106c3fb27SDimitry Andric// This version is still experimental as the 'Zvfbfmin' extension hasn't been
1206c3fb27SDimitry Andric// ratified yet.
1306c3fb27SDimitry Andric//
1406c3fb27SDimitry Andric//===----------------------------------------------------------------------===//
1506c3fb27SDimitry Andric
1606c3fb27SDimitry Andric//===----------------------------------------------------------------------===//
1706c3fb27SDimitry Andric// Instructions
1806c3fb27SDimitry Andric//===----------------------------------------------------------------------===//
1906c3fb27SDimitry Andric
2006c3fb27SDimitry Andriclet Predicates = [HasStdExtZvfbfmin], Constraints = "@earlyclobber $vd",
2106c3fb27SDimitry Andric    mayRaiseFPException = true in {
2206c3fb27SDimitry Andriclet RVVConstraint = WidenCvt in
2306c3fb27SDimitry Andricdefm VFWCVTBF16_F_F_V : VWCVTF_FV_VS2<"vfwcvtbf16.f.f.v", 0b010010, 0b01101>;
2406c3fb27SDimitry Andriclet Uses = [FRM] in
2506c3fb27SDimitry Andricdefm VFNCVTBF16_F_F_W : VNCVTF_FV_VS2<"vfncvtbf16.f.f.w", 0b010010, 0b11101>;
2606c3fb27SDimitry Andric}
2706c3fb27SDimitry Andric
28*5f757f3fSDimitry Andriclet Predicates = [HasStdExtZvfbfwma],
29*5f757f3fSDimitry Andric    Constraints = "@earlyclobber $vd_wb, $vd = $vd_wb",
3006c3fb27SDimitry Andric    RVVConstraint = WidenV, Uses = [FRM], mayRaiseFPException = true in {
3106c3fb27SDimitry Andricdefm VFWMACCBF16_V : VWMAC_FV_V_F<"vfwmaccbf16", 0b111011>;
3206c3fb27SDimitry Andric}
33