xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h (revision e8d8bef961a50d4dc22501cde4fb9fb0be1b2532)
15ffd83dbSDimitry Andric //===---- RISCVISelDAGToDAG.h - A dag to dag inst selector for RISCV ------===//
25ffd83dbSDimitry Andric //
35ffd83dbSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
45ffd83dbSDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
55ffd83dbSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
65ffd83dbSDimitry Andric //
75ffd83dbSDimitry Andric //===----------------------------------------------------------------------===//
85ffd83dbSDimitry Andric //
95ffd83dbSDimitry Andric // This file defines an instruction selector for the RISCV target.
105ffd83dbSDimitry Andric //
115ffd83dbSDimitry Andric //===----------------------------------------------------------------------===//
125ffd83dbSDimitry Andric 
135ffd83dbSDimitry Andric #ifndef LLVM_LIB_TARGET_RISCV_RISCVISELDAGTODAG_H
145ffd83dbSDimitry Andric #define LLVM_LIB_TARGET_RISCV_RISCVISELDAGTODAG_H
155ffd83dbSDimitry Andric 
165ffd83dbSDimitry Andric #include "RISCV.h"
175ffd83dbSDimitry Andric #include "RISCVTargetMachine.h"
185ffd83dbSDimitry Andric #include "llvm/CodeGen/SelectionDAGISel.h"
195ffd83dbSDimitry Andric 
205ffd83dbSDimitry Andric // RISCV-specific code to select RISCV machine instructions for
215ffd83dbSDimitry Andric // SelectionDAG operations.
225ffd83dbSDimitry Andric namespace llvm {
235ffd83dbSDimitry Andric class RISCVDAGToDAGISel : public SelectionDAGISel {
245ffd83dbSDimitry Andric   const RISCVSubtarget *Subtarget = nullptr;
255ffd83dbSDimitry Andric 
265ffd83dbSDimitry Andric public:
275ffd83dbSDimitry Andric   explicit RISCVDAGToDAGISel(RISCVTargetMachine &TargetMachine)
285ffd83dbSDimitry Andric       : SelectionDAGISel(TargetMachine) {}
295ffd83dbSDimitry Andric 
305ffd83dbSDimitry Andric   StringRef getPassName() const override {
315ffd83dbSDimitry Andric     return "RISCV DAG->DAG Pattern Instruction Selection";
325ffd83dbSDimitry Andric   }
335ffd83dbSDimitry Andric 
345ffd83dbSDimitry Andric   bool runOnMachineFunction(MachineFunction &MF) override {
355ffd83dbSDimitry Andric     Subtarget = &MF.getSubtarget<RISCVSubtarget>();
365ffd83dbSDimitry Andric     return SelectionDAGISel::runOnMachineFunction(MF);
375ffd83dbSDimitry Andric   }
385ffd83dbSDimitry Andric 
395ffd83dbSDimitry Andric   void PostprocessISelDAG() override;
405ffd83dbSDimitry Andric 
415ffd83dbSDimitry Andric   void Select(SDNode *Node) override;
425ffd83dbSDimitry Andric 
435ffd83dbSDimitry Andric   bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
445ffd83dbSDimitry Andric                                     std::vector<SDValue> &OutOps) override;
455ffd83dbSDimitry Andric 
465ffd83dbSDimitry Andric   bool SelectAddrFI(SDValue Addr, SDValue &Base);
475ffd83dbSDimitry Andric 
48*e8d8bef9SDimitry Andric   bool MatchSRLIW(SDNode *N) const;
49*e8d8bef9SDimitry Andric   bool MatchSLOI(SDNode *N) const;
50*e8d8bef9SDimitry Andric   bool MatchSROI(SDNode *N) const;
51*e8d8bef9SDimitry Andric   bool MatchSROIW(SDNode *N) const;
52*e8d8bef9SDimitry Andric   bool MatchSLLIUW(SDNode *N) const;
53*e8d8bef9SDimitry Andric 
54*e8d8bef9SDimitry Andric   bool selectVSplat(SDValue N, SDValue &SplatVal);
55*e8d8bef9SDimitry Andric   bool selectVSplatSimm5(SDValue N, SDValue &SplatVal);
56*e8d8bef9SDimitry Andric   bool selectVSplatUimm5(SDValue N, SDValue &SplatVal);
57*e8d8bef9SDimitry Andric 
58*e8d8bef9SDimitry Andric   void selectVLSEG(SDNode *Node, unsigned IntNo, bool IsStrided);
59*e8d8bef9SDimitry Andric   void selectVLSEGMask(SDNode *Node, unsigned IntNo, bool IsStrided);
60*e8d8bef9SDimitry Andric   void selectVLSEGFF(SDNode *Node);
61*e8d8bef9SDimitry Andric   void selectVLSEGFFMask(SDNode *Node);
62*e8d8bef9SDimitry Andric   void selectVLXSEG(SDNode *Node, unsigned IntNo);
63*e8d8bef9SDimitry Andric   void selectVLXSEGMask(SDNode *Node, unsigned IntNo);
64*e8d8bef9SDimitry Andric   void selectVSSEG(SDNode *Node, unsigned IntNo, bool IsStrided);
65*e8d8bef9SDimitry Andric   void selectVSSEGMask(SDNode *Node, unsigned IntNo, bool IsStrided);
66*e8d8bef9SDimitry Andric   void selectVSXSEG(SDNode *Node, unsigned IntNo);
67*e8d8bef9SDimitry Andric   void selectVSXSEGMask(SDNode *Node, unsigned IntNo);
68979e22ffSDimitry Andric 
695ffd83dbSDimitry Andric // Include the pieces autogenerated from the target description.
705ffd83dbSDimitry Andric #include "RISCVGenDAGISel.inc"
715ffd83dbSDimitry Andric 
725ffd83dbSDimitry Andric private:
735ffd83dbSDimitry Andric   void doPeepholeLoadStoreADDI();
745ffd83dbSDimitry Andric };
755ffd83dbSDimitry Andric }
765ffd83dbSDimitry Andric 
775ffd83dbSDimitry Andric #endif
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