1*bdd1243dSDimitry Andric//===-- PPCInstrFutureMMA.td - Future Instruction Set ------*- tablegen -*-===// 2*bdd1243dSDimitry Andric// 3*bdd1243dSDimitry Andric// The LLVM Compiler Infrastructure 4*bdd1243dSDimitry Andric// 5*bdd1243dSDimitry Andric// This file is distributed under the University of Illinois Open Source 6*bdd1243dSDimitry Andric// License. See LICENSE.TXT for details. 7*bdd1243dSDimitry Andric// 8*bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 9*bdd1243dSDimitry Andric// 10*bdd1243dSDimitry Andric// This file describes the instructions introduced for the Future CPU for MMA. 11*bdd1243dSDimitry Andric// 12*bdd1243dSDimitry Andric//===----------------------------------------------------------------------===// 13*bdd1243dSDimitry Andric 14*bdd1243dSDimitry Andricclass XX3Form_AT3_XABp5_P1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, 15*bdd1243dSDimitry Andric string asmstr, list<dag> pattern> 16*bdd1243dSDimitry Andric : I<opcode, OOL, IOL, asmstr, NoItinerary> { 17*bdd1243dSDimitry Andric bits<3> AT; 18*bdd1243dSDimitry Andric bits<5> XAp; 19*bdd1243dSDimitry Andric bits<5> XBp; 20*bdd1243dSDimitry Andric bits<1> P; 21*bdd1243dSDimitry Andric 22*bdd1243dSDimitry Andric let Pattern = pattern; 23*bdd1243dSDimitry Andric 24*bdd1243dSDimitry Andric let Inst{6-8} = AT{2-0}; 25*bdd1243dSDimitry Andric let Inst{9-10} = 0; 26*bdd1243dSDimitry Andric let Inst{11-14} = XAp{3-0}; 27*bdd1243dSDimitry Andric let Inst{15} = P; 28*bdd1243dSDimitry Andric let Inst{16-19} = XBp{3-0}; 29*bdd1243dSDimitry Andric let Inst{20} = 0; 30*bdd1243dSDimitry Andric let Inst{21-28} = xo; 31*bdd1243dSDimitry Andric let Inst{29} = XAp{4}; 32*bdd1243dSDimitry Andric let Inst{30} = XBp{4}; 33*bdd1243dSDimitry Andric let Inst{31} = 0; 34*bdd1243dSDimitry Andric} 35*bdd1243dSDimitry Andric 36*bdd1243dSDimitry Andricclass XX2Form_AT3_XBp5_P2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, 37*bdd1243dSDimitry Andric string asmstr, list<dag> pattern> 38*bdd1243dSDimitry Andric : I<opcode, OOL, IOL, asmstr, NoItinerary> { 39*bdd1243dSDimitry Andric bits<3> AT; 40*bdd1243dSDimitry Andric bits<5> XBp; 41*bdd1243dSDimitry Andric bits<2> P; 42*bdd1243dSDimitry Andric 43*bdd1243dSDimitry Andric let Pattern = pattern; 44*bdd1243dSDimitry Andric 45*bdd1243dSDimitry Andric let Inst{6-8} = AT{2-0}; 46*bdd1243dSDimitry Andric let Inst{9-14} = 0; 47*bdd1243dSDimitry Andric let Inst{15} = P{0}; 48*bdd1243dSDimitry Andric let Inst{16-19} = XBp{3-0}; 49*bdd1243dSDimitry Andric let Inst{20} = P{1}; 50*bdd1243dSDimitry Andric let Inst{21-29} = xo; 51*bdd1243dSDimitry Andric let Inst{30} = XBp{4}; 52*bdd1243dSDimitry Andric let Inst{31} = 0; 53*bdd1243dSDimitry Andric} 54*bdd1243dSDimitry Andric 55*bdd1243dSDimitry Andricclass XForm_ATB3<bits<6> opcode, bits<5> o, bits<10> xo, dag OOL, dag IOL, 56*bdd1243dSDimitry Andric string asmstr, list<dag> pattern> 57*bdd1243dSDimitry Andric : I <opcode, OOL, IOL, asmstr, NoItinerary> { 58*bdd1243dSDimitry Andric bits<3> AT; 59*bdd1243dSDimitry Andric bits<3> AB; 60*bdd1243dSDimitry Andric 61*bdd1243dSDimitry Andric let Pattern = pattern; 62*bdd1243dSDimitry Andric 63*bdd1243dSDimitry Andric let Inst{6-8} = AT{2-0}; 64*bdd1243dSDimitry Andric let Inst{9-10} = 0; 65*bdd1243dSDimitry Andric let Inst{11-15} = o; 66*bdd1243dSDimitry Andric let Inst{16-18} = AB{2-0}; 67*bdd1243dSDimitry Andric let Inst{19-20} = 0; 68*bdd1243dSDimitry Andric let Inst{21-30} = xo; 69*bdd1243dSDimitry Andric let Inst{31} = 0; 70*bdd1243dSDimitry Andric} 71*bdd1243dSDimitry Andric 72*bdd1243dSDimitry Andriclet Predicates = [IsISAFuture] in { 73*bdd1243dSDimitry Andric def DMXXEXTFDMR512 : XX3Form_AT3_XABp5_P1<60, 226, 74*bdd1243dSDimitry Andric (outs vsrprc:$XAp, vsrprc:$XBp), 75*bdd1243dSDimitry Andric (ins wacc:$AT), 76*bdd1243dSDimitry Andric "dmxxextfdmr512 $AT, $XAp, $XBp, 0", []> { 77*bdd1243dSDimitry Andric let P = 0; 78*bdd1243dSDimitry Andric } 79*bdd1243dSDimitry Andric 80*bdd1243dSDimitry Andric def DMXXEXTFDMR512_HI : XX3Form_AT3_XABp5_P1<60, 226, 81*bdd1243dSDimitry Andric (outs vsrprc:$XAp, vsrprc:$XBp), 82*bdd1243dSDimitry Andric (ins wacc_hi:$AT), 83*bdd1243dSDimitry Andric "dmxxextfdmr512 $AT, $XAp, $XBp, 1", []> { 84*bdd1243dSDimitry Andric let P = 1; 85*bdd1243dSDimitry Andric } 86*bdd1243dSDimitry Andric 87*bdd1243dSDimitry Andric def DMXXINSTFDMR512 : XX3Form_AT3_XABp5_P1<60, 234, (outs wacc:$AT), 88*bdd1243dSDimitry Andric (ins vsrprc:$XAp, vsrprc:$XBp), 89*bdd1243dSDimitry Andric "dmxxinstfdmr512 $AT, $XAp, $XBp, 0", []> { 90*bdd1243dSDimitry Andric let P = 0; 91*bdd1243dSDimitry Andric } 92*bdd1243dSDimitry Andric 93*bdd1243dSDimitry Andric def DMXXINSTFDMR512_HI : XX3Form_AT3_XABp5_P1<60, 234, (outs wacc_hi:$AT), 94*bdd1243dSDimitry Andric (ins vsrprc:$XAp, vsrprc:$XBp), 95*bdd1243dSDimitry Andric "dmxxinstfdmr512 $AT, $XAp, $XBp, 1", []> { 96*bdd1243dSDimitry Andric let P = 1; 97*bdd1243dSDimitry Andric } 98*bdd1243dSDimitry Andric 99*bdd1243dSDimitry Andric def DMXXEXTFDMR256 : XX2Form_AT3_XBp5_P2<60, 484, (outs vsrprc:$XBp), 100*bdd1243dSDimitry Andric (ins dmrrowp:$AT, u2imm:$P), 101*bdd1243dSDimitry Andric "dmxxextfdmr256 $AT, $XBp, $P", []>; 102*bdd1243dSDimitry Andric 103*bdd1243dSDimitry Andric def DMXXINSTFDMR256 : XX2Form_AT3_XBp5_P2<60, 485, (outs dmrrowp:$AT), 104*bdd1243dSDimitry Andric (ins vsrprc:$XBp, u2imm:$P), 105*bdd1243dSDimitry Andric "dmxxinstfdmr256 $AT, $XBp, $P", []>; 106*bdd1243dSDimitry Andric 107*bdd1243dSDimitry Andric def DMMR : XForm_ATB3<31, 6, 177, (outs dmr:$AT), (ins dmr:$AB), 108*bdd1243dSDimitry Andric "dmmr $AT, $AB", []>; 109*bdd1243dSDimitry Andric 110*bdd1243dSDimitry Andric def DMXOR : XForm_ATB3<31, 7, 177, (outs dmr:$AT), (ins dmr:$ATi, dmr:$AB), 111*bdd1243dSDimitry Andric "dmxor $AT, $AB", []>, 112*bdd1243dSDimitry Andric RegConstraint<"$ATi = $AT">, NoEncode<"$ATi">; 113*bdd1243dSDimitry Andric 114*bdd1243dSDimitry Andric def DMSETDMRZ : XForm_AT3<31, 2, 177, (outs dmr:$AT), (ins), 115*bdd1243dSDimitry Andric "dmsetdmrz $AT", NoItinerary, []>; 116*bdd1243dSDimitry Andric} 117