xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCGenRegisterBankInfo.def (revision 5f757f3ff9144b609b3c433dfd370cc6bdc191ad)
1bdd1243dSDimitry Andric//===- PPCGenRegisterBankInfo.def -------------------------------*- C++ -*-==//
2bdd1243dSDimitry Andric//
3bdd1243dSDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4bdd1243dSDimitry Andric// See https://llvm.org/LICENSE.txt for license information.
5bdd1243dSDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6bdd1243dSDimitry Andric//
7bdd1243dSDimitry Andric//===----------------------------------------------------------------------===//
8bdd1243dSDimitry Andric/// \file
9bdd1243dSDimitry Andric/// This file defines all the static objects used by PPCRegisterBankInfo.
10bdd1243dSDimitry Andric/// \todo This should be generated by TableGen, because the logic here can be
11bdd1243dSDimitry Andric///  derived from register bank definition. Not yet implemented.
12bdd1243dSDimitry Andric//===----------------------------------------------------------------------===//
13bdd1243dSDimitry Andric
14bdd1243dSDimitry Andricnamespace llvm {
15*5f757f3fSDimitry Andricconst RegisterBankInfo::PartialMapping PPCGenRegisterBankInfo::PartMappings[]{
16bdd1243dSDimitry Andric    /* StartIdx, Length, RegBank */
17bdd1243dSDimitry Andric    // 0: GPR 32-bit value.
18bdd1243dSDimitry Andric    {0, 32, PPC::GPRRegBank},
19bdd1243dSDimitry Andric    // 1: GPR 64-bit value.
20bdd1243dSDimitry Andric    {0, 64, PPC::GPRRegBank},
21bdd1243dSDimitry Andric    // 2: FPR 32-bit value
22bdd1243dSDimitry Andric    {0, 32, PPC::FPRRegBank},
23bdd1243dSDimitry Andric    // 3: FPR 64-bit value
24bdd1243dSDimitry Andric    {0, 64, PPC::FPRRegBank},
2506c3fb27SDimitry Andric    // 4: 128-bit vector (VSX, Altivec)
2606c3fb27SDimitry Andric    {0, 128, PPC::VECRegBank},
2706c3fb27SDimitry Andric    // 5: CR 4-bit value
28bdd1243dSDimitry Andric    {0, 4, PPC::CRRegBank},
29bdd1243dSDimitry Andric};
30bdd1243dSDimitry Andric
31bdd1243dSDimitry Andric// ValueMappings.
32bdd1243dSDimitry Andric// Pointers to the entries in this array are returned by getValueMapping() and
33bdd1243dSDimitry Andric// getCopyMapping().
34bdd1243dSDimitry Andric//
35bdd1243dSDimitry Andric// The array has the following structure:
36bdd1243dSDimitry Andric// - At index 0 is the invalid entry.
37bdd1243dSDimitry Andric// - After that, the mappings for the register types from PartialMappingIdx
38bdd1243dSDimitry Andric//   follow. Each mapping consists of 3 entries, which is needed to cover
39bdd1243dSDimitry Andric//   3-operands instructions.
40bdd1243dSDimitry Andric// - Last, mappings for cross-register bank moves follow. Since COPY has only
41bdd1243dSDimitry Andric//   2 operands, a mapping consists of 2 entries.
42*5f757f3fSDimitry Andricconst RegisterBankInfo::ValueMapping PPCGenRegisterBankInfo::ValMappings[]{
43bdd1243dSDimitry Andric    /* BreakDown, NumBreakDowns */
44bdd1243dSDimitry Andric    // 0: invalid
45bdd1243dSDimitry Andric    {nullptr, 0},
46bdd1243dSDimitry Andric    // 1: GPR 32-bit value.
47bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},
48bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},
49bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},
50bdd1243dSDimitry Andric    // 4: GPR 64-bit value.
51bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},
52bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},
53bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},
54bdd1243dSDimitry Andric    // 7: FPR 32-bit value.
55bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},
56bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},
57bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},
58bdd1243dSDimitry Andric    // 10: FPR 64-bit value.
59bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},
60bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},
61bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},
6206c3fb27SDimitry Andric    // 13: 128-bit vector.
6306c3fb27SDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},
6406c3fb27SDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},
6506c3fb27SDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},
6606c3fb27SDimitry Andric    // 16: CR 4-bit value.
67bdd1243dSDimitry Andric    {&PPCGenRegisterBankInfo::PartMappings[PMI_CR - PMI_Min], 1},
68bdd1243dSDimitry Andric};
69bdd1243dSDimitry Andric
70bdd1243dSDimitry Andric// TODO Too simple!
71bdd1243dSDimitry Andricconst RegisterBankInfo::ValueMapping *
72bdd1243dSDimitry AndricPPCGenRegisterBankInfo::getValueMapping(PartialMappingIdx RBIdx) {
73bdd1243dSDimitry Andric  assert(RBIdx != PartialMappingIdx::PMI_None && "No mapping needed for that");
74bdd1243dSDimitry Andric
75bdd1243dSDimitry Andric  unsigned ValMappingIdx = RBIdx - PMI_Min;
76bdd1243dSDimitry Andric
77bdd1243dSDimitry Andric  return &ValMappings[1 + 3 * ValMappingIdx];
78bdd1243dSDimitry Andric}
79bdd1243dSDimitry Andric
80*5f757f3fSDimitry Andricconst PPCGenRegisterBankInfo::PartialMappingIdx
8106c3fb27SDimitry Andric  PPCGenRegisterBankInfo::BankIDToCopyMapIdx[]{
8206c3fb27SDimitry Andric    PMI_None,
8306c3fb27SDimitry Andric    PMI_FPR64,  // FPR
8406c3fb27SDimitry Andric    PMI_GPR64,  // GPR
8506c3fb27SDimitry Andric    PMI_VEC128, // VEC
8606c3fb27SDimitry Andric};
8706c3fb27SDimitry Andric
88bdd1243dSDimitry Andric// TODO Too simple!
89bdd1243dSDimitry Andricconst RegisterBankInfo::ValueMapping *
90bdd1243dSDimitry AndricPPCGenRegisterBankInfo::getCopyMapping(unsigned DstBankID, unsigned SrcBankID,
91bdd1243dSDimitry Andric                                       unsigned Size) {
92bdd1243dSDimitry Andric  assert(DstBankID < PPC::NumRegisterBanks && "Invalid bank ID");
93bdd1243dSDimitry Andric  assert(SrcBankID < PPC::NumRegisterBanks && "Invalid bank ID");
9406c3fb27SDimitry Andric  PartialMappingIdx DstRBIdx = BankIDToCopyMapIdx[DstBankID];
9506c3fb27SDimitry Andric  PartialMappingIdx SrcRBIdx = BankIDToCopyMapIdx[SrcBankID];
9606c3fb27SDimitry Andric  assert(DstRBIdx != PMI_None && "No such mapping");
9706c3fb27SDimitry Andric  assert(SrcRBIdx != PMI_None && "No such mapping");
98bdd1243dSDimitry Andric
9906c3fb27SDimitry Andric  if (DstRBIdx == SrcRBIdx)
10006c3fb27SDimitry Andric    return getValueMapping(DstRBIdx);
10106c3fb27SDimitry Andric
10206c3fb27SDimitry Andric  assert(Size <= 128 && "Can currently handle types up to 128 bits (vectors)!");
10306c3fb27SDimitry Andric  // TODO: This function needs to be updated to handle all cases for
10406c3fb27SDimitry Andric  //       GPRs, FPRs and vectors. It currently only handles bitcasting to
10506c3fb27SDimitry Andric  //       the same type and has only mainly been tested for bitcasting
10606c3fb27SDimitry Andric  //       between different vector types.
10706c3fb27SDimitry Andric  unsigned ValMappingIdx = DstRBIdx - PMI_Min;
10806c3fb27SDimitry Andric
10906c3fb27SDimitry Andric  return &ValMappings[1 + 3 * ValMappingIdx];
110bdd1243dSDimitry Andric}
111bdd1243dSDimitry Andric
112bdd1243dSDimitry Andric} // namespace llvm
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