xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterInfo.h (revision 5f757f3ff9144b609b3c433dfd370cc6bdc191ad)
10b57cec5SDimitry Andric //===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric //
90b57cec5SDimitry Andric // This file contains the Mips implementation of the TargetRegisterInfo class.
100b57cec5SDimitry Andric //
110b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
120b57cec5SDimitry Andric 
130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
150b57cec5SDimitry Andric 
160b57cec5SDimitry Andric #include "Mips.h"
170b57cec5SDimitry Andric #include "llvm/CodeGen/MachineBasicBlock.h"
180b57cec5SDimitry Andric #include <cstdint>
190b57cec5SDimitry Andric 
200b57cec5SDimitry Andric #define GET_REGINFO_HEADER
210b57cec5SDimitry Andric #include "MipsGenRegisterInfo.inc"
220b57cec5SDimitry Andric 
230b57cec5SDimitry Andric namespace llvm {
240b57cec5SDimitry Andric 
250b57cec5SDimitry Andric class TargetRegisterClass;
260b57cec5SDimitry Andric 
270b57cec5SDimitry Andric class MipsRegisterInfo : public MipsGenRegisterInfo {
280b57cec5SDimitry Andric public:
290b57cec5SDimitry Andric   enum class MipsPtrClass {
300b57cec5SDimitry Andric     /// The default register class for integer values.
310b57cec5SDimitry Andric     Default = 0,
320b57cec5SDimitry Andric     /// The subset of registers permitted in certain microMIPS instructions
330b57cec5SDimitry Andric     /// such as lw16.
340b57cec5SDimitry Andric     GPR16MM = 1,
350b57cec5SDimitry Andric     /// The stack pointer only.
360b57cec5SDimitry Andric     StackPointer = 2,
370b57cec5SDimitry Andric     /// The global pointer only.
380b57cec5SDimitry Andric     GlobalPointer = 3,
390b57cec5SDimitry Andric   };
400b57cec5SDimitry Andric 
410b57cec5SDimitry Andric   MipsRegisterInfo();
420b57cec5SDimitry Andric 
430b57cec5SDimitry Andric   /// Get PIC indirect call register
440b57cec5SDimitry Andric   static unsigned getPICCallReg();
450b57cec5SDimitry Andric 
460b57cec5SDimitry Andric   /// Code Generation virtual methods...
470b57cec5SDimitry Andric   const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
480b57cec5SDimitry Andric                                                 unsigned Kind) const override;
490b57cec5SDimitry Andric 
500b57cec5SDimitry Andric   unsigned getRegPressureLimit(const TargetRegisterClass *RC,
510b57cec5SDimitry Andric                                MachineFunction &MF) const override;
520b57cec5SDimitry Andric   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
530b57cec5SDimitry Andric   const uint32_t *getCallPreservedMask(const MachineFunction &MF,
540b57cec5SDimitry Andric                                        CallingConv::ID) const override;
550b57cec5SDimitry Andric   static const uint32_t *getMips16RetHelperMask();
560b57cec5SDimitry Andric 
570b57cec5SDimitry Andric   BitVector getReservedRegs(const MachineFunction &MF) const override;
580b57cec5SDimitry Andric 
590b57cec5SDimitry Andric   /// Stack Frame Processing Methods
60*bdd1243dSDimitry Andric   bool eliminateFrameIndex(MachineBasicBlock::iterator II,
610b57cec5SDimitry Andric                            int SPAdj, unsigned FIOperandNum,
620b57cec5SDimitry Andric                            RegScavenger *RS = nullptr) const override;
630b57cec5SDimitry Andric 
640b57cec5SDimitry Andric   // Stack realignment queries.
650b57cec5SDimitry Andric   bool canRealignStack(const MachineFunction &MF) const override;
660b57cec5SDimitry Andric 
670b57cec5SDimitry Andric   /// Debug information queries.
680b57cec5SDimitry Andric   Register getFrameRegister(const MachineFunction &MF) const override;
690b57cec5SDimitry Andric 
700b57cec5SDimitry Andric   /// Return GPR register class.
710b57cec5SDimitry Andric   virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
720b57cec5SDimitry Andric 
730b57cec5SDimitry Andric private:
740b57cec5SDimitry Andric   virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
750b57cec5SDimitry Andric                            int FrameIndex, uint64_t StackSize,
760b57cec5SDimitry Andric                            int64_t SPOffset) const = 0;
770b57cec5SDimitry Andric };
780b57cec5SDimitry Andric 
790b57cec5SDimitry Andric } // end namespace llvm
800b57cec5SDimitry Andric 
810b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
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