1*0b57cec5SDimitry Andric //===- MipsAnalyzeImmediate.h - Analyze Immediates -------------*- C++ -*--===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric 9*0b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_MIPS_MIPSANALYZEIMMEDIATE_H 10*0b57cec5SDimitry Andric #define LLVM_LIB_TARGET_MIPS_MIPSANALYZEIMMEDIATE_H 11*0b57cec5SDimitry Andric 12*0b57cec5SDimitry Andric #include "llvm/ADT/SmallVector.h" 13*0b57cec5SDimitry Andric #include <cstdint> 14*0b57cec5SDimitry Andric 15*0b57cec5SDimitry Andric namespace llvm { 16*0b57cec5SDimitry Andric 17*0b57cec5SDimitry Andric class MipsAnalyzeImmediate { 18*0b57cec5SDimitry Andric public: 19*0b57cec5SDimitry Andric struct Inst { 20*0b57cec5SDimitry Andric unsigned Opc, ImmOpnd; 21*0b57cec5SDimitry Andric 22*0b57cec5SDimitry Andric Inst(unsigned Opc, unsigned ImmOpnd); 23*0b57cec5SDimitry Andric }; 24*0b57cec5SDimitry Andric using InstSeq = SmallVector<Inst, 7>; 25*0b57cec5SDimitry Andric 26*0b57cec5SDimitry Andric /// Analyze - Get an instruction sequence to load immediate Imm. The last 27*0b57cec5SDimitry Andric /// instruction in the sequence must be an ADDiu if LastInstrIsADDiu is 28*0b57cec5SDimitry Andric /// true; 29*0b57cec5SDimitry Andric const InstSeq &Analyze(uint64_t Imm, unsigned Size, bool LastInstrIsADDiu); 30*0b57cec5SDimitry Andric 31*0b57cec5SDimitry Andric private: 32*0b57cec5SDimitry Andric using InstSeqLs = SmallVector<InstSeq, 5>; 33*0b57cec5SDimitry Andric 34*0b57cec5SDimitry Andric /// AddInstr - Add I to all instruction sequences in SeqLs. 35*0b57cec5SDimitry Andric void AddInstr(InstSeqLs &SeqLs, const Inst &I); 36*0b57cec5SDimitry Andric 37*0b57cec5SDimitry Andric /// GetInstSeqLsADDiu - Get instruction sequences which end with an ADDiu to 38*0b57cec5SDimitry Andric /// load immediate Imm 39*0b57cec5SDimitry Andric void GetInstSeqLsADDiu(uint64_t Imm, unsigned RemSize, InstSeqLs &SeqLs); 40*0b57cec5SDimitry Andric 41*0b57cec5SDimitry Andric /// GetInstSeqLsORi - Get instrutcion sequences which end with an ORi to 42*0b57cec5SDimitry Andric /// load immediate Imm 43*0b57cec5SDimitry Andric void GetInstSeqLsORi(uint64_t Imm, unsigned RemSize, InstSeqLs &SeqLs); 44*0b57cec5SDimitry Andric 45*0b57cec5SDimitry Andric /// GetInstSeqLsSLL - Get instruction sequences which end with a SLL to 46*0b57cec5SDimitry Andric /// load immediate Imm 47*0b57cec5SDimitry Andric void GetInstSeqLsSLL(uint64_t Imm, unsigned RemSize, InstSeqLs &SeqLs); 48*0b57cec5SDimitry Andric 49*0b57cec5SDimitry Andric /// GetInstSeqLs - Get instruction sequences to load immediate Imm. 50*0b57cec5SDimitry Andric void GetInstSeqLs(uint64_t Imm, unsigned RemSize, InstSeqLs &SeqLs); 51*0b57cec5SDimitry Andric 52*0b57cec5SDimitry Andric /// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi. 53*0b57cec5SDimitry Andric void ReplaceADDiuSLLWithLUi(InstSeq &Seq); 54*0b57cec5SDimitry Andric 55*0b57cec5SDimitry Andric /// GetShortestSeq - Find the shortest instruction sequence in SeqLs and 56*0b57cec5SDimitry Andric /// return it in Insts. 57*0b57cec5SDimitry Andric void GetShortestSeq(InstSeqLs &SeqLs, InstSeq &Insts); 58*0b57cec5SDimitry Andric 59*0b57cec5SDimitry Andric unsigned Size; 60*0b57cec5SDimitry Andric unsigned ADDiu, ORi, SLL, LUi; 61*0b57cec5SDimitry Andric InstSeq Insts; 62*0b57cec5SDimitry Andric }; 63*0b57cec5SDimitry Andric 64*0b57cec5SDimitry Andric } // end namespace llvm 65*0b57cec5SDimitry Andric 66*0b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_MIPS_MIPSANALYZEIMMEDIATE_H 67