xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/Mips16ISelLowering.h (revision bdd1243df58e60e85101c09001d9812a789b6bc4)
10b57cec5SDimitry Andric //===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric //
90b57cec5SDimitry Andric // Subclass of MipsTargetLowering specialized for mips16.
100b57cec5SDimitry Andric //
110b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
120b57cec5SDimitry Andric 
130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
150b57cec5SDimitry Andric 
160b57cec5SDimitry Andric #include "MipsISelLowering.h"
170b57cec5SDimitry Andric 
180b57cec5SDimitry Andric namespace llvm {
190b57cec5SDimitry Andric   class Mips16TargetLowering : public MipsTargetLowering  {
200b57cec5SDimitry Andric   public:
210b57cec5SDimitry Andric     explicit Mips16TargetLowering(const MipsTargetMachine &TM,
220b57cec5SDimitry Andric                                   const MipsSubtarget &STI);
230b57cec5SDimitry Andric 
240b57cec5SDimitry Andric     bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
25fe6060f1SDimitry Andric                                         Align Alignment,
260b57cec5SDimitry Andric                                         MachineMemOperand::Flags Flags,
27*bdd1243dSDimitry Andric                                         unsigned *Fast) const override;
280b57cec5SDimitry Andric 
290b57cec5SDimitry Andric     MachineBasicBlock *
300b57cec5SDimitry Andric     EmitInstrWithCustomInserter(MachineInstr &MI,
310b57cec5SDimitry Andric                                 MachineBasicBlock *MBB) const override;
320b57cec5SDimitry Andric 
330b57cec5SDimitry Andric   private:
340b57cec5SDimitry Andric     bool isEligibleForTailCallOptimization(
350b57cec5SDimitry Andric         const CCState &CCInfo, unsigned NextStackOffset,
360b57cec5SDimitry Andric         const MipsFunctionInfo &FI) const override;
370b57cec5SDimitry Andric 
380b57cec5SDimitry Andric     void setMips16HardFloatLibCalls();
390b57cec5SDimitry Andric 
400b57cec5SDimitry Andric     unsigned int
410b57cec5SDimitry Andric       getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
420b57cec5SDimitry Andric 
430b57cec5SDimitry Andric     const char *getMips16HelperFunction
440b57cec5SDimitry Andric       (Type* RetTy, ArgListTy &Args, bool &needHelper) const;
450b57cec5SDimitry Andric 
460b57cec5SDimitry Andric     void
470b57cec5SDimitry Andric     getOpndList(SmallVectorImpl<SDValue> &Ops,
480b57cec5SDimitry Andric                 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
490b57cec5SDimitry Andric                 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
500b57cec5SDimitry Andric                 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,
510b57cec5SDimitry Andric                 SDValue Chain) const override;
520b57cec5SDimitry Andric 
530b57cec5SDimitry Andric     MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr &MI,
540b57cec5SDimitry Andric                                  MachineBasicBlock *BB) const;
550b57cec5SDimitry Andric 
560b57cec5SDimitry Andric     MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
570b57cec5SDimitry Andric                                    MachineInstr &MI,
580b57cec5SDimitry Andric                                    MachineBasicBlock *BB) const;
590b57cec5SDimitry Andric 
600b57cec5SDimitry Andric     MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
610b57cec5SDimitry Andric                                   MachineInstr &MI,
620b57cec5SDimitry Andric                                   MachineBasicBlock *BB) const;
630b57cec5SDimitry Andric 
640b57cec5SDimitry Andric     MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
650b57cec5SDimitry Andric                                            MachineInstr &MI,
660b57cec5SDimitry Andric                                            MachineBasicBlock *BB) const;
670b57cec5SDimitry Andric 
680b57cec5SDimitry Andric     MachineBasicBlock *emitFEXT_T8I8I16_ins(unsigned BtOpc, unsigned CmpiOpc,
690b57cec5SDimitry Andric                                             unsigned CmpiXOpc, bool ImmSigned,
700b57cec5SDimitry Andric                                             MachineInstr &MI,
710b57cec5SDimitry Andric                                             MachineBasicBlock *BB) const;
720b57cec5SDimitry Andric 
730b57cec5SDimitry Andric     MachineBasicBlock *emitFEXT_CCRX16_ins(unsigned SltOpc, MachineInstr &MI,
740b57cec5SDimitry Andric                                            MachineBasicBlock *BB) const;
750b57cec5SDimitry Andric 
760b57cec5SDimitry Andric     MachineBasicBlock *emitFEXT_CCRXI16_ins(unsigned SltiOpc, unsigned SltiXOpc,
770b57cec5SDimitry Andric                                             MachineInstr &MI,
780b57cec5SDimitry Andric                                             MachineBasicBlock *BB) const;
790b57cec5SDimitry Andric   };
800b57cec5SDimitry Andric }
810b57cec5SDimitry Andric 
820b57cec5SDimitry Andric #endif
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