104eeddc0SDimitry Andric //===-- M68kMCTargetDesc.cpp - M68k Target Descriptions ---------*- C++ -*-===//
2fe6060f1SDimitry Andric //
3fe6060f1SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4fe6060f1SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5fe6060f1SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6fe6060f1SDimitry Andric //
7fe6060f1SDimitry Andric //===----------------------------------------------------------------------===//
8fe6060f1SDimitry Andric ///
9fe6060f1SDimitry Andric /// \file
10fe6060f1SDimitry Andric /// This file provides M68k target specific descriptions.
11fe6060f1SDimitry Andric ///
12fe6060f1SDimitry Andric //===----------------------------------------------------------------------===//
13fe6060f1SDimitry Andric
14fe6060f1SDimitry Andric #include "M68kMCTargetDesc.h"
15fe6060f1SDimitry Andric #include "M68kInstPrinter.h"
16fe6060f1SDimitry Andric #include "M68kMCAsmInfo.h"
17fe6060f1SDimitry Andric #include "TargetInfo/M68kTargetInfo.h"
18fe6060f1SDimitry Andric
19fe6060f1SDimitry Andric #include "llvm/MC/MCELFStreamer.h"
20fe6060f1SDimitry Andric #include "llvm/MC/MCInstPrinter.h"
21fe6060f1SDimitry Andric #include "llvm/MC/MCInstrInfo.h"
22fe6060f1SDimitry Andric #include "llvm/MC/MCRegisterInfo.h"
23fe6060f1SDimitry Andric #include "llvm/MC/MCSubtargetInfo.h"
24fe6060f1SDimitry Andric #include "llvm/MC/MCSymbol.h"
25fe6060f1SDimitry Andric #include "llvm/MC/MachineLocation.h"
26349cc55cSDimitry Andric #include "llvm/MC/TargetRegistry.h"
27fe6060f1SDimitry Andric #include "llvm/Support/CommandLine.h"
28fe6060f1SDimitry Andric #include "llvm/Support/ErrorHandling.h"
29fe6060f1SDimitry Andric #include "llvm/Support/FormattedStream.h"
30fe6060f1SDimitry Andric
31fe6060f1SDimitry Andric using namespace llvm;
32fe6060f1SDimitry Andric
33fe6060f1SDimitry Andric #define GET_INSTRINFO_MC_DESC
34*753f127fSDimitry Andric #define ENABLE_INSTR_PREDICATE_VERIFIER
35fe6060f1SDimitry Andric #include "M68kGenInstrInfo.inc"
36fe6060f1SDimitry Andric
37fe6060f1SDimitry Andric #define GET_SUBTARGETINFO_MC_DESC
38fe6060f1SDimitry Andric #include "M68kGenSubtargetInfo.inc"
39fe6060f1SDimitry Andric
40fe6060f1SDimitry Andric #define GET_REGINFO_MC_DESC
41fe6060f1SDimitry Andric #include "M68kGenRegisterInfo.inc"
42fe6060f1SDimitry Andric
43fe6060f1SDimitry Andric // TODO Implement feature set parsing logics
ParseM68kTriple(const Triple & TT,StringRef CPU)44fe6060f1SDimitry Andric static std::string ParseM68kTriple(const Triple &TT, StringRef CPU) {
45fe6060f1SDimitry Andric return "";
46fe6060f1SDimitry Andric }
47fe6060f1SDimitry Andric
createM68kMCInstrInfo()48fe6060f1SDimitry Andric static MCInstrInfo *createM68kMCInstrInfo() {
49fe6060f1SDimitry Andric MCInstrInfo *X = new MCInstrInfo();
50fe6060f1SDimitry Andric InitM68kMCInstrInfo(X); // defined in M68kGenInstrInfo.inc
51fe6060f1SDimitry Andric return X;
52fe6060f1SDimitry Andric }
53fe6060f1SDimitry Andric
createM68kMCRegisterInfo(const Triple & TT)54fe6060f1SDimitry Andric static MCRegisterInfo *createM68kMCRegisterInfo(const Triple &TT) {
55fe6060f1SDimitry Andric MCRegisterInfo *X = new MCRegisterInfo();
56fe6060f1SDimitry Andric InitM68kMCRegisterInfo(X, llvm::M68k::A0, 0, 0, llvm::M68k::PC);
57fe6060f1SDimitry Andric return X;
58fe6060f1SDimitry Andric }
59fe6060f1SDimitry Andric
createM68kMCSubtargetInfo(const Triple & TT,StringRef CPU,StringRef FS)60fe6060f1SDimitry Andric static MCSubtargetInfo *createM68kMCSubtargetInfo(const Triple &TT,
61fe6060f1SDimitry Andric StringRef CPU, StringRef FS) {
62fe6060f1SDimitry Andric std::string ArchFS = ParseM68kTriple(TT, CPU);
63fe6060f1SDimitry Andric if (!FS.empty()) {
64fe6060f1SDimitry Andric if (!ArchFS.empty()) {
65fe6060f1SDimitry Andric ArchFS = (ArchFS + "," + FS).str();
66fe6060f1SDimitry Andric } else {
67fe6060f1SDimitry Andric ArchFS = FS.str();
68fe6060f1SDimitry Andric }
69fe6060f1SDimitry Andric }
70fe6060f1SDimitry Andric return createM68kMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, ArchFS);
71fe6060f1SDimitry Andric }
72fe6060f1SDimitry Andric
createM68kMCAsmInfo(const MCRegisterInfo & MRI,const Triple & TT,const MCTargetOptions & TO)73fe6060f1SDimitry Andric static MCAsmInfo *createM68kMCAsmInfo(const MCRegisterInfo &MRI,
74fe6060f1SDimitry Andric const Triple &TT,
75fe6060f1SDimitry Andric const MCTargetOptions &TO) {
76fe6060f1SDimitry Andric MCAsmInfo *MAI = new M68kELFMCAsmInfo(TT);
77fe6060f1SDimitry Andric
78fe6060f1SDimitry Andric // Initialize initial frame state.
79fe6060f1SDimitry Andric // Calculate amount of bytes used for return address storing
80fe6060f1SDimitry Andric int StackGrowth = -4;
81fe6060f1SDimitry Andric
82fe6060f1SDimitry Andric // Initial state of the frame pointer is SP+StackGrowth.
83fe6060f1SDimitry Andric // TODO: Add tests for `cfi_*` directives
84fe6060f1SDimitry Andric MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(
85fe6060f1SDimitry Andric nullptr, MRI.getDwarfRegNum(llvm::M68k::SP, true), -StackGrowth);
86fe6060f1SDimitry Andric MAI->addInitialFrameState(Inst);
87fe6060f1SDimitry Andric
88fe6060f1SDimitry Andric // Add return address to move list
89fe6060f1SDimitry Andric Inst = MCCFIInstruction::createOffset(
90fe6060f1SDimitry Andric nullptr, MRI.getDwarfRegNum(M68k::PC, true), StackGrowth);
91fe6060f1SDimitry Andric MAI->addInitialFrameState(Inst);
92fe6060f1SDimitry Andric
93fe6060f1SDimitry Andric return MAI;
94fe6060f1SDimitry Andric }
95fe6060f1SDimitry Andric
createM68kMCRelocationInfo(const Triple & TheTriple,MCContext & Ctx)96fe6060f1SDimitry Andric static MCRelocationInfo *createM68kMCRelocationInfo(const Triple &TheTriple,
97fe6060f1SDimitry Andric MCContext &Ctx) {
98fe6060f1SDimitry Andric // Default to the stock relocation info.
99fe6060f1SDimitry Andric return llvm::createMCRelocationInfo(TheTriple, Ctx);
100fe6060f1SDimitry Andric }
101fe6060f1SDimitry Andric
createM68kMCInstPrinter(const Triple & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI)102fe6060f1SDimitry Andric static MCInstPrinter *createM68kMCInstPrinter(const Triple &T,
103fe6060f1SDimitry Andric unsigned SyntaxVariant,
104fe6060f1SDimitry Andric const MCAsmInfo &MAI,
105fe6060f1SDimitry Andric const MCInstrInfo &MII,
106fe6060f1SDimitry Andric const MCRegisterInfo &MRI) {
107fe6060f1SDimitry Andric return new M68kInstPrinter(MAI, MII, MRI);
108fe6060f1SDimitry Andric }
109fe6060f1SDimitry Andric
LLVMInitializeM68kTargetMC()110fe6060f1SDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeM68kTargetMC() {
111fe6060f1SDimitry Andric Target &T = getTheM68kTarget();
112fe6060f1SDimitry Andric
113fe6060f1SDimitry Andric // Register the MC asm info.
114fe6060f1SDimitry Andric RegisterMCAsmInfoFn X(T, createM68kMCAsmInfo);
115fe6060f1SDimitry Andric
116fe6060f1SDimitry Andric // Register the MC instruction info.
117fe6060f1SDimitry Andric TargetRegistry::RegisterMCInstrInfo(T, createM68kMCInstrInfo);
118fe6060f1SDimitry Andric
119fe6060f1SDimitry Andric // Register the MC register info.
120fe6060f1SDimitry Andric TargetRegistry::RegisterMCRegInfo(T, createM68kMCRegisterInfo);
121fe6060f1SDimitry Andric
122fe6060f1SDimitry Andric // Register the MC subtarget info.
123fe6060f1SDimitry Andric TargetRegistry::RegisterMCSubtargetInfo(T, createM68kMCSubtargetInfo);
124fe6060f1SDimitry Andric
125fe6060f1SDimitry Andric // Register the code emitter.
126fe6060f1SDimitry Andric TargetRegistry::RegisterMCCodeEmitter(T, createM68kMCCodeEmitter);
127fe6060f1SDimitry Andric
128fe6060f1SDimitry Andric // Register the MCInstPrinter.
129fe6060f1SDimitry Andric TargetRegistry::RegisterMCInstPrinter(T, createM68kMCInstPrinter);
130fe6060f1SDimitry Andric
131fe6060f1SDimitry Andric // Register the MC relocation info.
132fe6060f1SDimitry Andric TargetRegistry::RegisterMCRelocationInfo(T, createM68kMCRelocationInfo);
133fe6060f1SDimitry Andric
134fe6060f1SDimitry Andric // Register the asm backend.
135fe6060f1SDimitry Andric TargetRegistry::RegisterMCAsmBackend(T, createM68kAsmBackend);
136fe6060f1SDimitry Andric }
137