1*04eeddc0SDimitry Andric //===-- M68kFrameLowering.h - Define frame lowering for M68k ----*- C++ -*-===// 2fe6060f1SDimitry Andric // 3fe6060f1SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4fe6060f1SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5fe6060f1SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6fe6060f1SDimitry Andric // 7fe6060f1SDimitry Andric //===----------------------------------------------------------------------===// 8fe6060f1SDimitry Andric /// 9fe6060f1SDimitry Andric /// \file 10fe6060f1SDimitry Andric /// This file contains the M68k declaration of TargetFrameLowering class. 11fe6060f1SDimitry Andric /// 12fe6060f1SDimitry Andric //===----------------------------------------------------------------------===// 13fe6060f1SDimitry Andric 14fe6060f1SDimitry Andric #ifndef LLVM_LIB_TARGET_M68K_M68KFRAMELOWERING_H 15fe6060f1SDimitry Andric #define LLVM_LIB_TARGET_M68K_M68KFRAMELOWERING_H 16fe6060f1SDimitry Andric 17fe6060f1SDimitry Andric #include "M68k.h" 18fe6060f1SDimitry Andric 19fe6060f1SDimitry Andric #include "llvm/CodeGen/TargetFrameLowering.h" 20fe6060f1SDimitry Andric 21fe6060f1SDimitry Andric namespace llvm { 22fe6060f1SDimitry Andric class MachineInstrBuilder; 23fe6060f1SDimitry Andric class MCCFIInstruction; 24fe6060f1SDimitry Andric class M68kSubtarget; 25fe6060f1SDimitry Andric class M68kRegisterInfo; 26fe6060f1SDimitry Andric struct Align; 27fe6060f1SDimitry Andric 28fe6060f1SDimitry Andric class M68kFrameLowering : public TargetFrameLowering { 29fe6060f1SDimitry Andric // Cached subtarget predicates. 30fe6060f1SDimitry Andric const M68kSubtarget &STI; 31fe6060f1SDimitry Andric const TargetInstrInfo &TII; 32fe6060f1SDimitry Andric const M68kRegisterInfo *TRI; 33fe6060f1SDimitry Andric 34fe6060f1SDimitry Andric /// Stack slot size in bytes. 35fe6060f1SDimitry Andric unsigned SlotSize; 36fe6060f1SDimitry Andric 37fe6060f1SDimitry Andric unsigned StackPtr; 38fe6060f1SDimitry Andric 39fe6060f1SDimitry Andric /// If we're forcing a stack realignment we can't rely on just the frame 40fe6060f1SDimitry Andric /// info, we need to know the ABI stack alignment as well in case we have a 41fe6060f1SDimitry Andric /// call out. Otherwise just make sure we have some alignment - we'll go 42fe6060f1SDimitry Andric /// with the minimum SlotSize. 43fe6060f1SDimitry Andric uint64_t calculateMaxStackAlign(const MachineFunction &MF) const; 44fe6060f1SDimitry Andric 45fe6060f1SDimitry Andric /// Adjusts the stack pointer using LEA, SUB, or ADD. 46fe6060f1SDimitry Andric MachineInstrBuilder BuildStackAdjustment(MachineBasicBlock &MBB, 47fe6060f1SDimitry Andric MachineBasicBlock::iterator MBBI, 48fe6060f1SDimitry Andric const DebugLoc &DL, int64_t Offset, 49fe6060f1SDimitry Andric bool InEpilogue) const; 50fe6060f1SDimitry Andric 51fe6060f1SDimitry Andric /// Aligns the stack pointer by ANDing it with -MaxAlign. 52fe6060f1SDimitry Andric void BuildStackAlignAND(MachineBasicBlock &MBB, 53fe6060f1SDimitry Andric MachineBasicBlock::iterator MBBI, const DebugLoc &DL, 54fe6060f1SDimitry Andric unsigned Reg, uint64_t MaxAlign) const; 55fe6060f1SDimitry Andric 56fe6060f1SDimitry Andric /// Wraps up getting a CFI index and building a MachineInstr for it. 57fe6060f1SDimitry Andric void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, 58fe6060f1SDimitry Andric const DebugLoc &DL, const MCCFIInstruction &CFIInst) const; 59fe6060f1SDimitry Andric 60fe6060f1SDimitry Andric void emitPrologueCalleeSavedFrameMoves(MachineBasicBlock &MBB, 61fe6060f1SDimitry Andric MachineBasicBlock::iterator MBBI, 62fe6060f1SDimitry Andric const DebugLoc &DL) const; 63fe6060f1SDimitry Andric 64fe6060f1SDimitry Andric unsigned getPSPSlotOffsetFromSP(const MachineFunction &MF) const; 65fe6060f1SDimitry Andric 66fe6060f1SDimitry Andric public: 67fe6060f1SDimitry Andric explicit M68kFrameLowering(const M68kSubtarget &sti, Align Alignment); 68fe6060f1SDimitry Andric 69fe6060f1SDimitry Andric static const M68kFrameLowering *create(const M68kSubtarget &ST); 70fe6060f1SDimitry Andric 71fe6060f1SDimitry Andric /// This method is called during prolog/epilog code insertion to eliminate 72fe6060f1SDimitry Andric /// call frame setup and destroy pseudo instructions (but only if the Target 73fe6060f1SDimitry Andric /// is using them). It is responsible for eliminating these instructions, 74fe6060f1SDimitry Andric /// replacing them with concrete instructions. This method need only be 75fe6060f1SDimitry Andric /// implemented if using call frame setup/destroy pseudo instructions. 76fe6060f1SDimitry Andric /// Returns an iterator pointing to the instruction after the replaced one. 77fe6060f1SDimitry Andric MachineBasicBlock::iterator 78fe6060f1SDimitry Andric eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 79fe6060f1SDimitry Andric MachineBasicBlock::iterator MI) const override; 80fe6060f1SDimitry Andric 81fe6060f1SDimitry Andric /// Insert prolog code into the function. 82fe6060f1SDimitry Andric void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 83fe6060f1SDimitry Andric 84fe6060f1SDimitry Andric /// Insert epilog code into the function. 85fe6060f1SDimitry Andric void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 86fe6060f1SDimitry Andric 87fe6060f1SDimitry Andric /// This method determines which of the registers reported by 88fe6060f1SDimitry Andric /// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved. 89fe6060f1SDimitry Andric /// The default implementation checks populates the \p SavedRegs bitset with 90fe6060f1SDimitry Andric /// all registers which are modified in the function, targets may override 91fe6060f1SDimitry Andric /// this function to save additional registers. 92fe6060f1SDimitry Andric /// This method also sets up the register scavenger ensuring there is a free 93fe6060f1SDimitry Andric /// register or a frameindex available. 94fe6060f1SDimitry Andric void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 95fe6060f1SDimitry Andric RegScavenger *RS = nullptr) const override; 96fe6060f1SDimitry Andric 97fe6060f1SDimitry Andric /// Allows target to override spill slot assignment logic. If implemented, 98fe6060f1SDimitry Andric /// assignCalleeSavedSpillSlots() should assign frame slots to all CSI 99fe6060f1SDimitry Andric /// entries and return true. If this method returns false, spill slots will 100fe6060f1SDimitry Andric /// be assigned using generic implementation. assignCalleeSavedSpillSlots() 101fe6060f1SDimitry Andric /// may add, delete or rearrange elements of CSI. 102fe6060f1SDimitry Andric bool 103fe6060f1SDimitry Andric assignCalleeSavedSpillSlots(MachineFunction &MF, 104fe6060f1SDimitry Andric const TargetRegisterInfo *TRI, 105fe6060f1SDimitry Andric std::vector<CalleeSavedInfo> &CSI) const override; 106fe6060f1SDimitry Andric 107fe6060f1SDimitry Andric /// Issues instruction(s) to spill all callee saved registers and returns 108fe6060f1SDimitry Andric /// true if it isn't possible / profitable to do so by issuing a series of 109fe6060f1SDimitry Andric /// store instructions via storeRegToStackSlot(). Returns false otherwise. 110fe6060f1SDimitry Andric bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 111fe6060f1SDimitry Andric MachineBasicBlock::iterator MI, 112fe6060f1SDimitry Andric ArrayRef<CalleeSavedInfo> CSI, 113fe6060f1SDimitry Andric const TargetRegisterInfo *TRI) const override; 114fe6060f1SDimitry Andric 115fe6060f1SDimitry Andric /// Issues instruction(s) to restore all callee saved registers and returns 116fe6060f1SDimitry Andric /// true if it isn't possible / profitable to do so by issuing a series of 117fe6060f1SDimitry Andric /// load instructions via loadRegToStackSlot(). Returns false otherwise. 118fe6060f1SDimitry Andric bool 119fe6060f1SDimitry Andric restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 120fe6060f1SDimitry Andric MachineBasicBlock::iterator MI, 121fe6060f1SDimitry Andric MutableArrayRef<CalleeSavedInfo> CSI, 122fe6060f1SDimitry Andric const TargetRegisterInfo *TRI) const override; 123fe6060f1SDimitry Andric 124fe6060f1SDimitry Andric /// Return true if the specified function should have a dedicated frame 125fe6060f1SDimitry Andric /// pointer register. This is true if the function has variable sized 126fe6060f1SDimitry Andric /// allocas, if it needs dynamic stack realignment, if frame pointer 127fe6060f1SDimitry Andric /// elimination is disabled, or if the frame address is taken. 128fe6060f1SDimitry Andric bool hasFP(const MachineFunction &MF) const override; 129fe6060f1SDimitry Andric 130fe6060f1SDimitry Andric /// Under normal circumstances, when a frame pointer is not required, we 131fe6060f1SDimitry Andric /// reserve argument space for call sites in the function immediately on 132fe6060f1SDimitry Andric /// entry to the current function. This eliminates the need for add/sub sp 133fe6060f1SDimitry Andric /// brackets around call sites. Returns true if the call frame is included as 134fe6060f1SDimitry Andric /// part of the stack frame. 135fe6060f1SDimitry Andric bool hasReservedCallFrame(const MachineFunction &MF) const override; 136fe6060f1SDimitry Andric 137fe6060f1SDimitry Andric /// If there is a reserved call frame, the call frame pseudos can be 138fe6060f1SDimitry Andric /// simplified. Having a FP, as in the default implementation, is not 139fe6060f1SDimitry Andric /// sufficient here since we can't always use it. Use a more nuanced 140fe6060f1SDimitry Andric /// condition. 141fe6060f1SDimitry Andric bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override; 142fe6060f1SDimitry Andric 143fe6060f1SDimitry Andric // Do we need to perform FI resolution for this function. Normally, this is 144fe6060f1SDimitry Andric // required only when the function has any stack objects. However, FI 145fe6060f1SDimitry Andric // resolution actually has another job, not apparent from the title - it 146fe6060f1SDimitry Andric // resolves callframe setup/destroy that were not simplified earlier. 147fe6060f1SDimitry Andric // 148fe6060f1SDimitry Andric // So, this is required for M68k functions that have push sequences even 149fe6060f1SDimitry Andric // when there are no stack objects. 150fe6060f1SDimitry Andric bool needsFrameIndexResolution(const MachineFunction &MF) const override; 151fe6060f1SDimitry Andric 152fe6060f1SDimitry Andric /// This method should return the base register and offset used to reference 153fe6060f1SDimitry Andric /// a frame index location. The offset is returned directly, and the base 154fe6060f1SDimitry Andric /// register is returned via FrameReg. 155fe6060f1SDimitry Andric StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, 156fe6060f1SDimitry Andric Register &FrameReg) const override; 157fe6060f1SDimitry Andric 158fe6060f1SDimitry Andric /// Check the instruction before/after the passed instruction. If 159fe6060f1SDimitry Andric /// it is an ADD/SUB/LEA instruction it is deleted argument and the 160fe6060f1SDimitry Andric /// stack adjustment is returned as a positive value for ADD/LEA and 161fe6060f1SDimitry Andric /// a negative for SUB. 162fe6060f1SDimitry Andric int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, 163fe6060f1SDimitry Andric bool doMergeWithPrevious) const; 164fe6060f1SDimitry Andric 165fe6060f1SDimitry Andric /// Emit a series of instructions to increment / decrement the stack 166fe6060f1SDimitry Andric /// pointer by a constant value. 167fe6060f1SDimitry Andric void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, 168fe6060f1SDimitry Andric int64_t NumBytes, bool InEpilogue) const; 169fe6060f1SDimitry Andric }; 170fe6060f1SDimitry Andric } // namespace llvm 171fe6060f1SDimitry Andric 172*04eeddc0SDimitry Andric #endif // LLVM_LIB_TARGET_M68K_M68KFRAMELOWERING_H 173