1*04eeddc0SDimitry Andric //===-- M68k.h - Top-level interface for M68k representation ----*- C++ -*-===// 2fe6060f1SDimitry Andric // 3fe6060f1SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4fe6060f1SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5fe6060f1SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6fe6060f1SDimitry Andric // 7fe6060f1SDimitry Andric //===----------------------------------------------------------------------===// 8fe6060f1SDimitry Andric /// 9fe6060f1SDimitry Andric /// \file 10fe6060f1SDimitry Andric /// This file contains the entry points for global functions defined in the 11fe6060f1SDimitry Andric /// M68k target library, as used by the LLVM JIT. 12fe6060f1SDimitry Andric /// 13fe6060f1SDimitry Andric //===----------------------------------------------------------------------===// 14fe6060f1SDimitry Andric 15fe6060f1SDimitry Andric #ifndef LLVM_LIB_TARGET_M68K_M68K_H 16fe6060f1SDimitry Andric #define LLVM_LIB_TARGET_M68K_M68K_H 17fe6060f1SDimitry Andric 18fe6060f1SDimitry Andric namespace llvm { 19fe6060f1SDimitry Andric 20fe6060f1SDimitry Andric class FunctionPass; 21fe6060f1SDimitry Andric class InstructionSelector; 22fe6060f1SDimitry Andric class M68kRegisterBankInfo; 23fe6060f1SDimitry Andric class M68kSubtarget; 24fe6060f1SDimitry Andric class M68kTargetMachine; 25fe6060f1SDimitry Andric 26fe6060f1SDimitry Andric /// This pass converts a legalized DAG into a M68k-specific DAG, ready for 27fe6060f1SDimitry Andric /// instruction scheduling. 28fe6060f1SDimitry Andric FunctionPass *createM68kISelDag(M68kTargetMachine &TM); 29fe6060f1SDimitry Andric 30fe6060f1SDimitry Andric /// Return a Machine IR pass that expands M68k-specific pseudo 31fe6060f1SDimitry Andric /// instructions into a sequence of actual instructions. This pass 32fe6060f1SDimitry Andric /// must run after prologue/epilogue insertion and before lowering 33fe6060f1SDimitry Andric /// the MachineInstr to MC. 34fe6060f1SDimitry Andric FunctionPass *createM68kExpandPseudoPass(); 35fe6060f1SDimitry Andric 36fe6060f1SDimitry Andric /// This pass initializes a global base register for PIC on M68k. 37fe6060f1SDimitry Andric FunctionPass *createM68kGlobalBaseRegPass(); 38fe6060f1SDimitry Andric 39fe6060f1SDimitry Andric /// Finds sequential MOVEM instruction and collapse them into a single one. This 40fe6060f1SDimitry Andric /// pass has to be run after all pseudo expansions and prologue/epilogue 41fe6060f1SDimitry Andric /// emission so that all possible MOVEM are already in place. 42fe6060f1SDimitry Andric FunctionPass *createM68kCollapseMOVEMPass(); 43fe6060f1SDimitry Andric 44fe6060f1SDimitry Andric /// Finds MOVE instructions before any conditioanl branch instruction and 45fe6060f1SDimitry Andric /// replaces them with MOVEM instruction. Motorola's MOVEs do trash(V,C) flags 46fe6060f1SDimitry Andric /// register which prevents branch from taking the correct route. This pass 47fe6060f1SDimitry Andric /// has to be run after all pseudo expansions and prologue/epilogue emission 48fe6060f1SDimitry Andric /// so that all possible MOVEs are present. 49fe6060f1SDimitry Andric FunctionPass *createM68kConvertMOVToMOVMPass(); 50fe6060f1SDimitry Andric 51fe6060f1SDimitry Andric InstructionSelector * 52fe6060f1SDimitry Andric createM68kInstructionSelector(const M68kTargetMachine &, const M68kSubtarget &, 53fe6060f1SDimitry Andric const M68kRegisterBankInfo &); 54fe6060f1SDimitry Andric 55fe6060f1SDimitry Andric } // namespace llvm 56fe6060f1SDimitry Andric 57*04eeddc0SDimitry Andric #endif // LLVM_LIB_TARGET_M68K_M68K_H 58