1*81ad6265SDimitry Andric //===-- LoongArchAsmBackend.cpp - LoongArch Assembler Backend -*- C++ -*---===// 2*81ad6265SDimitry Andric // 3*81ad6265SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*81ad6265SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*81ad6265SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*81ad6265SDimitry Andric // 7*81ad6265SDimitry Andric //===----------------------------------------------------------------------===// 8*81ad6265SDimitry Andric // 9*81ad6265SDimitry Andric // This file implements the LoongArchAsmBackend class. 10*81ad6265SDimitry Andric // 11*81ad6265SDimitry Andric //===----------------------------------------------------------------------===// 12*81ad6265SDimitry Andric 13*81ad6265SDimitry Andric #include "LoongArchAsmBackend.h" 14*81ad6265SDimitry Andric #include "llvm/MC/MCAsmLayout.h" 15*81ad6265SDimitry Andric #include "llvm/MC/MCAssembler.h" 16*81ad6265SDimitry Andric #include "llvm/MC/MCContext.h" 17*81ad6265SDimitry Andric #include "llvm/MC/MCELFObjectWriter.h" 18*81ad6265SDimitry Andric #include "llvm/Support/Endian.h" 19*81ad6265SDimitry Andric #include "llvm/Support/EndianStream.h" 20*81ad6265SDimitry Andric 21*81ad6265SDimitry Andric #define DEBUG_TYPE "loongarch-asmbackend" 22*81ad6265SDimitry Andric 23*81ad6265SDimitry Andric using namespace llvm; 24*81ad6265SDimitry Andric 25*81ad6265SDimitry Andric void LoongArchAsmBackend::applyFixup(const MCAssembler &Asm, 26*81ad6265SDimitry Andric const MCFixup &Fixup, 27*81ad6265SDimitry Andric const MCValue &Target, 28*81ad6265SDimitry Andric MutableArrayRef<char> Data, uint64_t Value, 29*81ad6265SDimitry Andric bool IsResolved, 30*81ad6265SDimitry Andric const MCSubtargetInfo *STI) const { 31*81ad6265SDimitry Andric // TODO: Apply the Value for given Fixup into the provided data fragment. 32*81ad6265SDimitry Andric return; 33*81ad6265SDimitry Andric } 34*81ad6265SDimitry Andric 35*81ad6265SDimitry Andric bool LoongArchAsmBackend::shouldForceRelocation(const MCAssembler &Asm, 36*81ad6265SDimitry Andric const MCFixup &Fixup, 37*81ad6265SDimitry Andric const MCValue &Target) { 38*81ad6265SDimitry Andric // TODO: Determine which relocation require special processing at linking 39*81ad6265SDimitry Andric // time. 40*81ad6265SDimitry Andric return false; 41*81ad6265SDimitry Andric } 42*81ad6265SDimitry Andric 43*81ad6265SDimitry Andric bool LoongArchAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count, 44*81ad6265SDimitry Andric const MCSubtargetInfo *STI) const { 45*81ad6265SDimitry Andric // Check for byte count not multiple of instruction word size 46*81ad6265SDimitry Andric if (Count % 4 != 0) 47*81ad6265SDimitry Andric return false; 48*81ad6265SDimitry Andric 49*81ad6265SDimitry Andric // The nop on LoongArch is andi r0, r0, 0. 50*81ad6265SDimitry Andric for (; Count >= 4; Count -= 4) 51*81ad6265SDimitry Andric support::endian::write<uint32_t>(OS, 0x03400000, support::little); 52*81ad6265SDimitry Andric 53*81ad6265SDimitry Andric return true; 54*81ad6265SDimitry Andric } 55*81ad6265SDimitry Andric 56*81ad6265SDimitry Andric std::unique_ptr<MCObjectTargetWriter> 57*81ad6265SDimitry Andric LoongArchAsmBackend::createObjectTargetWriter() const { 58*81ad6265SDimitry Andric return createLoongArchELFObjectWriter(OSABI, Is64Bit); 59*81ad6265SDimitry Andric } 60*81ad6265SDimitry Andric 61*81ad6265SDimitry Andric MCAsmBackend *llvm::createLoongArchAsmBackend(const Target &T, 62*81ad6265SDimitry Andric const MCSubtargetInfo &STI, 63*81ad6265SDimitry Andric const MCRegisterInfo &MRI, 64*81ad6265SDimitry Andric const MCTargetOptions &Options) { 65*81ad6265SDimitry Andric const Triple &TT = STI.getTargetTriple(); 66*81ad6265SDimitry Andric uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); 67*81ad6265SDimitry Andric return new LoongArchAsmBackend(STI, OSABI, TT.isArch64Bit()); 68*81ad6265SDimitry Andric } 69