1*e8d8bef9SDimitry Andric//===-- CSKY.td - Describe the CSKY Target Machine ---------*- tablegen -*-===// 2*e8d8bef9SDimitry Andric// 3*e8d8bef9SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*e8d8bef9SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*e8d8bef9SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*e8d8bef9SDimitry Andric// 7*e8d8bef9SDimitry Andric//===----------------------------------------------------------------------===// 8*e8d8bef9SDimitry Andric 9*e8d8bef9SDimitry Andricinclude "llvm/Target/Target.td" 10*e8d8bef9SDimitry Andric 11*e8d8bef9SDimitry Andric//===----------------------------------------------------------------------===// 12*e8d8bef9SDimitry Andric// Registers, calling conventions, instruction descriptions. 13*e8d8bef9SDimitry Andric//===----------------------------------------------------------------------===// 14*e8d8bef9SDimitry Andric 15*e8d8bef9SDimitry Andricinclude "CSKYRegisterInfo.td" 16*e8d8bef9SDimitry Andricinclude "CSKYInstrInfo.td" 17*e8d8bef9SDimitry Andric 18*e8d8bef9SDimitry Andric//===----------------------------------------------------------------------===// 19*e8d8bef9SDimitry Andric// CSKY processors supported. 20*e8d8bef9SDimitry Andric//===----------------------------------------------------------------------===// 21*e8d8bef9SDimitry Andric 22*e8d8bef9SDimitry Andricdef : ProcessorModel<"generic-csky", NoSchedModel, []>; 23*e8d8bef9SDimitry Andric 24*e8d8bef9SDimitry Andric//===----------------------------------------------------------------------===// 25*e8d8bef9SDimitry Andric// Define the CSKY target. 26*e8d8bef9SDimitry Andric//===----------------------------------------------------------------------===// 27*e8d8bef9SDimitry Andric 28*e8d8bef9SDimitry Andricdef CSKYInstrInfo : InstrInfo; 29*e8d8bef9SDimitry Andric 30*e8d8bef9SDimitry Andricdef CSKY : Target { 31*e8d8bef9SDimitry Andric let InstructionSet = CSKYInstrInfo; 32*e8d8bef9SDimitry Andric} 33