xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp (revision 297eecfb02bb25902531dbb5c3b9a88caf8adf29)
10b57cec5SDimitry Andric //===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - Assembly Info ------------------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric /// \file
80b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
90b57cec5SDimitry Andric 
100b57cec5SDimitry Andric #include "AMDGPUMCAsmInfo.h"
110b57cec5SDimitry Andric #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
12*06c3fb27SDimitry Andric #include "llvm/MC/MCSubtargetInfo.h"
13*06c3fb27SDimitry Andric #include "llvm/TargetParser/Triple.h"
140b57cec5SDimitry Andric 
150b57cec5SDimitry Andric using namespace llvm;
160b57cec5SDimitry Andric 
AMDGPUMCAsmInfo(const Triple & TT,const MCTargetOptions & Options)17480093f4SDimitry Andric AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
1804eeddc0SDimitry Andric                                  const MCTargetOptions &Options) {
190b57cec5SDimitry Andric   CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4;
200b57cec5SDimitry Andric   StackGrowsUp = true;
210b57cec5SDimitry Andric   HasSingleParameterDotFile = false;
220b57cec5SDimitry Andric   //===------------------------------------------------------------------===//
230b57cec5SDimitry Andric   MinInstAlignment = 4;
240b57cec5SDimitry Andric 
250b57cec5SDimitry Andric   // This is the maximum instruction encoded size for gfx10. With a known
260b57cec5SDimitry Andric   // subtarget, it can be reduced to 8 bytes.
270b57cec5SDimitry Andric   MaxInstLength = (TT.getArch() == Triple::amdgcn) ? 20 : 16;
280b57cec5SDimitry Andric   SeparatorString = "\n";
290b57cec5SDimitry Andric   CommentString = ";";
300b57cec5SDimitry Andric   InlineAsmStart = ";#ASMSTART";
310b57cec5SDimitry Andric   InlineAsmEnd = ";#ASMEND";
320b57cec5SDimitry Andric 
330b57cec5SDimitry Andric   //===--- Data Emission Directives -------------------------------------===//
340b57cec5SDimitry Andric   UsesELFSectionDirectiveForBSS = true;
350b57cec5SDimitry Andric 
360b57cec5SDimitry Andric   //===--- Global Variable Emission Directives --------------------------===//
370b57cec5SDimitry Andric   HasAggressiveSymbolFolding = true;
380b57cec5SDimitry Andric   COMMDirectiveAlignmentIsInBytes = false;
390b57cec5SDimitry Andric   HasNoDeadStrip = true;
400b57cec5SDimitry Andric   //===--- Dwarf Emission Directives -----------------------------------===//
410b57cec5SDimitry Andric   SupportsDebugInformation = true;
42*06c3fb27SDimitry Andric   UsesCFIWithoutEH = true;
435ffd83dbSDimitry Andric   DwarfRegNumForCFI = true;
445ffd83dbSDimitry Andric 
455ffd83dbSDimitry Andric   UseIntegratedAssembler = false;
460b57cec5SDimitry Andric }
470b57cec5SDimitry Andric 
shouldOmitSectionDirective(StringRef SectionName) const480b57cec5SDimitry Andric bool AMDGPUMCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const {
490b57cec5SDimitry Andric   return SectionName == ".hsatext" || SectionName == ".hsadata_global_agent" ||
500b57cec5SDimitry Andric          SectionName == ".hsadata_global_program" ||
510b57cec5SDimitry Andric          SectionName == ".hsarodata_readonly_agent" ||
520b57cec5SDimitry Andric          MCAsmInfo::shouldOmitSectionDirective(SectionName);
530b57cec5SDimitry Andric }
540b57cec5SDimitry Andric 
getMaxInstLength(const MCSubtargetInfo * STI) const550b57cec5SDimitry Andric unsigned AMDGPUMCAsmInfo::getMaxInstLength(const MCSubtargetInfo *STI) const {
560b57cec5SDimitry Andric   if (!STI || STI->getTargetTriple().getArch() == Triple::r600)
570b57cec5SDimitry Andric     return MaxInstLength;
580b57cec5SDimitry Andric 
590b57cec5SDimitry Andric   // Maximum for NSA encoded images
60*06c3fb27SDimitry Andric   if (STI->hasFeature(AMDGPU::FeatureNSAEncoding))
610b57cec5SDimitry Andric     return 20;
620b57cec5SDimitry Andric 
630b57cec5SDimitry Andric   // 64-bit instruction with 32-bit literal.
64*06c3fb27SDimitry Andric   if (STI->hasFeature(AMDGPU::FeatureVOP3Literal))
650b57cec5SDimitry Andric     return 12;
660b57cec5SDimitry Andric 
670b57cec5SDimitry Andric   return 8;
680b57cec5SDimitry Andric }
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