xref: /freebsd-src/contrib/llvm-project/llvm/lib/Analysis/TargetTransformInfo.cpp (revision 647cbc5de815c5651677bf8582797f716ec7b48d) 
1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "llvm/Analysis/TargetTransformInfo.h"
10 #include "llvm/Analysis/CFG.h"
11 #include "llvm/Analysis/LoopIterator.h"
12 #include "llvm/Analysis/TargetTransformInfoImpl.h"
13 #include "llvm/IR/CFG.h"
14 #include "llvm/IR/Dominators.h"
15 #include "llvm/IR/Instruction.h"
16 #include "llvm/IR/Instructions.h"
17 #include "llvm/IR/IntrinsicInst.h"
18 #include "llvm/IR/Module.h"
19 #include "llvm/IR/Operator.h"
20 #include "llvm/IR/PatternMatch.h"
21 #include "llvm/InitializePasses.h"
22 #include "llvm/Support/CommandLine.h"
23 #include <optional>
24 #include <utility>
25 
26 using namespace llvm;
27 using namespace PatternMatch;
28 
29 #define DEBUG_TYPE "tti"
30 
31 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
32                                      cl::Hidden,
33                                      cl::desc("Recognize reduction patterns."));
34 
35 static cl::opt<unsigned> CacheLineSize(
36     "cache-line-size", cl::init(0), cl::Hidden,
37     cl::desc("Use this to override the target cache line size when "
38              "specified by the user."));
39 
40 static cl::opt<unsigned> PredictableBranchThreshold(
41     "predictable-branch-threshold", cl::init(99), cl::Hidden,
42     cl::desc(
43         "Use this to override the target's predictable branch threshold (%)."));
44 
45 namespace {
46 /// No-op implementation of the TTI interface using the utility base
47 /// classes.
48 ///
49 /// This is used when no target specific information is available.
50 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
51   explicit NoTTIImpl(const DataLayout &DL)
52       : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
53 };
54 } // namespace
55 
56 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
57   // If the loop has irreducible control flow, it can not be converted to
58   // Hardware loop.
59   LoopBlocksRPO RPOT(L);
60   RPOT.perform(&LI);
61   if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
62     return false;
63   return true;
64 }
65 
66 IntrinsicCostAttributes::IntrinsicCostAttributes(
67     Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
68     bool TypeBasedOnly)
69     : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id),
70       ScalarizationCost(ScalarizationCost) {
71 
72   if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
73     FMF = FPMO->getFastMathFlags();
74 
75   if (!TypeBasedOnly)
76     Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end());
77   FunctionType *FTy = CI.getCalledFunction()->getFunctionType();
78   ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
79 }
80 
81 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
82                                                  ArrayRef<Type *> Tys,
83                                                  FastMathFlags Flags,
84                                                  const IntrinsicInst *I,
85                                                  InstructionCost ScalarCost)
86     : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
87   ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
88 }
89 
90 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
91                                                  ArrayRef<const Value *> Args)
92     : RetTy(Ty), IID(Id) {
93 
94   Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
95   ParamTys.reserve(Arguments.size());
96   for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx)
97     ParamTys.push_back(Arguments[Idx]->getType());
98 }
99 
100 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
101                                                  ArrayRef<const Value *> Args,
102                                                  ArrayRef<Type *> Tys,
103                                                  FastMathFlags Flags,
104                                                  const IntrinsicInst *I,
105                                                  InstructionCost ScalarCost)
106     : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
107   ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
108   Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
109 }
110 
111 HardwareLoopInfo::HardwareLoopInfo(Loop *L) : L(L) {
112   // Match default options:
113   // - hardware-loop-counter-bitwidth = 32
114   // - hardware-loop-decrement = 1
115   CountType = Type::getInt32Ty(L->getHeader()->getContext());
116   LoopDecrement = ConstantInt::get(CountType, 1);
117 }
118 
119 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
120                                                LoopInfo &LI, DominatorTree &DT,
121                                                bool ForceNestedLoop,
122                                                bool ForceHardwareLoopPHI) {
123   SmallVector<BasicBlock *, 4> ExitingBlocks;
124   L->getExitingBlocks(ExitingBlocks);
125 
126   for (BasicBlock *BB : ExitingBlocks) {
127     // If we pass the updated counter back through a phi, we need to know
128     // which latch the updated value will be coming from.
129     if (!L->isLoopLatch(BB)) {
130       if (ForceHardwareLoopPHI || CounterInReg)
131         continue;
132     }
133 
134     const SCEV *EC = SE.getExitCount(L, BB);
135     if (isa<SCEVCouldNotCompute>(EC))
136       continue;
137     if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
138       if (ConstEC->getValue()->isZero())
139         continue;
140     } else if (!SE.isLoopInvariant(EC, L))
141       continue;
142 
143     if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth())
144       continue;
145 
146     // If this exiting block is contained in a nested loop, it is not eligible
147     // for insertion of the branch-and-decrement since the inner loop would
148     // end up messing up the value in the CTR.
149     if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
150       continue;
151 
152     // We now have a loop-invariant count of loop iterations (which is not the
153     // constant zero) for which we know that this loop will not exit via this
154     // existing block.
155 
156     // We need to make sure that this block will run on every loop iteration.
157     // For this to be true, we must dominate all blocks with backedges. Such
158     // blocks are in-loop predecessors to the header block.
159     bool NotAlways = false;
160     for (BasicBlock *Pred : predecessors(L->getHeader())) {
161       if (!L->contains(Pred))
162         continue;
163 
164       if (!DT.dominates(BB, Pred)) {
165         NotAlways = true;
166         break;
167       }
168     }
169 
170     if (NotAlways)
171       continue;
172 
173     // Make sure this blocks ends with a conditional branch.
174     Instruction *TI = BB->getTerminator();
175     if (!TI)
176       continue;
177 
178     if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
179       if (!BI->isConditional())
180         continue;
181 
182       ExitBranch = BI;
183     } else
184       continue;
185 
186     // Note that this block may not be the loop latch block, even if the loop
187     // has a latch block.
188     ExitBlock = BB;
189     ExitCount = EC;
190     break;
191   }
192 
193   if (!ExitBlock)
194     return false;
195   return true;
196 }
197 
198 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
199     : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
200 
201 TargetTransformInfo::~TargetTransformInfo() = default;
202 
203 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
204     : TTIImpl(std::move(Arg.TTIImpl)) {}
205 
206 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
207   TTIImpl = std::move(RHS.TTIImpl);
208   return *this;
209 }
210 
211 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
212   return TTIImpl->getInliningThresholdMultiplier();
213 }
214 
215 unsigned
216 TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const {
217   return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
218 }
219 
220 unsigned
221 TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier()
222     const {
223   return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
224 }
225 
226 unsigned
227 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
228   return TTIImpl->adjustInliningThreshold(CB);
229 }
230 
231 unsigned TargetTransformInfo::getCallerAllocaCost(const CallBase *CB,
232                                                   const AllocaInst *AI) const {
233   return TTIImpl->getCallerAllocaCost(CB, AI);
234 }
235 
236 int TargetTransformInfo::getInlinerVectorBonusPercent() const {
237   return TTIImpl->getInlinerVectorBonusPercent();
238 }
239 
240 InstructionCost TargetTransformInfo::getGEPCost(
241     Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
242     Type *AccessType, TTI::TargetCostKind CostKind) const {
243   return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
244 }
245 
246 InstructionCost TargetTransformInfo::getPointersChainCost(
247     ArrayRef<const Value *> Ptrs, const Value *Base,
248     const TTI::PointersChainInfo &Info, Type *AccessTy,
249     TTI::TargetCostKind CostKind) const {
250   assert((Base || !Info.isSameBase()) &&
251          "If pointers have same base address it has to be provided.");
252   return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
253 }
254 
255 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
256     const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
257     BlockFrequencyInfo *BFI) const {
258   return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
259 }
260 
261 InstructionCost
262 TargetTransformInfo::getInstructionCost(const User *U,
263                                         ArrayRef<const Value *> Operands,
264                                         enum TargetCostKind CostKind) const {
265   InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
266   assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
267          "TTI should not produce negative costs!");
268   return Cost;
269 }
270 
271 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
272   return PredictableBranchThreshold.getNumOccurrences() > 0
273              ? BranchProbability(PredictableBranchThreshold, 100)
274              : TTIImpl->getPredictableBranchThreshold();
275 }
276 
277 bool TargetTransformInfo::hasBranchDivergence(const Function *F) const {
278   return TTIImpl->hasBranchDivergence(F);
279 }
280 
281 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const {
282   return TTIImpl->isSourceOfDivergence(V);
283 }
284 
285 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const {
286   return TTIImpl->isAlwaysUniform(V);
287 }
288 
289 bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
290                                                      unsigned ToAS) const {
291   return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
292 }
293 
294 bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
295                                                    unsigned ToAS) const {
296   return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
297 }
298 
299 unsigned TargetTransformInfo::getFlatAddressSpace() const {
300   return TTIImpl->getFlatAddressSpace();
301 }
302 
303 bool TargetTransformInfo::collectFlatAddressOperands(
304     SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
305   return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
306 }
307 
308 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
309                                               unsigned ToAS) const {
310   return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
311 }
312 
313 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(
314     unsigned AS) const {
315   return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
316 }
317 
318 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
319   return TTIImpl->getAssumedAddrSpace(V);
320 }
321 
322 bool TargetTransformInfo::isSingleThreaded() const {
323   return TTIImpl->isSingleThreaded();
324 }
325 
326 std::pair<const Value *, unsigned>
327 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const {
328   return TTIImpl->getPredicatedAddrSpace(V);
329 }
330 
331 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
332     IntrinsicInst *II, Value *OldV, Value *NewV) const {
333   return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
334 }
335 
336 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
337   return TTIImpl->isLoweredToCall(F);
338 }
339 
340 bool TargetTransformInfo::isHardwareLoopProfitable(
341     Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
342     TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
343   return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
344 }
345 
346 bool TargetTransformInfo::preferPredicateOverEpilogue(
347     TailFoldingInfo *TFI) const {
348   return TTIImpl->preferPredicateOverEpilogue(TFI);
349 }
350 
351 TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle(
352     bool IVUpdateMayOverflow) const {
353   return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
354 }
355 
356 std::optional<Instruction *>
357 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
358                                           IntrinsicInst &II) const {
359   return TTIImpl->instCombineIntrinsic(IC, II);
360 }
361 
362 std::optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
363     InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
364     bool &KnownBitsComputed) const {
365   return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
366                                                    KnownBitsComputed);
367 }
368 
369 std::optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
370     InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
371     APInt &UndefElts2, APInt &UndefElts3,
372     std::function<void(Instruction *, unsigned, APInt, APInt &)>
373         SimplifyAndSetOp) const {
374   return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
375       IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
376       SimplifyAndSetOp);
377 }
378 
379 void TargetTransformInfo::getUnrollingPreferences(
380     Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP,
381     OptimizationRemarkEmitter *ORE) const {
382   return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
383 }
384 
385 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
386                                                 PeelingPreferences &PP) const {
387   return TTIImpl->getPeelingPreferences(L, SE, PP);
388 }
389 
390 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
391   return TTIImpl->isLegalAddImmediate(Imm);
392 }
393 
394 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
395   return TTIImpl->isLegalICmpImmediate(Imm);
396 }
397 
398 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
399                                                 int64_t BaseOffset,
400                                                 bool HasBaseReg, int64_t Scale,
401                                                 unsigned AddrSpace,
402                                                 Instruction *I) const {
403   return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
404                                         Scale, AddrSpace, I);
405 }
406 
407 bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1,
408                                         const LSRCost &C2) const {
409   return TTIImpl->isLSRCostLess(C1, C2);
410 }
411 
412 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
413   return TTIImpl->isNumRegsMajorCostOfLSR();
414 }
415 
416 bool TargetTransformInfo::shouldFoldTerminatingConditionAfterLSR() const {
417   return TTIImpl->shouldFoldTerminatingConditionAfterLSR();
418 }
419 
420 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
421   return TTIImpl->isProfitableLSRChainElement(I);
422 }
423 
424 bool TargetTransformInfo::canMacroFuseCmp() const {
425   return TTIImpl->canMacroFuseCmp();
426 }
427 
428 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI,
429                                      ScalarEvolution *SE, LoopInfo *LI,
430                                      DominatorTree *DT, AssumptionCache *AC,
431                                      TargetLibraryInfo *LibInfo) const {
432   return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
433 }
434 
435 TTI::AddressingModeKind
436 TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
437                                                 ScalarEvolution *SE) const {
438   return TTIImpl->getPreferredAddressingMode(L, SE);
439 }
440 
441 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType,
442                                              Align Alignment) const {
443   return TTIImpl->isLegalMaskedStore(DataType, Alignment);
444 }
445 
446 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType,
447                                             Align Alignment) const {
448   return TTIImpl->isLegalMaskedLoad(DataType, Alignment);
449 }
450 
451 bool TargetTransformInfo::isLegalNTStore(Type *DataType,
452                                          Align Alignment) const {
453   return TTIImpl->isLegalNTStore(DataType, Alignment);
454 }
455 
456 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
457   return TTIImpl->isLegalNTLoad(DataType, Alignment);
458 }
459 
460 bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy,
461                                                ElementCount NumElements) const {
462   return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
463 }
464 
465 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
466                                               Align Alignment) const {
467   return TTIImpl->isLegalMaskedGather(DataType, Alignment);
468 }
469 
470 bool TargetTransformInfo::isLegalAltInstr(
471     VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
472     const SmallBitVector &OpcodeMask) const {
473   return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
474 }
475 
476 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
477                                                Align Alignment) const {
478   return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
479 }
480 
481 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType,
482                                                      Align Alignment) const {
483   return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
484 }
485 
486 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType,
487                                                       Align Alignment) const {
488   return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
489 }
490 
491 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const {
492   return TTIImpl->isLegalMaskedCompressStore(DataType);
493 }
494 
495 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const {
496   return TTIImpl->isLegalMaskedExpandLoad(DataType);
497 }
498 
499 bool TargetTransformInfo::enableOrderedReductions() const {
500   return TTIImpl->enableOrderedReductions();
501 }
502 
503 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
504   return TTIImpl->hasDivRemOp(DataType, IsSigned);
505 }
506 
507 bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
508                                              unsigned AddrSpace) const {
509   return TTIImpl->hasVolatileVariant(I, AddrSpace);
510 }
511 
512 bool TargetTransformInfo::prefersVectorizedAddressing() const {
513   return TTIImpl->prefersVectorizedAddressing();
514 }
515 
516 InstructionCost TargetTransformInfo::getScalingFactorCost(
517     Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
518     int64_t Scale, unsigned AddrSpace) const {
519   InstructionCost Cost = TTIImpl->getScalingFactorCost(
520       Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
521   assert(Cost >= 0 && "TTI should not produce negative costs!");
522   return Cost;
523 }
524 
525 bool TargetTransformInfo::LSRWithInstrQueries() const {
526   return TTIImpl->LSRWithInstrQueries();
527 }
528 
529 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
530   return TTIImpl->isTruncateFree(Ty1, Ty2);
531 }
532 
533 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
534   return TTIImpl->isProfitableToHoist(I);
535 }
536 
537 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
538 
539 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
540   return TTIImpl->isTypeLegal(Ty);
541 }
542 
543 unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const {
544   return TTIImpl->getRegUsageForType(Ty);
545 }
546 
547 bool TargetTransformInfo::shouldBuildLookupTables() const {
548   return TTIImpl->shouldBuildLookupTables();
549 }
550 
551 bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
552     Constant *C) const {
553   return TTIImpl->shouldBuildLookupTablesForConstant(C);
554 }
555 
556 bool TargetTransformInfo::shouldBuildRelLookupTables() const {
557   return TTIImpl->shouldBuildRelLookupTables();
558 }
559 
560 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
561   return TTIImpl->useColdCCForColdCall(F);
562 }
563 
564 InstructionCost TargetTransformInfo::getScalarizationOverhead(
565     VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
566     TTI::TargetCostKind CostKind) const {
567   return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
568                                            CostKind);
569 }
570 
571 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
572     ArrayRef<const Value *> Args, ArrayRef<Type *> Tys,
573     TTI::TargetCostKind CostKind) const {
574   return TTIImpl->getOperandsScalarizationOverhead(Args, Tys, CostKind);
575 }
576 
577 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
578   return TTIImpl->supportsEfficientVectorElementLoadStore();
579 }
580 
581 bool TargetTransformInfo::supportsTailCalls() const {
582   return TTIImpl->supportsTailCalls();
583 }
584 
585 bool TargetTransformInfo::supportsTailCallFor(const CallBase *CB) const {
586   return TTIImpl->supportsTailCallFor(CB);
587 }
588 
589 bool TargetTransformInfo::enableAggressiveInterleaving(
590     bool LoopHasReductions) const {
591   return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
592 }
593 
594 TargetTransformInfo::MemCmpExpansionOptions
595 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
596   return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
597 }
598 
599 bool TargetTransformInfo::enableSelectOptimize() const {
600   return TTIImpl->enableSelectOptimize();
601 }
602 
603 bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
604   return TTIImpl->enableInterleavedAccessVectorization();
605 }
606 
607 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
608   return TTIImpl->enableMaskedInterleavedAccessVectorization();
609 }
610 
611 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
612   return TTIImpl->isFPVectorizationPotentiallyUnsafe();
613 }
614 
615 bool
616 TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
617                                                     unsigned BitWidth,
618                                                     unsigned AddressSpace,
619                                                     Align Alignment,
620                                                     unsigned *Fast) const {
621   return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
622                                                  AddressSpace, Alignment, Fast);
623 }
624 
625 TargetTransformInfo::PopcntSupportKind
626 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
627   return TTIImpl->getPopcntSupport(IntTyWidthInBit);
628 }
629 
630 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
631   return TTIImpl->haveFastSqrt(Ty);
632 }
633 
634 bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(
635     const Instruction *I) const {
636   return TTIImpl->isExpensiveToSpeculativelyExecute(I);
637 }
638 
639 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
640   return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
641 }
642 
643 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
644   InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
645   assert(Cost >= 0 && "TTI should not produce negative costs!");
646   return Cost;
647 }
648 
649 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
650                                                            unsigned Idx,
651                                                            const APInt &Imm,
652                                                            Type *Ty) const {
653   InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
654   assert(Cost >= 0 && "TTI should not produce negative costs!");
655   return Cost;
656 }
657 
658 InstructionCost
659 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
660                                    TTI::TargetCostKind CostKind) const {
661   InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
662   assert(Cost >= 0 && "TTI should not produce negative costs!");
663   return Cost;
664 }
665 
666 InstructionCost TargetTransformInfo::getIntImmCostInst(
667     unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
668     TTI::TargetCostKind CostKind, Instruction *Inst) const {
669   InstructionCost Cost =
670       TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
671   assert(Cost >= 0 && "TTI should not produce negative costs!");
672   return Cost;
673 }
674 
675 InstructionCost
676 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
677                                          const APInt &Imm, Type *Ty,
678                                          TTI::TargetCostKind CostKind) const {
679   InstructionCost Cost =
680       TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
681   assert(Cost >= 0 && "TTI should not produce negative costs!");
682   return Cost;
683 }
684 
685 bool TargetTransformInfo::preferToKeepConstantsAttached(
686     const Instruction &Inst, const Function &Fn) const {
687   return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
688 }
689 
690 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
691   return TTIImpl->getNumberOfRegisters(ClassID);
692 }
693 
694 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
695                                                       Type *Ty) const {
696   return TTIImpl->getRegisterClassForType(Vector, Ty);
697 }
698 
699 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
700   return TTIImpl->getRegisterClassName(ClassID);
701 }
702 
703 TypeSize TargetTransformInfo::getRegisterBitWidth(
704     TargetTransformInfo::RegisterKind K) const {
705   return TTIImpl->getRegisterBitWidth(K);
706 }
707 
708 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
709   return TTIImpl->getMinVectorRegisterBitWidth();
710 }
711 
712 std::optional<unsigned> TargetTransformInfo::getMaxVScale() const {
713   return TTIImpl->getMaxVScale();
714 }
715 
716 std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
717   return TTIImpl->getVScaleForTuning();
718 }
719 
720 bool TargetTransformInfo::isVScaleKnownToBeAPowerOfTwo() const {
721   return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
722 }
723 
724 bool TargetTransformInfo::shouldMaximizeVectorBandwidth(
725     TargetTransformInfo::RegisterKind K) const {
726   return TTIImpl->shouldMaximizeVectorBandwidth(K);
727 }
728 
729 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
730                                                bool IsScalable) const {
731   return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
732 }
733 
734 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
735                                            unsigned Opcode) const {
736   return TTIImpl->getMaximumVF(ElemWidth, Opcode);
737 }
738 
739 unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
740                                                 Type *ScalarValTy) const {
741   return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
742 }
743 
744 bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
745     const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
746   return TTIImpl->shouldConsiderAddressTypePromotion(
747       I, AllowPromotionWithoutCommonHeader);
748 }
749 
750 unsigned TargetTransformInfo::getCacheLineSize() const {
751   return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
752                                                : TTIImpl->getCacheLineSize();
753 }
754 
755 std::optional<unsigned>
756 TargetTransformInfo::getCacheSize(CacheLevel Level) const {
757   return TTIImpl->getCacheSize(Level);
758 }
759 
760 std::optional<unsigned>
761 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
762   return TTIImpl->getCacheAssociativity(Level);
763 }
764 
765 unsigned TargetTransformInfo::getPrefetchDistance() const {
766   return TTIImpl->getPrefetchDistance();
767 }
768 
769 unsigned TargetTransformInfo::getMinPrefetchStride(
770     unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
771     unsigned NumPrefetches, bool HasCall) const {
772   return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
773                                        NumPrefetches, HasCall);
774 }
775 
776 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
777   return TTIImpl->getMaxPrefetchIterationsAhead();
778 }
779 
780 bool TargetTransformInfo::enableWritePrefetching() const {
781   return TTIImpl->enableWritePrefetching();
782 }
783 
784 bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
785   return TTIImpl->shouldPrefetchAddressSpace(AS);
786 }
787 
788 unsigned TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF) const {
789   return TTIImpl->getMaxInterleaveFactor(VF);
790 }
791 
792 TargetTransformInfo::OperandValueInfo
793 TargetTransformInfo::getOperandInfo(const Value *V) {
794   OperandValueKind OpInfo = OK_AnyValue;
795   OperandValueProperties OpProps = OP_None;
796 
797   if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
798     if (const auto *CI = dyn_cast<ConstantInt>(V)) {
799       if (CI->getValue().isPowerOf2())
800         OpProps = OP_PowerOf2;
801       else if (CI->getValue().isNegatedPowerOf2())
802         OpProps = OP_NegatedPowerOf2;
803     }
804     return {OK_UniformConstantValue, OpProps};
805   }
806 
807   // A broadcast shuffle creates a uniform value.
808   // TODO: Add support for non-zero index broadcasts.
809   // TODO: Add support for different source vector width.
810   if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
811     if (ShuffleInst->isZeroEltSplat())
812       OpInfo = OK_UniformValue;
813 
814   const Value *Splat = getSplatValue(V);
815 
816   // Check for a splat of a constant or for a non uniform vector of constants
817   // and check if the constant(s) are all powers of two.
818   if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
819     OpInfo = OK_NonUniformConstantValue;
820     if (Splat) {
821       OpInfo = OK_UniformConstantValue;
822       if (auto *CI = dyn_cast<ConstantInt>(Splat)) {
823         if (CI->getValue().isPowerOf2())
824           OpProps = OP_PowerOf2;
825         else if (CI->getValue().isNegatedPowerOf2())
826           OpProps = OP_NegatedPowerOf2;
827       }
828     } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
829       bool AllPow2 = true, AllNegPow2 = true;
830       for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) {
831         if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) {
832           AllPow2 &= CI->getValue().isPowerOf2();
833           AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
834           if (AllPow2 || AllNegPow2)
835             continue;
836         }
837         AllPow2 = AllNegPow2 = false;
838         break;
839       }
840       OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
841       OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
842     }
843   }
844 
845   // Check for a splat of a uniform value. This is not loop aware, so return
846   // true only for the obviously uniform cases (argument, globalvalue)
847   if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
848     OpInfo = OK_UniformValue;
849 
850   return {OpInfo, OpProps};
851 }
852 
853 InstructionCost TargetTransformInfo::getArithmeticInstrCost(
854     unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
855     OperandValueInfo Op1Info, OperandValueInfo Op2Info,
856     ArrayRef<const Value *> Args, const Instruction *CxtI) const {
857   InstructionCost Cost =
858       TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind,
859                                       Op1Info, Op2Info,
860                                       Args, CxtI);
861   assert(Cost >= 0 && "TTI should not produce negative costs!");
862   return Cost;
863 }
864 
865 InstructionCost TargetTransformInfo::getAltInstrCost(
866     VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
867     const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const {
868   InstructionCost Cost =
869       TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
870   assert(Cost >= 0 && "TTI should not produce negative costs!");
871   return Cost;
872 }
873 
874 InstructionCost TargetTransformInfo::getShuffleCost(
875     ShuffleKind Kind, VectorType *Ty, ArrayRef<int> Mask,
876     TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
877     ArrayRef<const Value *> Args) const {
878   InstructionCost Cost =
879       TTIImpl->getShuffleCost(Kind, Ty, Mask, CostKind, Index, SubTp, Args);
880   assert(Cost >= 0 && "TTI should not produce negative costs!");
881   return Cost;
882 }
883 
884 TTI::CastContextHint
885 TargetTransformInfo::getCastContextHint(const Instruction *I) {
886   if (!I)
887     return CastContextHint::None;
888 
889   auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
890                              unsigned GatScatOp) {
891     const Instruction *I = dyn_cast<Instruction>(V);
892     if (!I)
893       return CastContextHint::None;
894 
895     if (I->getOpcode() == LdStOp)
896       return CastContextHint::Normal;
897 
898     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
899       if (II->getIntrinsicID() == MaskedOp)
900         return TTI::CastContextHint::Masked;
901       if (II->getIntrinsicID() == GatScatOp)
902         return TTI::CastContextHint::GatherScatter;
903     }
904 
905     return TTI::CastContextHint::None;
906   };
907 
908   switch (I->getOpcode()) {
909   case Instruction::ZExt:
910   case Instruction::SExt:
911   case Instruction::FPExt:
912     return getLoadStoreKind(I->getOperand(0), Instruction::Load,
913                             Intrinsic::masked_load, Intrinsic::masked_gather);
914   case Instruction::Trunc:
915   case Instruction::FPTrunc:
916     if (I->hasOneUse())
917       return getLoadStoreKind(*I->user_begin(), Instruction::Store,
918                               Intrinsic::masked_store,
919                               Intrinsic::masked_scatter);
920     break;
921   default:
922     return CastContextHint::None;
923   }
924 
925   return TTI::CastContextHint::None;
926 }
927 
928 InstructionCost TargetTransformInfo::getCastInstrCost(
929     unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
930     TTI::TargetCostKind CostKind, const Instruction *I) const {
931   assert((I == nullptr || I->getOpcode() == Opcode) &&
932          "Opcode should reflect passed instruction.");
933   InstructionCost Cost =
934       TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
935   assert(Cost >= 0 && "TTI should not produce negative costs!");
936   return Cost;
937 }
938 
939 InstructionCost TargetTransformInfo::getExtractWithExtendCost(
940     unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const {
941   InstructionCost Cost =
942       TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
943   assert(Cost >= 0 && "TTI should not produce negative costs!");
944   return Cost;
945 }
946 
947 InstructionCost TargetTransformInfo::getCFInstrCost(
948     unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
949   assert((I == nullptr || I->getOpcode() == Opcode) &&
950          "Opcode should reflect passed instruction.");
951   InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
952   assert(Cost >= 0 && "TTI should not produce negative costs!");
953   return Cost;
954 }
955 
956 InstructionCost TargetTransformInfo::getCmpSelInstrCost(
957     unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
958     TTI::TargetCostKind CostKind, const Instruction *I) const {
959   assert((I == nullptr || I->getOpcode() == Opcode) &&
960          "Opcode should reflect passed instruction.");
961   InstructionCost Cost =
962       TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
963   assert(Cost >= 0 && "TTI should not produce negative costs!");
964   return Cost;
965 }
966 
967 InstructionCost TargetTransformInfo::getVectorInstrCost(
968     unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
969     Value *Op0, Value *Op1) const {
970   // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
971   // This is mentioned in the interface description and respected by all
972   // callers, but never asserted upon.
973   InstructionCost Cost =
974       TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1);
975   assert(Cost >= 0 && "TTI should not produce negative costs!");
976   return Cost;
977 }
978 
979 InstructionCost
980 TargetTransformInfo::getVectorInstrCost(const Instruction &I, Type *Val,
981                                         TTI::TargetCostKind CostKind,
982                                         unsigned Index) const {
983   // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
984   // This is mentioned in the interface description and respected by all
985   // callers, but never asserted upon.
986   InstructionCost Cost = TTIImpl->getVectorInstrCost(I, Val, CostKind, Index);
987   assert(Cost >= 0 && "TTI should not produce negative costs!");
988   return Cost;
989 }
990 
991 InstructionCost TargetTransformInfo::getReplicationShuffleCost(
992     Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
993     TTI::TargetCostKind CostKind) {
994   InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
995       EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
996   assert(Cost >= 0 && "TTI should not produce negative costs!");
997   return Cost;
998 }
999 
1000 InstructionCost TargetTransformInfo::getMemoryOpCost(
1001     unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1002     TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo,
1003     const Instruction *I) const {
1004   assert((I == nullptr || I->getOpcode() == Opcode) &&
1005          "Opcode should reflect passed instruction.");
1006   InstructionCost Cost = TTIImpl->getMemoryOpCost(
1007       Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1008   assert(Cost >= 0 && "TTI should not produce negative costs!");
1009   return Cost;
1010 }
1011 
1012 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost(
1013     unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1014     TTI::TargetCostKind CostKind) const {
1015   InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment,
1016                                                         AddressSpace, CostKind);
1017   assert(Cost >= 0 && "TTI should not produce negative costs!");
1018   return Cost;
1019 }
1020 
1021 InstructionCost TargetTransformInfo::getGatherScatterOpCost(
1022     unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
1023     Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const {
1024   InstructionCost Cost = TTIImpl->getGatherScatterOpCost(
1025       Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I);
1026   assert(Cost >= 0 && "TTI should not produce negative costs!");
1027   return Cost;
1028 }
1029 
1030 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
1031     unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1032     Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1033     bool UseMaskForCond, bool UseMaskForGaps) const {
1034   InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1035       Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1036       UseMaskForCond, UseMaskForGaps);
1037   assert(Cost >= 0 && "TTI should not produce negative costs!");
1038   return Cost;
1039 }
1040 
1041 InstructionCost
1042 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
1043                                            TTI::TargetCostKind CostKind) const {
1044   InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1045   assert(Cost >= 0 && "TTI should not produce negative costs!");
1046   return Cost;
1047 }
1048 
1049 InstructionCost
1050 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
1051                                       ArrayRef<Type *> Tys,
1052                                       TTI::TargetCostKind CostKind) const {
1053   InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1054   assert(Cost >= 0 && "TTI should not produce negative costs!");
1055   return Cost;
1056 }
1057 
1058 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
1059   return TTIImpl->getNumberOfParts(Tp);
1060 }
1061 
1062 InstructionCost
1063 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE,
1064                                                const SCEV *Ptr) const {
1065   InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr);
1066   assert(Cost >= 0 && "TTI should not produce negative costs!");
1067   return Cost;
1068 }
1069 
1070 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
1071   InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1072   assert(Cost >= 0 && "TTI should not produce negative costs!");
1073   return Cost;
1074 }
1075 
1076 uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const {
1077   return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1078 }
1079 
1080 InstructionCost TargetTransformInfo::getArithmeticReductionCost(
1081     unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1082     TTI::TargetCostKind CostKind) const {
1083   InstructionCost Cost =
1084       TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1085   assert(Cost >= 0 && "TTI should not produce negative costs!");
1086   return Cost;
1087 }
1088 
1089 InstructionCost TargetTransformInfo::getMinMaxReductionCost(
1090     Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
1091     TTI::TargetCostKind CostKind) const {
1092   InstructionCost Cost =
1093       TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1094   assert(Cost >= 0 && "TTI should not produce negative costs!");
1095   return Cost;
1096 }
1097 
1098 InstructionCost TargetTransformInfo::getExtendedReductionCost(
1099     unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1100     FastMathFlags FMF, TTI::TargetCostKind CostKind) const {
1101   return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1102                                            CostKind);
1103 }
1104 
1105 InstructionCost TargetTransformInfo::getMulAccReductionCost(
1106     bool IsUnsigned, Type *ResTy, VectorType *Ty,
1107     TTI::TargetCostKind CostKind) const {
1108   return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty, CostKind);
1109 }
1110 
1111 InstructionCost
1112 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
1113   return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1114 }
1115 
1116 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
1117                                              MemIntrinsicInfo &Info) const {
1118   return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1119 }
1120 
1121 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
1122   return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1123 }
1124 
1125 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
1126     IntrinsicInst *Inst, Type *ExpectedType) const {
1127   return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
1128 }
1129 
1130 Type *TargetTransformInfo::getMemcpyLoopLoweringType(
1131     LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1132     unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign,
1133     std::optional<uint32_t> AtomicElementSize) const {
1134   return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1135                                             DestAddrSpace, SrcAlign, DestAlign,
1136                                             AtomicElementSize);
1137 }
1138 
1139 void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
1140     SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1141     unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1142     unsigned SrcAlign, unsigned DestAlign,
1143     std::optional<uint32_t> AtomicCpySize) const {
1144   TTIImpl->getMemcpyLoopResidualLoweringType(
1145       OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1146       DestAlign, AtomicCpySize);
1147 }
1148 
1149 bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
1150                                               const Function *Callee) const {
1151   return TTIImpl->areInlineCompatible(Caller, Callee);
1152 }
1153 
1154 unsigned
1155 TargetTransformInfo::getInlineCallPenalty(const Function *F,
1156                                           const CallBase &Call,
1157                                           unsigned DefaultCallPenalty) const {
1158   return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1159 }
1160 
1161 bool TargetTransformInfo::areTypesABICompatible(
1162     const Function *Caller, const Function *Callee,
1163     const ArrayRef<Type *> &Types) const {
1164   return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1165 }
1166 
1167 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
1168                                              Type *Ty) const {
1169   return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1170 }
1171 
1172 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
1173                                               Type *Ty) const {
1174   return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1175 }
1176 
1177 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
1178   return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1179 }
1180 
1181 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
1182   return TTIImpl->isLegalToVectorizeLoad(LI);
1183 }
1184 
1185 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
1186   return TTIImpl->isLegalToVectorizeStore(SI);
1187 }
1188 
1189 bool TargetTransformInfo::isLegalToVectorizeLoadChain(
1190     unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1191   return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1192                                               AddrSpace);
1193 }
1194 
1195 bool TargetTransformInfo::isLegalToVectorizeStoreChain(
1196     unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1197   return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1198                                                AddrSpace);
1199 }
1200 
1201 bool TargetTransformInfo::isLegalToVectorizeReduction(
1202     const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1203   return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1204 }
1205 
1206 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
1207   return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1208 }
1209 
1210 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
1211                                                   unsigned LoadSize,
1212                                                   unsigned ChainSizeInBytes,
1213                                                   VectorType *VecTy) const {
1214   return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1215 }
1216 
1217 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
1218                                                    unsigned StoreSize,
1219                                                    unsigned ChainSizeInBytes,
1220                                                    VectorType *VecTy) const {
1221   return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1222 }
1223 
1224 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty,
1225                                                 ReductionFlags Flags) const {
1226   return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
1227 }
1228 
1229 bool TargetTransformInfo::preferPredicatedReductionSelect(
1230     unsigned Opcode, Type *Ty, ReductionFlags Flags) const {
1231   return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);
1232 }
1233 
1234 bool TargetTransformInfo::preferEpilogueVectorization() const {
1235   return TTIImpl->preferEpilogueVectorization();
1236 }
1237 
1238 TargetTransformInfo::VPLegalization
1239 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
1240   return TTIImpl->getVPLegalizationStrategy(VPI);
1241 }
1242 
1243 bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const {
1244   return TTIImpl->hasArmWideBranch(Thumb);
1245 }
1246 
1247 unsigned TargetTransformInfo::getMaxNumArgs() const {
1248   return TTIImpl->getMaxNumArgs();
1249 }
1250 
1251 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
1252   return TTIImpl->shouldExpandReduction(II);
1253 }
1254 
1255 unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
1256   return TTIImpl->getGISelRematGlobalCost();
1257 }
1258 
1259 unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const {
1260   return TTIImpl->getMinTripCountTailFoldingThreshold();
1261 }
1262 
1263 bool TargetTransformInfo::supportsScalableVectors() const {
1264   return TTIImpl->supportsScalableVectors();
1265 }
1266 
1267 bool TargetTransformInfo::enableScalableVectorization() const {
1268   return TTIImpl->enableScalableVectorization();
1269 }
1270 
1271 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType,
1272                                                 Align Alignment) const {
1273   return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment);
1274 }
1275 
1276 TargetTransformInfo::Concept::~Concept() = default;
1277 
1278 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1279 
1280 TargetIRAnalysis::TargetIRAnalysis(
1281     std::function<Result(const Function &)> TTICallback)
1282     : TTICallback(std::move(TTICallback)) {}
1283 
1284 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1285                                                FunctionAnalysisManager &) {
1286   return TTICallback(F);
1287 }
1288 
1289 AnalysisKey TargetIRAnalysis::Key;
1290 
1291 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1292   return Result(F.getParent()->getDataLayout());
1293 }
1294 
1295 // Register the basic pass.
1296 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1297                 "Target Transform Information", false, true)
1298 char TargetTransformInfoWrapperPass::ID = 0;
1299 
1300 void TargetTransformInfoWrapperPass::anchor() {}
1301 
1302 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1303     : ImmutablePass(ID) {
1304   initializeTargetTransformInfoWrapperPassPass(
1305       *PassRegistry::getPassRegistry());
1306 }
1307 
1308 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1309     TargetIRAnalysis TIRA)
1310     : ImmutablePass(ID), TIRA(std::move(TIRA)) {
1311   initializeTargetTransformInfoWrapperPassPass(
1312       *PassRegistry::getPassRegistry());
1313 }
1314 
1315 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1316   FunctionAnalysisManager DummyFAM;
1317   TTI = TIRA.run(F, DummyFAM);
1318   return *TTI;
1319 }
1320 
1321 ImmutablePass *
1322 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1323   return new TargetTransformInfoWrapperPass(std::move(TIRA));
1324 }
1325