1//===- IntrinsicsARM.td - Defines ARM intrinsics -----------*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file defines all of the ARM-specific intrinsics. 10// 11//===----------------------------------------------------------------------===// 12 13 14//===----------------------------------------------------------------------===// 15// TLS 16 17let TargetPrefix = "arm" in { // All intrinsics start with "llvm.arm.". 18 19// A space-consuming intrinsic primarily for testing ARMConstantIslands. The 20// first argument is the number of bytes this "instruction" takes up, the second 21// and return value are essentially chains, used to force ordering during ISel. 22def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [ImmArg<0>]>; 23 24// 16-bit multiplications 25def int_arm_smulbb : GCCBuiltin<"__builtin_arm_smulbb">, 26 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 27def int_arm_smulbt : GCCBuiltin<"__builtin_arm_smulbt">, 28 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 29def int_arm_smultb : GCCBuiltin<"__builtin_arm_smultb">, 30 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 31def int_arm_smultt : GCCBuiltin<"__builtin_arm_smultt">, 32 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 33def int_arm_smulwb : GCCBuiltin<"__builtin_arm_smulwb">, 34 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 35def int_arm_smulwt : GCCBuiltin<"__builtin_arm_smulwt">, 36 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 37 38//===----------------------------------------------------------------------===// 39// Saturating Arithmetic 40 41def int_arm_qadd : GCCBuiltin<"__builtin_arm_qadd">, 42 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 43 [Commutative, IntrNoMem]>; 44def int_arm_qsub : GCCBuiltin<"__builtin_arm_qsub">, 45 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 46def int_arm_ssat : GCCBuiltin<"__builtin_arm_ssat">, 47 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 48def int_arm_usat : GCCBuiltin<"__builtin_arm_usat">, 49 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 50 51// Accumulating multiplications 52def int_arm_smlabb : GCCBuiltin<"__builtin_arm_smlabb">, 53 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 54 [IntrNoMem]>; 55def int_arm_smlabt : GCCBuiltin<"__builtin_arm_smlabt">, 56 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 57 [IntrNoMem]>; 58def int_arm_smlatb : GCCBuiltin<"__builtin_arm_smlatb">, 59 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 60 [IntrNoMem]>; 61def int_arm_smlatt : GCCBuiltin<"__builtin_arm_smlatt">, 62 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 63 [IntrNoMem]>; 64def int_arm_smlawb : GCCBuiltin<"__builtin_arm_smlawb">, 65 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 66 [IntrNoMem]>; 67def int_arm_smlawt : GCCBuiltin<"__builtin_arm_smlawt">, 68 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 69 [IntrNoMem]>; 70 71// Parallel 16-bit saturation 72def int_arm_ssat16 : GCCBuiltin<"__builtin_arm_ssat16">, 73 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 74def int_arm_usat16 : GCCBuiltin<"__builtin_arm_usat16">, 75 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 76 77// Packing and unpacking 78def int_arm_sxtab16 : GCCBuiltin<"__builtin_arm_sxtab16">, 79 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 80def int_arm_sxtb16 : GCCBuiltin<"__builtin_arm_sxtb16">, 81 Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>; 82def int_arm_uxtab16 : GCCBuiltin<"__builtin_arm_uxtab16">, 83 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 84def int_arm_uxtb16 : GCCBuiltin<"__builtin_arm_uxtb16">, 85 Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>; 86 87// Parallel selection, reads the GE flags. 88def int_arm_sel : GCCBuiltin<"__builtin_arm_sel">, 89 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>; 90 91// Parallel 8-bit addition and subtraction 92def int_arm_qadd8 : GCCBuiltin<"__builtin_arm_qadd8">, 93 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 94def int_arm_qsub8 : GCCBuiltin<"__builtin_arm_qsub8">, 95 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 96// Writes to the GE bits. 97def int_arm_sadd8 : GCCBuiltin<"__builtin_arm_sadd8">, 98 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 99def int_arm_shadd8 : GCCBuiltin<"__builtin_arm_shadd8">, 100 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 101def int_arm_shsub8 : GCCBuiltin<"__builtin_arm_shsub8">, 102 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 103// Writes to the GE bits. 104def int_arm_ssub8 : GCCBuiltin<"__builtin_arm_ssub8">, 105 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 106// Writes to the GE bits. 107def int_arm_uadd8 : GCCBuiltin<"__builtin_arm_uadd8">, 108 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 109def int_arm_uhadd8 : GCCBuiltin<"__builtin_arm_uhadd8">, 110 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 111def int_arm_uhsub8 : GCCBuiltin<"__builtin_arm_uhsub8">, 112 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 113def int_arm_uqadd8 : GCCBuiltin<"__builtin_arm_uqadd8">, 114 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 115def int_arm_uqsub8 : GCCBuiltin<"__builtin_arm_uqsub8">, 116 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 117// Writes to the GE bits. 118def int_arm_usub8 : GCCBuiltin<"__builtin_arm_usub8">, 119 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 120 121// Sum of 8-bit absolute differences 122def int_arm_usad8 : GCCBuiltin<"__builtin_arm_usad8">, 123 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 124def int_arm_usada8 : GCCBuiltin<"__builtin_arm_usada8">, 125 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 126 [IntrNoMem]>; 127 128// Parallel 16-bit addition and subtraction 129def int_arm_qadd16 : GCCBuiltin<"__builtin_arm_qadd16">, 130 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 131def int_arm_qasx : GCCBuiltin<"__builtin_arm_qasx">, 132 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 133def int_arm_qsax : GCCBuiltin<"__builtin_arm_qsax">, 134 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 135def int_arm_qsub16 : GCCBuiltin<"__builtin_arm_qsub16">, 136 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 137// Writes to the GE bits. 138def int_arm_sadd16 : GCCBuiltin<"__builtin_arm_sadd16">, 139 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 140// Writes to the GE bits. 141def int_arm_sasx : GCCBuiltin<"__builtin_arm_sasx">, 142 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 143def int_arm_shadd16 : GCCBuiltin<"__builtin_arm_shadd16">, 144 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 145def int_arm_shasx : GCCBuiltin<"__builtin_arm_shasx">, 146 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 147def int_arm_shsax : GCCBuiltin<"__builtin_arm_shsax">, 148 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 149def int_arm_shsub16 : GCCBuiltin<"__builtin_arm_shsub16">, 150 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 151// Writes to the GE bits. 152def int_arm_ssax : GCCBuiltin<"__builtin_arm_ssax">, 153 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 154// Writes to the GE bits. 155def int_arm_ssub16 : GCCBuiltin<"__builtin_arm_ssub16">, 156 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 157// Writes to the GE bits. 158def int_arm_uadd16 : GCCBuiltin<"__builtin_arm_uadd16">, 159 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 160// Writes to the GE bits. 161def int_arm_uasx : GCCBuiltin<"__builtin_arm_uasx">, 162 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 163def int_arm_uhadd16 : GCCBuiltin<"__builtin_arm_uhadd16">, 164 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 165def int_arm_uhasx : GCCBuiltin<"__builtin_arm_uhasx">, 166 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 167def int_arm_uhsax : GCCBuiltin<"__builtin_arm_uhsax">, 168 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 169def int_arm_uhsub16 : GCCBuiltin<"__builtin_arm_uhsub16">, 170 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 171def int_arm_uqadd16 : GCCBuiltin<"__builtin_arm_uqadd16">, 172 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 173def int_arm_uqasx : GCCBuiltin<"__builtin_arm_uqasx">, 174 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 175def int_arm_uqsax : GCCBuiltin<"__builtin_arm_uqsax">, 176 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 177def int_arm_uqsub16 : GCCBuiltin<"__builtin_arm_uqsub16">, 178 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 179// Writes to the GE bits. 180def int_arm_usax : GCCBuiltin<"__builtin_arm_usax">, 181 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 182// Writes to the GE bits. 183def int_arm_usub16 : GCCBuiltin<"__builtin_arm_usub16">, 184 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; 185 186// Parallel 16-bit multiplication 187def int_arm_smlad : GCCBuiltin<"__builtin_arm_smlad">, 188 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 189 [IntrNoMem]>; 190def int_arm_smladx : GCCBuiltin<"__builtin_arm_smladx">, 191 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 192 [IntrNoMem]>; 193def int_arm_smlald : GCCBuiltin<"__builtin_arm_smlald">, 194 Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], 195 [IntrNoMem]>; 196def int_arm_smlaldx : GCCBuiltin<"__builtin_arm_smlaldx">, 197 Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], 198 [IntrNoMem]>; 199def int_arm_smlsd : GCCBuiltin<"__builtin_arm_smlsd">, 200 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 201 [IntrNoMem]>; 202def int_arm_smlsdx : GCCBuiltin<"__builtin_arm_smlsdx">, 203 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], 204 [IntrNoMem]>; 205def int_arm_smlsld : GCCBuiltin<"__builtin_arm_smlsld">, 206 Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], 207 [IntrNoMem]>; 208def int_arm_smlsldx : GCCBuiltin<"__builtin_arm_smlsldx">, 209 Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], 210 [IntrNoMem]>; 211def int_arm_smuad : GCCBuiltin<"__builtin_arm_smuad">, 212 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 213def int_arm_smuadx : GCCBuiltin<"__builtin_arm_smuadx">, 214 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 215def int_arm_smusd : GCCBuiltin<"__builtin_arm_smusd">, 216 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 217def int_arm_smusdx : GCCBuiltin<"__builtin_arm_smusdx">, 218 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 219 220 221//===----------------------------------------------------------------------===// 222// Load, Store and Clear exclusive 223 224def int_arm_ldrex : Intrinsic<[llvm_i32_ty], [llvm_anyptr_ty]>; 225def int_arm_strex : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_anyptr_ty]>; 226 227def int_arm_ldaex : Intrinsic<[llvm_i32_ty], [llvm_anyptr_ty]>; 228def int_arm_stlex : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_anyptr_ty]>; 229 230def int_arm_clrex : Intrinsic<[]>; 231 232def int_arm_strexd : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 233 llvm_ptr_ty]>; 234def int_arm_ldrexd : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty]>; 235 236def int_arm_stlexd : Intrinsic<[llvm_i32_ty], 237 [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty]>; 238def int_arm_ldaexd : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty]>; 239 240//===----------------------------------------------------------------------===// 241// Data barrier instructions 242def int_arm_dmb : GCCBuiltin<"__builtin_arm_dmb">, MSBuiltin<"__dmb">, 243 Intrinsic<[], [llvm_i32_ty]>; 244def int_arm_dsb : GCCBuiltin<"__builtin_arm_dsb">, MSBuiltin<"__dsb">, 245 Intrinsic<[], [llvm_i32_ty]>; 246def int_arm_isb : GCCBuiltin<"__builtin_arm_isb">, MSBuiltin<"__isb">, 247 Intrinsic<[], [llvm_i32_ty]>; 248 249//===----------------------------------------------------------------------===// 250// VFP 251 252def int_arm_get_fpscr : GCCBuiltin<"__builtin_arm_get_fpscr">, 253 Intrinsic<[llvm_i32_ty], [], []>; 254def int_arm_set_fpscr : GCCBuiltin<"__builtin_arm_set_fpscr">, 255 Intrinsic<[], [llvm_i32_ty], []>; 256def int_arm_vcvtr : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty], 257 [IntrNoMem]>; 258def int_arm_vcvtru : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty], 259 [IntrNoMem]>; 260 261//===----------------------------------------------------------------------===// 262// Coprocessor 263 264def int_arm_ldc : GCCBuiltin<"__builtin_arm_ldc">, 265 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<0>, ImmArg<1>]>; 266def int_arm_ldcl : GCCBuiltin<"__builtin_arm_ldcl">, 267 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<0>, ImmArg<1>]>; 268def int_arm_ldc2 : GCCBuiltin<"__builtin_arm_ldc2">, 269 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<0>, ImmArg<1>]>; 270def int_arm_ldc2l : GCCBuiltin<"__builtin_arm_ldc2l">, 271 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<0>, ImmArg<1>]>; 272 273def int_arm_stc : GCCBuiltin<"__builtin_arm_stc">, 274 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<0>, ImmArg<1>]>; 275def int_arm_stcl : GCCBuiltin<"__builtin_arm_stcl">, 276 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<0>, ImmArg<1>]>; 277def int_arm_stc2 : GCCBuiltin<"__builtin_arm_stc2">, 278 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<0>, ImmArg<1>]>; 279def int_arm_stc2l : GCCBuiltin<"__builtin_arm_stc2l">, 280 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<0>, ImmArg<1>]>; 281 282// Move to coprocessor 283def int_arm_mcr : GCCBuiltin<"__builtin_arm_mcr">, 284 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, 285 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<3>, ImmArg<4>, ImmArg<5>]>; 286def int_arm_mcr2 : GCCBuiltin<"__builtin_arm_mcr2">, 287 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, 288 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<3>, ImmArg<4>, ImmArg<5>]>; 289 290// Move from coprocessor 291def int_arm_mrc : GCCBuiltin<"__builtin_arm_mrc">, 292 MSBuiltin<"_MoveFromCoprocessor">, 293 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, 294 llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<2>, ImmArg<3>, ImmArg<4>]>; 295def int_arm_mrc2 : GCCBuiltin<"__builtin_arm_mrc2">, 296 MSBuiltin<"_MoveFromCoprocessor2">, 297 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, 298 llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<2>, ImmArg<3>, ImmArg<4>]>; 299 300// Coprocessor data processing 301def int_arm_cdp : GCCBuiltin<"__builtin_arm_cdp">, 302 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, 303 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<2>, ImmArg<3>, ImmArg<4>, ImmArg<5>]>; 304def int_arm_cdp2 : GCCBuiltin<"__builtin_arm_cdp2">, 305 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, 306 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<2>, ImmArg<3>, ImmArg<4>, ImmArg<5>]>; 307 308// Move from two registers to coprocessor 309def int_arm_mcrr : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, 310 llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<4>]>; 311def int_arm_mcrr2 : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, 312 llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<4>]>; 313 314def int_arm_mrrc : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_i32_ty, 315 llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<2>]>; 316def int_arm_mrrc2 : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_i32_ty, 317 llvm_i32_ty, llvm_i32_ty], [ImmArg<0>, ImmArg<1>, ImmArg<2>]>; 318 319//===----------------------------------------------------------------------===// 320// CRC32 321 322def int_arm_crc32b : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 323 [IntrNoMem]>; 324def int_arm_crc32cb : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 325 [IntrNoMem]>; 326def int_arm_crc32h : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 327 [IntrNoMem]>; 328def int_arm_crc32ch : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 329 [IntrNoMem]>; 330def int_arm_crc32w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 331 [IntrNoMem]>; 332def int_arm_crc32cw : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 333 [IntrNoMem]>; 334 335//===----------------------------------------------------------------------===// 336// CMSE 337 338def int_arm_cmse_tt : GCCBuiltin<"__builtin_arm_cmse_TT">, 339 Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>; 340def int_arm_cmse_ttt : GCCBuiltin<"__builtin_arm_cmse_TTT">, 341 Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>; 342def int_arm_cmse_tta : GCCBuiltin<"__builtin_arm_cmse_TTA">, 343 Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>; 344def int_arm_cmse_ttat : GCCBuiltin<"__builtin_arm_cmse_TTAT">, 345 Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>; 346 347//===----------------------------------------------------------------------===// 348// HINT 349 350def int_arm_hint : Intrinsic<[], [llvm_i32_ty]>; 351def int_arm_dbg : Intrinsic<[], [llvm_i32_ty]>; 352 353//===----------------------------------------------------------------------===// 354// UND (reserved undefined sequence) 355 356def int_arm_undefined : Intrinsic<[], [llvm_i32_ty]>; 357 358//===----------------------------------------------------------------------===// 359// Advanced SIMD (NEON) 360 361// The following classes do not correspond directly to GCC builtins. 362class Neon_1Arg_Intrinsic 363 : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>; 364class Neon_1Arg_Narrow_Intrinsic 365 : Intrinsic<[llvm_anyvector_ty], [LLVMExtendedType<0>], [IntrNoMem]>; 366class Neon_2Arg_Intrinsic 367 : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>], 368 [IntrNoMem]>; 369class Neon_2Arg_Narrow_Intrinsic 370 : Intrinsic<[llvm_anyvector_ty], [LLVMExtendedType<0>, LLVMExtendedType<0>], 371 [IntrNoMem]>; 372class Neon_2Arg_Long_Intrinsic 373 : Intrinsic<[llvm_anyvector_ty], [LLVMTruncatedType<0>, LLVMTruncatedType<0>], 374 [IntrNoMem]>; 375class Neon_3Arg_Intrinsic 376 : Intrinsic<[llvm_anyvector_ty], 377 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], 378 [IntrNoMem]>; 379class Neon_3Arg_Long_Intrinsic 380 : Intrinsic<[llvm_anyvector_ty], 381 [LLVMMatchType<0>, LLVMTruncatedType<0>, LLVMTruncatedType<0>], 382 [IntrNoMem]>; 383 384class Neon_1FloatArg_Intrinsic 385 : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; 386 387class Neon_CvtFxToFP_Intrinsic 388 : Intrinsic<[llvm_anyfloat_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>; 389class Neon_CvtFPToFx_Intrinsic 390 : Intrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty, llvm_i32_ty], [IntrNoMem]>; 391class Neon_CvtFPtoInt_1Arg_Intrinsic 392 : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>; 393 394class Neon_Compare_Intrinsic 395 : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, LLVMMatchType<1>], 396 [IntrNoMem]>; 397 398// The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors. 399// Besides the table, VTBL has one other v8i8 argument and VTBX has two. 400// Overall, the classes range from 2 to 6 v8i8 arguments. 401class Neon_Tbl2Arg_Intrinsic 402 : Intrinsic<[llvm_v8i8_ty], 403 [llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>; 404class Neon_Tbl3Arg_Intrinsic 405 : Intrinsic<[llvm_v8i8_ty], 406 [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>; 407class Neon_Tbl4Arg_Intrinsic 408 : Intrinsic<[llvm_v8i8_ty], 409 [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty], 410 [IntrNoMem]>; 411class Neon_Tbl5Arg_Intrinsic 412 : Intrinsic<[llvm_v8i8_ty], 413 [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, 414 llvm_v8i8_ty], [IntrNoMem]>; 415class Neon_Tbl6Arg_Intrinsic 416 : Intrinsic<[llvm_v8i8_ty], 417 [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, 418 llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>; 419 420// Arithmetic ops 421 422let IntrProperties = [IntrNoMem, Commutative] in { 423 424 // Vector Add. 425 def int_arm_neon_vhadds : Neon_2Arg_Intrinsic; 426 def int_arm_neon_vhaddu : Neon_2Arg_Intrinsic; 427 def int_arm_neon_vrhadds : Neon_2Arg_Intrinsic; 428 def int_arm_neon_vrhaddu : Neon_2Arg_Intrinsic; 429 def int_arm_neon_vqadds : Neon_2Arg_Intrinsic; 430 def int_arm_neon_vqaddu : Neon_2Arg_Intrinsic; 431 def int_arm_neon_vraddhn : Neon_2Arg_Narrow_Intrinsic; 432 433 // Vector Multiply. 434 def int_arm_neon_vmulp : Neon_2Arg_Intrinsic; 435 def int_arm_neon_vqdmulh : Neon_2Arg_Intrinsic; 436 def int_arm_neon_vqrdmulh : Neon_2Arg_Intrinsic; 437 def int_arm_neon_vmulls : Neon_2Arg_Long_Intrinsic; 438 def int_arm_neon_vmullu : Neon_2Arg_Long_Intrinsic; 439 def int_arm_neon_vmullp : Neon_2Arg_Long_Intrinsic; 440 def int_arm_neon_vqdmull : Neon_2Arg_Long_Intrinsic; 441 442 // Vector Maximum. 443 def int_arm_neon_vmaxs : Neon_2Arg_Intrinsic; 444 def int_arm_neon_vmaxu : Neon_2Arg_Intrinsic; 445 def int_arm_neon_vmaxnm : Neon_2Arg_Intrinsic; 446 447 // Vector Minimum. 448 def int_arm_neon_vmins : Neon_2Arg_Intrinsic; 449 def int_arm_neon_vminu : Neon_2Arg_Intrinsic; 450 def int_arm_neon_vminnm : Neon_2Arg_Intrinsic; 451 452 // Vector Reciprocal Step. 453 def int_arm_neon_vrecps : Neon_2Arg_Intrinsic; 454 455 // Vector Reciprocal Square Root Step. 456 def int_arm_neon_vrsqrts : Neon_2Arg_Intrinsic; 457} 458 459// Vector Subtract. 460def int_arm_neon_vhsubs : Neon_2Arg_Intrinsic; 461def int_arm_neon_vhsubu : Neon_2Arg_Intrinsic; 462def int_arm_neon_vqsubs : Neon_2Arg_Intrinsic; 463def int_arm_neon_vqsubu : Neon_2Arg_Intrinsic; 464def int_arm_neon_vrsubhn : Neon_2Arg_Narrow_Intrinsic; 465 466// Vector Absolute Compare. 467def int_arm_neon_vacge : Neon_Compare_Intrinsic; 468def int_arm_neon_vacgt : Neon_Compare_Intrinsic; 469 470// Vector Absolute Differences. 471def int_arm_neon_vabds : Neon_2Arg_Intrinsic; 472def int_arm_neon_vabdu : Neon_2Arg_Intrinsic; 473 474// Vector Pairwise Add. 475def int_arm_neon_vpadd : Neon_2Arg_Intrinsic; 476 477// Vector Pairwise Add Long. 478// Note: This is different than the other "long" NEON intrinsics because 479// the result vector has half as many elements as the source vector. 480// The source and destination vector types must be specified separately. 481def int_arm_neon_vpaddls : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], 482 [IntrNoMem]>; 483def int_arm_neon_vpaddlu : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], 484 [IntrNoMem]>; 485 486// Vector Pairwise Add and Accumulate Long. 487// Note: This is similar to vpaddl but the destination vector also appears 488// as the first argument. 489def int_arm_neon_vpadals : Intrinsic<[llvm_anyvector_ty], 490 [LLVMMatchType<0>, llvm_anyvector_ty], 491 [IntrNoMem]>; 492def int_arm_neon_vpadalu : Intrinsic<[llvm_anyvector_ty], 493 [LLVMMatchType<0>, llvm_anyvector_ty], 494 [IntrNoMem]>; 495 496// Vector Pairwise Maximum and Minimum. 497def int_arm_neon_vpmaxs : Neon_2Arg_Intrinsic; 498def int_arm_neon_vpmaxu : Neon_2Arg_Intrinsic; 499def int_arm_neon_vpmins : Neon_2Arg_Intrinsic; 500def int_arm_neon_vpminu : Neon_2Arg_Intrinsic; 501 502// Vector Shifts: 503// 504// The various saturating and rounding vector shift operations need to be 505// represented by intrinsics in LLVM, and even the basic VSHL variable shift 506// operation cannot be safely translated to LLVM's shift operators. VSHL can 507// be used for both left and right shifts, or even combinations of the two, 508// depending on the signs of the shift amounts. It also has well-defined 509// behavior for shift amounts that LLVM leaves undefined. Only basic shifts 510// by constants can be represented with LLVM's shift operators. 511// 512// The shift counts for these intrinsics are always vectors, even for constant 513// shifts, where the constant is replicated. For consistency with VSHL (and 514// other variable shift instructions), left shifts have positive shift counts 515// and right shifts have negative shift counts. This convention is also used 516// for constant right shift intrinsics, and to help preserve sanity, the 517// intrinsic names use "shift" instead of either "shl" or "shr". Where 518// applicable, signed and unsigned versions of the intrinsics are 519// distinguished with "s" and "u" suffixes. A few NEON shift instructions, 520// such as VQSHLU, take signed operands but produce unsigned results; these 521// use a "su" suffix. 522 523// Vector Shift. 524def int_arm_neon_vshifts : Neon_2Arg_Intrinsic; 525def int_arm_neon_vshiftu : Neon_2Arg_Intrinsic; 526 527// Vector Rounding Shift. 528def int_arm_neon_vrshifts : Neon_2Arg_Intrinsic; 529def int_arm_neon_vrshiftu : Neon_2Arg_Intrinsic; 530def int_arm_neon_vrshiftn : Neon_2Arg_Narrow_Intrinsic; 531 532// Vector Saturating Shift. 533def int_arm_neon_vqshifts : Neon_2Arg_Intrinsic; 534def int_arm_neon_vqshiftu : Neon_2Arg_Intrinsic; 535def int_arm_neon_vqshiftsu : Neon_2Arg_Intrinsic; 536def int_arm_neon_vqshiftns : Neon_2Arg_Narrow_Intrinsic; 537def int_arm_neon_vqshiftnu : Neon_2Arg_Narrow_Intrinsic; 538def int_arm_neon_vqshiftnsu : Neon_2Arg_Narrow_Intrinsic; 539 540// Vector Saturating Rounding Shift. 541def int_arm_neon_vqrshifts : Neon_2Arg_Intrinsic; 542def int_arm_neon_vqrshiftu : Neon_2Arg_Intrinsic; 543def int_arm_neon_vqrshiftns : Neon_2Arg_Narrow_Intrinsic; 544def int_arm_neon_vqrshiftnu : Neon_2Arg_Narrow_Intrinsic; 545def int_arm_neon_vqrshiftnsu : Neon_2Arg_Narrow_Intrinsic; 546 547// Vector Shift and Insert. 548def int_arm_neon_vshiftins : Neon_3Arg_Intrinsic; 549 550// Vector Absolute Value and Saturating Absolute Value. 551def int_arm_neon_vabs : Neon_1Arg_Intrinsic; 552def int_arm_neon_vqabs : Neon_1Arg_Intrinsic; 553 554// Vector Saturating Negate. 555def int_arm_neon_vqneg : Neon_1Arg_Intrinsic; 556 557// Vector Count Leading Sign/Zero Bits. 558def int_arm_neon_vcls : Neon_1Arg_Intrinsic; 559 560// Vector Reciprocal Estimate. 561def int_arm_neon_vrecpe : Neon_1Arg_Intrinsic; 562 563// Vector Reciprocal Square Root Estimate. 564def int_arm_neon_vrsqrte : Neon_1Arg_Intrinsic; 565 566// Vector Conversions Between Floating-point and Integer 567def int_arm_neon_vcvtau : Neon_CvtFPtoInt_1Arg_Intrinsic; 568def int_arm_neon_vcvtas : Neon_CvtFPtoInt_1Arg_Intrinsic; 569def int_arm_neon_vcvtnu : Neon_CvtFPtoInt_1Arg_Intrinsic; 570def int_arm_neon_vcvtns : Neon_CvtFPtoInt_1Arg_Intrinsic; 571def int_arm_neon_vcvtpu : Neon_CvtFPtoInt_1Arg_Intrinsic; 572def int_arm_neon_vcvtps : Neon_CvtFPtoInt_1Arg_Intrinsic; 573def int_arm_neon_vcvtmu : Neon_CvtFPtoInt_1Arg_Intrinsic; 574def int_arm_neon_vcvtms : Neon_CvtFPtoInt_1Arg_Intrinsic; 575 576// Vector Conversions Between Floating-point and Fixed-point. 577def int_arm_neon_vcvtfp2fxs : Neon_CvtFPToFx_Intrinsic; 578def int_arm_neon_vcvtfp2fxu : Neon_CvtFPToFx_Intrinsic; 579def int_arm_neon_vcvtfxs2fp : Neon_CvtFxToFP_Intrinsic; 580def int_arm_neon_vcvtfxu2fp : Neon_CvtFxToFP_Intrinsic; 581 582// Vector Conversions Between Half-Precision and Single-Precision. 583def int_arm_neon_vcvtfp2hf 584 : Intrinsic<[llvm_v4i16_ty], [llvm_v4f32_ty], [IntrNoMem]>; 585def int_arm_neon_vcvthf2fp 586 : Intrinsic<[llvm_v4f32_ty], [llvm_v4i16_ty], [IntrNoMem]>; 587 588// Narrowing Saturating Vector Moves. 589def int_arm_neon_vqmovns : Neon_1Arg_Narrow_Intrinsic; 590def int_arm_neon_vqmovnu : Neon_1Arg_Narrow_Intrinsic; 591def int_arm_neon_vqmovnsu : Neon_1Arg_Narrow_Intrinsic; 592 593// Vector Table Lookup. 594// The first 1-4 arguments are the table. 595def int_arm_neon_vtbl1 : Neon_Tbl2Arg_Intrinsic; 596def int_arm_neon_vtbl2 : Neon_Tbl3Arg_Intrinsic; 597def int_arm_neon_vtbl3 : Neon_Tbl4Arg_Intrinsic; 598def int_arm_neon_vtbl4 : Neon_Tbl5Arg_Intrinsic; 599 600// Vector Table Extension. 601// Some elements of the destination vector may not be updated, so the original 602// value of that vector is passed as the first argument. The next 1-4 603// arguments after that are the table. 604def int_arm_neon_vtbx1 : Neon_Tbl3Arg_Intrinsic; 605def int_arm_neon_vtbx2 : Neon_Tbl4Arg_Intrinsic; 606def int_arm_neon_vtbx3 : Neon_Tbl5Arg_Intrinsic; 607def int_arm_neon_vtbx4 : Neon_Tbl6Arg_Intrinsic; 608 609// Vector and Scalar Rounding. 610def int_arm_neon_vrintn : Neon_1FloatArg_Intrinsic; 611def int_arm_neon_vrintx : Neon_1Arg_Intrinsic; 612def int_arm_neon_vrinta : Neon_1Arg_Intrinsic; 613def int_arm_neon_vrintz : Neon_1Arg_Intrinsic; 614def int_arm_neon_vrintm : Neon_1Arg_Intrinsic; 615def int_arm_neon_vrintp : Neon_1Arg_Intrinsic; 616 617// De-interleaving vector loads from N-element structures. 618// Source operands are the address and alignment. 619def int_arm_neon_vld1 : Intrinsic<[llvm_anyvector_ty], 620 [llvm_anyptr_ty, llvm_i32_ty], 621 [IntrReadMem, IntrArgMemOnly]>; 622def int_arm_neon_vld2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], 623 [llvm_anyptr_ty, llvm_i32_ty], 624 [IntrReadMem, IntrArgMemOnly]>; 625def int_arm_neon_vld3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 626 LLVMMatchType<0>], 627 [llvm_anyptr_ty, llvm_i32_ty], 628 [IntrReadMem, IntrArgMemOnly]>; 629def int_arm_neon_vld4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 630 LLVMMatchType<0>, LLVMMatchType<0>], 631 [llvm_anyptr_ty, llvm_i32_ty], 632 [IntrReadMem, IntrArgMemOnly]>; 633 634def int_arm_neon_vld1x2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], 635 [LLVMAnyPointerType<LLVMMatchType<0>>], 636 [IntrReadMem, IntrArgMemOnly]>; 637def int_arm_neon_vld1x3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 638 LLVMMatchType<0>], 639 [LLVMAnyPointerType<LLVMMatchType<0>>], 640 [IntrReadMem, IntrArgMemOnly]>; 641def int_arm_neon_vld1x4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 642 LLVMMatchType<0>, LLVMMatchType<0>], 643 [LLVMAnyPointerType<LLVMMatchType<0>>], 644 [IntrReadMem, IntrArgMemOnly]>; 645 646// Vector load N-element structure to one lane. 647// Source operands are: the address, the N input vectors (since only one 648// lane is assigned), the lane number, and the alignment. 649def int_arm_neon_vld2lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], 650 [llvm_anyptr_ty, LLVMMatchType<0>, 651 LLVMMatchType<0>, llvm_i32_ty, 652 llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>; 653def int_arm_neon_vld3lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 654 LLVMMatchType<0>], 655 [llvm_anyptr_ty, LLVMMatchType<0>, 656 LLVMMatchType<0>, LLVMMatchType<0>, 657 llvm_i32_ty, llvm_i32_ty], 658 [IntrReadMem, IntrArgMemOnly]>; 659def int_arm_neon_vld4lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 660 LLVMMatchType<0>, LLVMMatchType<0>], 661 [llvm_anyptr_ty, LLVMMatchType<0>, 662 LLVMMatchType<0>, LLVMMatchType<0>, 663 LLVMMatchType<0>, llvm_i32_ty, 664 llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>; 665 666// Vector load N-element structure to all lanes. 667// Source operands are the address and alignment. 668def int_arm_neon_vld2dup : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], 669 [llvm_anyptr_ty, llvm_i32_ty], 670 [IntrReadMem, IntrArgMemOnly]>; 671def int_arm_neon_vld3dup : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 672 LLVMMatchType<0>], 673 [llvm_anyptr_ty, llvm_i32_ty], 674 [IntrReadMem, IntrArgMemOnly]>; 675def int_arm_neon_vld4dup : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, 676 LLVMMatchType<0>, LLVMMatchType<0>], 677 [llvm_anyptr_ty, llvm_i32_ty], 678 [IntrReadMem, IntrArgMemOnly]>; 679 680// Interleaving vector stores from N-element structures. 681// Source operands are: the address, the N vectors, and the alignment. 682def int_arm_neon_vst1 : Intrinsic<[], 683 [llvm_anyptr_ty, llvm_anyvector_ty, 684 llvm_i32_ty], [IntrArgMemOnly]>; 685def int_arm_neon_vst2 : Intrinsic<[], 686 [llvm_anyptr_ty, llvm_anyvector_ty, 687 LLVMMatchType<1>, llvm_i32_ty], 688 [IntrArgMemOnly]>; 689def int_arm_neon_vst3 : Intrinsic<[], 690 [llvm_anyptr_ty, llvm_anyvector_ty, 691 LLVMMatchType<1>, LLVMMatchType<1>, 692 llvm_i32_ty], [IntrArgMemOnly]>; 693def int_arm_neon_vst4 : Intrinsic<[], 694 [llvm_anyptr_ty, llvm_anyvector_ty, 695 LLVMMatchType<1>, LLVMMatchType<1>, 696 LLVMMatchType<1>, llvm_i32_ty], 697 [IntrArgMemOnly]>; 698 699def int_arm_neon_vst1x2 : Intrinsic<[], 700 [llvm_anyptr_ty, llvm_anyvector_ty, 701 LLVMMatchType<1>], 702 [IntrArgMemOnly, NoCapture<0>]>; 703def int_arm_neon_vst1x3 : Intrinsic<[], 704 [llvm_anyptr_ty, llvm_anyvector_ty, 705 LLVMMatchType<1>, LLVMMatchType<1>], 706 [IntrArgMemOnly, NoCapture<0>]>; 707def int_arm_neon_vst1x4 : Intrinsic<[], 708 [llvm_anyptr_ty, llvm_anyvector_ty, 709 LLVMMatchType<1>, LLVMMatchType<1>, 710 LLVMMatchType<1>], 711 [IntrArgMemOnly, NoCapture<0>]>; 712 713// Vector store N-element structure from one lane. 714// Source operands are: the address, the N vectors, the lane number, and 715// the alignment. 716def int_arm_neon_vst2lane : Intrinsic<[], 717 [llvm_anyptr_ty, llvm_anyvector_ty, 718 LLVMMatchType<1>, llvm_i32_ty, 719 llvm_i32_ty], [IntrArgMemOnly]>; 720def int_arm_neon_vst3lane : Intrinsic<[], 721 [llvm_anyptr_ty, llvm_anyvector_ty, 722 LLVMMatchType<1>, LLVMMatchType<1>, 723 llvm_i32_ty, llvm_i32_ty], 724 [IntrArgMemOnly]>; 725def int_arm_neon_vst4lane : Intrinsic<[], 726 [llvm_anyptr_ty, llvm_anyvector_ty, 727 LLVMMatchType<1>, LLVMMatchType<1>, 728 LLVMMatchType<1>, llvm_i32_ty, 729 llvm_i32_ty], [IntrArgMemOnly]>; 730 731// Vector bitwise select. 732def int_arm_neon_vbsl : Intrinsic<[llvm_anyvector_ty], 733 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], 734 [IntrNoMem]>; 735 736 737// Crypto instructions 738class AES_1Arg_Intrinsic : Intrinsic<[llvm_v16i8_ty], 739 [llvm_v16i8_ty], [IntrNoMem]>; 740class AES_2Arg_Intrinsic : Intrinsic<[llvm_v16i8_ty], 741 [llvm_v16i8_ty, llvm_v16i8_ty], 742 [IntrNoMem]>; 743 744class SHA_1Arg_Intrinsic : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], 745 [IntrNoMem]>; 746class SHA_2Arg_Intrinsic : Intrinsic<[llvm_v4i32_ty], 747 [llvm_v4i32_ty, llvm_v4i32_ty], 748 [IntrNoMem]>; 749class SHA_3Arg_i32_Intrinsic : Intrinsic<[llvm_v4i32_ty], 750 [llvm_v4i32_ty, llvm_i32_ty, llvm_v4i32_ty], 751 [IntrNoMem]>; 752class SHA_3Arg_v4i32_Intrinsic : Intrinsic<[llvm_v4i32_ty], 753 [llvm_v4i32_ty, llvm_v4i32_ty,llvm_v4i32_ty], 754 [IntrNoMem]>; 755 756def int_arm_neon_aesd : AES_2Arg_Intrinsic; 757def int_arm_neon_aese : AES_2Arg_Intrinsic; 758def int_arm_neon_aesimc : AES_1Arg_Intrinsic; 759def int_arm_neon_aesmc : AES_1Arg_Intrinsic; 760def int_arm_neon_sha1h : SHA_1Arg_Intrinsic; 761def int_arm_neon_sha1su1 : SHA_2Arg_Intrinsic; 762def int_arm_neon_sha256su0 : SHA_2Arg_Intrinsic; 763def int_arm_neon_sha1c : SHA_3Arg_i32_Intrinsic; 764def int_arm_neon_sha1m : SHA_3Arg_i32_Intrinsic; 765def int_arm_neon_sha1p : SHA_3Arg_i32_Intrinsic; 766def int_arm_neon_sha1su0: SHA_3Arg_v4i32_Intrinsic; 767def int_arm_neon_sha256h: SHA_3Arg_v4i32_Intrinsic; 768def int_arm_neon_sha256h2: SHA_3Arg_v4i32_Intrinsic; 769def int_arm_neon_sha256su1: SHA_3Arg_v4i32_Intrinsic; 770 771// Armv8.2-A dot product instructions 772class Neon_Dot_Intrinsic 773 : Intrinsic<[llvm_anyvector_ty], 774 [LLVMMatchType<0>, llvm_anyvector_ty, 775 LLVMMatchType<1>], 776 [IntrNoMem]>; 777def int_arm_neon_udot : Neon_Dot_Intrinsic; 778def int_arm_neon_sdot : Neon_Dot_Intrinsic; 779 780 781} // end TargetPrefix 782