1*04eeddc0SDimitry Andric //===-- GDBRemoteRegisterFallback.cpp -------------------------------------===// 2*04eeddc0SDimitry Andric // 3*04eeddc0SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*04eeddc0SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*04eeddc0SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*04eeddc0SDimitry Andric // 7*04eeddc0SDimitry Andric //===----------------------------------------------------------------------===// 8*04eeddc0SDimitry Andric 9*04eeddc0SDimitry Andric #include "GDBRemoteRegisterFallback.h" 10*04eeddc0SDimitry Andric 11*04eeddc0SDimitry Andric namespace lldb_private { 12*04eeddc0SDimitry Andric namespace process_gdb_remote { 13*04eeddc0SDimitry Andric 14*04eeddc0SDimitry Andric #define REG(name, size) \ 15*04eeddc0SDimitry Andric DynamicRegisterInfo::Register { \ 16*04eeddc0SDimitry Andric ConstString(#name), empty_alt_name, reg_set, size, LLDB_INVALID_INDEX32, \ 17*04eeddc0SDimitry Andric lldb::eEncodingUint, lldb::eFormatHex, LLDB_INVALID_REGNUM, \ 18*04eeddc0SDimitry Andric LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, {}, {} \ 19*04eeddc0SDimitry Andric } 20*04eeddc0SDimitry Andric #define R64(name) REG(name, 8) 21*04eeddc0SDimitry Andric #define R32(name) REG(name, 4) 22*04eeddc0SDimitry Andric 23*04eeddc0SDimitry Andric static std::vector<DynamicRegisterInfo::Register> GetRegisters_aarch64() { 24*04eeddc0SDimitry Andric ConstString empty_alt_name; 25*04eeddc0SDimitry Andric ConstString reg_set{"general purpose registers"}; 26*04eeddc0SDimitry Andric 27*04eeddc0SDimitry Andric std::vector<DynamicRegisterInfo::Register> registers{ 28*04eeddc0SDimitry Andric R64(x0), R64(x1), R64(x2), R64(x3), R64(x4), R64(x5), R64(x6), 29*04eeddc0SDimitry Andric R64(x7), R64(x8), R64(x9), R64(x10), R64(x11), R64(x12), R64(x13), 30*04eeddc0SDimitry Andric R64(x14), R64(x15), R64(x16), R64(x17), R64(x18), R64(x19), R64(x20), 31*04eeddc0SDimitry Andric R64(x21), R64(x22), R64(x23), R64(x24), R64(x25), R64(x26), R64(x27), 32*04eeddc0SDimitry Andric R64(x28), R64(x29), R64(x30), R64(sp), R64(pc), R32(cpsr), 33*04eeddc0SDimitry Andric }; 34*04eeddc0SDimitry Andric 35*04eeddc0SDimitry Andric return registers; 36*04eeddc0SDimitry Andric } 37*04eeddc0SDimitry Andric 38*04eeddc0SDimitry Andric static std::vector<DynamicRegisterInfo::Register> GetRegisters_x86() { 39*04eeddc0SDimitry Andric ConstString empty_alt_name; 40*04eeddc0SDimitry Andric ConstString reg_set{"general purpose registers"}; 41*04eeddc0SDimitry Andric 42*04eeddc0SDimitry Andric std::vector<DynamicRegisterInfo::Register> registers{ 43*04eeddc0SDimitry Andric R32(eax), R32(ecx), R32(edx), R32(ebx), R32(esp), R32(ebp), 44*04eeddc0SDimitry Andric R32(esi), R32(edi), R32(eip), R32(eflags), R32(cs), R32(ss), 45*04eeddc0SDimitry Andric R32(ds), R32(es), R32(fs), R32(gs), 46*04eeddc0SDimitry Andric }; 47*04eeddc0SDimitry Andric 48*04eeddc0SDimitry Andric return registers; 49*04eeddc0SDimitry Andric } 50*04eeddc0SDimitry Andric 51*04eeddc0SDimitry Andric static std::vector<DynamicRegisterInfo::Register> GetRegisters_x86_64() { 52*04eeddc0SDimitry Andric ConstString empty_alt_name; 53*04eeddc0SDimitry Andric ConstString reg_set{"general purpose registers"}; 54*04eeddc0SDimitry Andric 55*04eeddc0SDimitry Andric std::vector<DynamicRegisterInfo::Register> registers{ 56*04eeddc0SDimitry Andric R64(rax), R64(rbx), R64(rcx), R64(rdx), R64(rsi), R64(rdi), 57*04eeddc0SDimitry Andric R64(rbp), R64(rsp), R64(r8), R64(r9), R64(r10), R64(r11), 58*04eeddc0SDimitry Andric R64(r12), R64(r13), R64(r14), R64(r15), R64(rip), R32(eflags), 59*04eeddc0SDimitry Andric R32(cs), R32(ss), R32(ds), R32(es), R32(fs), R32(gs), 60*04eeddc0SDimitry Andric }; 61*04eeddc0SDimitry Andric 62*04eeddc0SDimitry Andric return registers; 63*04eeddc0SDimitry Andric } 64*04eeddc0SDimitry Andric 65*04eeddc0SDimitry Andric #undef R32 66*04eeddc0SDimitry Andric #undef R64 67*04eeddc0SDimitry Andric #undef REG 68*04eeddc0SDimitry Andric 69*04eeddc0SDimitry Andric std::vector<DynamicRegisterInfo::Register> 70*04eeddc0SDimitry Andric GetFallbackRegisters(const ArchSpec &arch_to_use) { 71*04eeddc0SDimitry Andric switch (arch_to_use.GetMachine()) { 72*04eeddc0SDimitry Andric case llvm::Triple::aarch64: 73*04eeddc0SDimitry Andric return GetRegisters_aarch64(); 74*04eeddc0SDimitry Andric case llvm::Triple::x86: 75*04eeddc0SDimitry Andric return GetRegisters_x86(); 76*04eeddc0SDimitry Andric case llvm::Triple::x86_64: 77*04eeddc0SDimitry Andric return GetRegisters_x86_64(); 78*04eeddc0SDimitry Andric default: 79*04eeddc0SDimitry Andric break; 80*04eeddc0SDimitry Andric } 81*04eeddc0SDimitry Andric 82*04eeddc0SDimitry Andric return {}; 83*04eeddc0SDimitry Andric } 84*04eeddc0SDimitry Andric 85*04eeddc0SDimitry Andric } // namespace process_gdb_remote 86*04eeddc0SDimitry Andric } // namespace lldb_private 87