1bdd1243dSDimitry Andric //===-- lldb-riscv-register-enums.h -----------------------------*- C++ -*-===// 2bdd1243dSDimitry Andric // 3bdd1243dSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4bdd1243dSDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5bdd1243dSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6bdd1243dSDimitry Andric // 7bdd1243dSDimitry Andric //===----------------------------------------------------------------------===// 8bdd1243dSDimitry Andric 9bdd1243dSDimitry Andric #ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H 10bdd1243dSDimitry Andric #define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H 11bdd1243dSDimitry Andric 12bdd1243dSDimitry Andric // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB) 13bdd1243dSDimitry Andric 14bdd1243dSDimitry Andric // Internal codes for all riscv registers. 15bdd1243dSDimitry Andric enum { 16bdd1243dSDimitry Andric // The same order as user_regs_struct in <asm/ptrace.h> 17bdd1243dSDimitry Andric // note: these enum values are used as byte_offset 18bdd1243dSDimitry Andric gpr_first_riscv = 0, 19bdd1243dSDimitry Andric gpr_pc_riscv = gpr_first_riscv, 20bdd1243dSDimitry Andric gpr_x1_riscv, 21bdd1243dSDimitry Andric gpr_x2_riscv, 22bdd1243dSDimitry Andric gpr_x3_riscv, 23bdd1243dSDimitry Andric gpr_x4_riscv, 24bdd1243dSDimitry Andric gpr_x5_riscv, 25bdd1243dSDimitry Andric gpr_x6_riscv, 26bdd1243dSDimitry Andric gpr_x7_riscv, 27bdd1243dSDimitry Andric gpr_x8_riscv, 28bdd1243dSDimitry Andric gpr_x9_riscv, 29bdd1243dSDimitry Andric gpr_x10_riscv, 30bdd1243dSDimitry Andric gpr_x11_riscv, 31bdd1243dSDimitry Andric gpr_x12_riscv, 32bdd1243dSDimitry Andric gpr_x13_riscv, 33bdd1243dSDimitry Andric gpr_x14_riscv, 34bdd1243dSDimitry Andric gpr_x15_riscv, 35bdd1243dSDimitry Andric gpr_x16_riscv, 36bdd1243dSDimitry Andric gpr_x17_riscv, 37bdd1243dSDimitry Andric gpr_x18_riscv, 38bdd1243dSDimitry Andric gpr_x19_riscv, 39bdd1243dSDimitry Andric gpr_x20_riscv, 40bdd1243dSDimitry Andric gpr_x21_riscv, 41bdd1243dSDimitry Andric gpr_x22_riscv, 42bdd1243dSDimitry Andric gpr_x23_riscv, 43bdd1243dSDimitry Andric gpr_x24_riscv, 44bdd1243dSDimitry Andric gpr_x25_riscv, 45bdd1243dSDimitry Andric gpr_x26_riscv, 46bdd1243dSDimitry Andric gpr_x27_riscv, 47bdd1243dSDimitry Andric gpr_x28_riscv, 48bdd1243dSDimitry Andric gpr_x29_riscv, 49bdd1243dSDimitry Andric gpr_x30_riscv, 50bdd1243dSDimitry Andric gpr_x31_riscv, 51bdd1243dSDimitry Andric gpr_x0_riscv, 52bdd1243dSDimitry Andric gpr_zero_riscv = gpr_x0_riscv, 53bdd1243dSDimitry Andric gpr_ra_riscv = gpr_x1_riscv, 54bdd1243dSDimitry Andric gpr_sp_riscv = gpr_x2_riscv, 55bdd1243dSDimitry Andric gpr_gp_riscv = gpr_x3_riscv, 56bdd1243dSDimitry Andric gpr_tp_riscv = gpr_x4_riscv, 57bdd1243dSDimitry Andric gpr_t0_riscv = gpr_x5_riscv, 58bdd1243dSDimitry Andric gpr_t1_riscv = gpr_x6_riscv, 59bdd1243dSDimitry Andric gpr_t2_riscv = gpr_x7_riscv, 60bdd1243dSDimitry Andric gpr_fp_riscv = gpr_x8_riscv, 61bdd1243dSDimitry Andric gpr_s1_riscv = gpr_x9_riscv, 62bdd1243dSDimitry Andric gpr_a0_riscv = gpr_x10_riscv, 63bdd1243dSDimitry Andric gpr_a1_riscv = gpr_x11_riscv, 64bdd1243dSDimitry Andric gpr_a2_riscv = gpr_x12_riscv, 65bdd1243dSDimitry Andric gpr_a3_riscv = gpr_x13_riscv, 66bdd1243dSDimitry Andric gpr_a4_riscv = gpr_x14_riscv, 67bdd1243dSDimitry Andric gpr_a5_riscv = gpr_x15_riscv, 68bdd1243dSDimitry Andric gpr_a6_riscv = gpr_x16_riscv, 69bdd1243dSDimitry Andric gpr_a7_riscv = gpr_x17_riscv, 70bdd1243dSDimitry Andric gpr_s2_riscv = gpr_x18_riscv, 71bdd1243dSDimitry Andric gpr_s3_riscv = gpr_x19_riscv, 72bdd1243dSDimitry Andric gpr_s4_riscv = gpr_x20_riscv, 73bdd1243dSDimitry Andric gpr_s5_riscv = gpr_x21_riscv, 74bdd1243dSDimitry Andric gpr_s6_riscv = gpr_x22_riscv, 75bdd1243dSDimitry Andric gpr_s7_riscv = gpr_x23_riscv, 76bdd1243dSDimitry Andric gpr_s8_riscv = gpr_x24_riscv, 77bdd1243dSDimitry Andric gpr_s9_riscv = gpr_x25_riscv, 78bdd1243dSDimitry Andric gpr_s10_riscv = gpr_x26_riscv, 79bdd1243dSDimitry Andric gpr_s11_riscv = gpr_x27_riscv, 80bdd1243dSDimitry Andric gpr_t3_riscv = gpr_x28_riscv, 81bdd1243dSDimitry Andric gpr_t4_riscv = gpr_x29_riscv, 82bdd1243dSDimitry Andric gpr_t5_riscv = gpr_x30_riscv, 83bdd1243dSDimitry Andric gpr_t6_riscv = gpr_x31_riscv, 84bdd1243dSDimitry Andric gpr_last_riscv = gpr_x0_riscv, 85bdd1243dSDimitry Andric 86bdd1243dSDimitry Andric fpr_first_riscv = 33, 87bdd1243dSDimitry Andric fpr_f0_riscv = fpr_first_riscv, 88bdd1243dSDimitry Andric fpr_f1_riscv, 89bdd1243dSDimitry Andric fpr_f2_riscv, 90bdd1243dSDimitry Andric fpr_f3_riscv, 91bdd1243dSDimitry Andric fpr_f4_riscv, 92bdd1243dSDimitry Andric fpr_f5_riscv, 93bdd1243dSDimitry Andric fpr_f6_riscv, 94bdd1243dSDimitry Andric fpr_f7_riscv, 95bdd1243dSDimitry Andric fpr_f8_riscv, 96bdd1243dSDimitry Andric fpr_f9_riscv, 97bdd1243dSDimitry Andric fpr_f10_riscv, 98bdd1243dSDimitry Andric fpr_f11_riscv, 99bdd1243dSDimitry Andric fpr_f12_riscv, 100bdd1243dSDimitry Andric fpr_f13_riscv, 101bdd1243dSDimitry Andric fpr_f14_riscv, 102bdd1243dSDimitry Andric fpr_f15_riscv, 103bdd1243dSDimitry Andric fpr_f16_riscv, 104bdd1243dSDimitry Andric fpr_f17_riscv, 105bdd1243dSDimitry Andric fpr_f18_riscv, 106bdd1243dSDimitry Andric fpr_f19_riscv, 107bdd1243dSDimitry Andric fpr_f20_riscv, 108bdd1243dSDimitry Andric fpr_f21_riscv, 109bdd1243dSDimitry Andric fpr_f22_riscv, 110bdd1243dSDimitry Andric fpr_f23_riscv, 111bdd1243dSDimitry Andric fpr_f24_riscv, 112bdd1243dSDimitry Andric fpr_f25_riscv, 113bdd1243dSDimitry Andric fpr_f26_riscv, 114bdd1243dSDimitry Andric fpr_f27_riscv, 115bdd1243dSDimitry Andric fpr_f28_riscv, 116bdd1243dSDimitry Andric fpr_f29_riscv, 117bdd1243dSDimitry Andric fpr_f30_riscv, 118bdd1243dSDimitry Andric fpr_f31_riscv, 119bdd1243dSDimitry Andric 120bdd1243dSDimitry Andric fpr_fcsr_riscv, 121bdd1243dSDimitry Andric fpr_ft0_riscv = fpr_f0_riscv, 122bdd1243dSDimitry Andric fpr_ft1_riscv = fpr_f1_riscv, 123bdd1243dSDimitry Andric fpr_ft2_riscv = fpr_f2_riscv, 124bdd1243dSDimitry Andric fpr_ft3_riscv = fpr_f3_riscv, 125bdd1243dSDimitry Andric fpr_ft4_riscv = fpr_f4_riscv, 126bdd1243dSDimitry Andric fpr_ft5_riscv = fpr_f5_riscv, 127bdd1243dSDimitry Andric fpr_ft6_riscv = fpr_f6_riscv, 128bdd1243dSDimitry Andric fpr_ft7_riscv = fpr_f7_riscv, 129bdd1243dSDimitry Andric fpr_fs0_riscv = fpr_f8_riscv, 130bdd1243dSDimitry Andric fpr_fs1_riscv = fpr_f9_riscv, 131bdd1243dSDimitry Andric fpr_fa0_riscv = fpr_f10_riscv, 132bdd1243dSDimitry Andric fpr_fa1_riscv = fpr_f11_riscv, 133bdd1243dSDimitry Andric fpr_fa2_riscv = fpr_f12_riscv, 134bdd1243dSDimitry Andric fpr_fa3_riscv = fpr_f13_riscv, 135bdd1243dSDimitry Andric fpr_fa4_riscv = fpr_f14_riscv, 136bdd1243dSDimitry Andric fpr_fa5_riscv = fpr_f15_riscv, 137bdd1243dSDimitry Andric fpr_fa6_riscv = fpr_f16_riscv, 138bdd1243dSDimitry Andric fpr_fa7_riscv = fpr_f17_riscv, 139bdd1243dSDimitry Andric fpr_fs2_riscv = fpr_f18_riscv, 140bdd1243dSDimitry Andric fpr_fs3_riscv = fpr_f19_riscv, 141bdd1243dSDimitry Andric fpr_fs4_riscv = fpr_f20_riscv, 142bdd1243dSDimitry Andric fpr_fs5_riscv = fpr_f21_riscv, 143bdd1243dSDimitry Andric fpr_fs6_riscv = fpr_f22_riscv, 144bdd1243dSDimitry Andric fpr_fs7_riscv = fpr_f23_riscv, 145bdd1243dSDimitry Andric fpr_fs8_riscv = fpr_f24_riscv, 146bdd1243dSDimitry Andric fpr_fs9_riscv = fpr_f25_riscv, 147bdd1243dSDimitry Andric fpr_fs10_riscv = fpr_f26_riscv, 148bdd1243dSDimitry Andric fpr_fs11_riscv = fpr_f27_riscv, 149bdd1243dSDimitry Andric fpr_ft8_riscv = fpr_f28_riscv, 150bdd1243dSDimitry Andric fpr_ft9_riscv = fpr_f29_riscv, 151bdd1243dSDimitry Andric fpr_ft10_riscv = fpr_f30_riscv, 152bdd1243dSDimitry Andric fpr_ft11_riscv = fpr_f31_riscv, 153bdd1243dSDimitry Andric fpr_last_riscv = fpr_fcsr_riscv, 154bdd1243dSDimitry Andric 155*06c3fb27SDimitry Andric vpr_first_riscv = 66, 156*06c3fb27SDimitry Andric vpr_v0_riscv = vpr_first_riscv, 157*06c3fb27SDimitry Andric vpr_v1_riscv, 158*06c3fb27SDimitry Andric vpr_v2_riscv, 159*06c3fb27SDimitry Andric vpr_v3_riscv, 160*06c3fb27SDimitry Andric vpr_v4_riscv, 161*06c3fb27SDimitry Andric vpr_v5_riscv, 162*06c3fb27SDimitry Andric vpr_v6_riscv, 163*06c3fb27SDimitry Andric vpr_v7_riscv, 164*06c3fb27SDimitry Andric vpr_v8_riscv, 165*06c3fb27SDimitry Andric vpr_v9_riscv, 166*06c3fb27SDimitry Andric vpr_v10_riscv, 167*06c3fb27SDimitry Andric vpr_v11_riscv, 168*06c3fb27SDimitry Andric vpr_v12_riscv, 169*06c3fb27SDimitry Andric vpr_v13_riscv, 170*06c3fb27SDimitry Andric vpr_v14_riscv, 171*06c3fb27SDimitry Andric vpr_v15_riscv, 172*06c3fb27SDimitry Andric vpr_v16_riscv, 173*06c3fb27SDimitry Andric vpr_v17_riscv, 174*06c3fb27SDimitry Andric vpr_v18_riscv, 175*06c3fb27SDimitry Andric vpr_v19_riscv, 176*06c3fb27SDimitry Andric vpr_v20_riscv, 177*06c3fb27SDimitry Andric vpr_v21_riscv, 178*06c3fb27SDimitry Andric vpr_v22_riscv, 179*06c3fb27SDimitry Andric vpr_v23_riscv, 180*06c3fb27SDimitry Andric vpr_v24_riscv, 181*06c3fb27SDimitry Andric vpr_v25_riscv, 182*06c3fb27SDimitry Andric vpr_v26_riscv, 183*06c3fb27SDimitry Andric vpr_v27_riscv, 184*06c3fb27SDimitry Andric vpr_v28_riscv, 185*06c3fb27SDimitry Andric vpr_v29_riscv, 186*06c3fb27SDimitry Andric vpr_v30_riscv, 187*06c3fb27SDimitry Andric vpr_v31_riscv, 188*06c3fb27SDimitry Andric vpr_last_riscv = vpr_v31_riscv, 189*06c3fb27SDimitry Andric 190bdd1243dSDimitry Andric k_num_registers_riscv 191bdd1243dSDimitry Andric }; 192bdd1243dSDimitry Andric 193bdd1243dSDimitry Andric #endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H 194