xref: /freebsd-src/contrib/llvm-project/lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h (revision 06c3fb2749bda94cb5201f81ffdb8fa6c3161b2e)
1bdd1243dSDimitry Andric //===-- RegisterInfos_riscv64.h ---------------------------------*- C++ -*-===//
2bdd1243dSDimitry Andric //
3bdd1243dSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4bdd1243dSDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5bdd1243dSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6bdd1243dSDimitry Andric //
7bdd1243dSDimitry Andric //===----------------------------------------------------------------------===//
8bdd1243dSDimitry Andric 
9bdd1243dSDimitry Andric #ifdef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
10bdd1243dSDimitry Andric 
11bdd1243dSDimitry Andric #include <stddef.h>
12bdd1243dSDimitry Andric 
13bdd1243dSDimitry Andric #include "lldb/lldb-defines.h"
14bdd1243dSDimitry Andric #include "lldb/lldb-enumerations.h"
15bdd1243dSDimitry Andric #include "lldb/lldb-private.h"
16bdd1243dSDimitry Andric 
17bdd1243dSDimitry Andric #include "Utility/RISCV_DWARF_Registers.h"
18bdd1243dSDimitry Andric #include "lldb-riscv-register-enums.h"
19bdd1243dSDimitry Andric 
20bdd1243dSDimitry Andric #ifndef GPR_OFFSET
21bdd1243dSDimitry Andric #error GPR_OFFSET must be defined before including this header file
22bdd1243dSDimitry Andric #endif
23bdd1243dSDimitry Andric 
24bdd1243dSDimitry Andric #ifndef FPR_OFFSET
25bdd1243dSDimitry Andric #error FPR_OFFSET must be defined before including this header file
26bdd1243dSDimitry Andric #endif
27bdd1243dSDimitry Andric 
28bdd1243dSDimitry Andric using namespace riscv_dwarf;
29bdd1243dSDimitry Andric 
30bdd1243dSDimitry Andric // clang-format off
31bdd1243dSDimitry Andric 
32bdd1243dSDimitry Andric // I suppose EHFrame and DWARF are the same.
33bdd1243dSDimitry Andric #define KIND_HELPER(reg, generic_kind)                                         \
34bdd1243dSDimitry Andric   {                                                                            \
35bdd1243dSDimitry Andric     riscv_dwarf::dwarf_##reg, riscv_dwarf::dwarf_##reg, generic_kind,          \
36bdd1243dSDimitry Andric     LLDB_INVALID_REGNUM, reg##_riscv                                           \
37bdd1243dSDimitry Andric   }
38bdd1243dSDimitry Andric 
39bdd1243dSDimitry Andric // Generates register kinds array for vector registers
40bdd1243dSDimitry Andric #define GPR64_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
41bdd1243dSDimitry Andric 
42bdd1243dSDimitry Andric // FPR register kinds array for vector registers
43bdd1243dSDimitry Andric #define FPR64_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
44bdd1243dSDimitry Andric 
45*06c3fb27SDimitry Andric // VPR register kinds array for vector registers
46*06c3fb27SDimitry Andric #define VPR_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
47*06c3fb27SDimitry Andric 
48bdd1243dSDimitry Andric // Defines a 64-bit general purpose register
49bdd1243dSDimitry Andric #define DEFINE_GPR64(reg, generic_kind) DEFINE_GPR64_ALT(reg, reg, generic_kind)
50bdd1243dSDimitry Andric 
51bdd1243dSDimitry Andric // Defines a 64-bit general purpose register
52bdd1243dSDimitry Andric #define DEFINE_GPR64_ALT(reg, alt, generic_kind)                               \
53bdd1243dSDimitry Andric   {                                                                            \
54bdd1243dSDimitry Andric     #reg, #alt, 8, GPR_OFFSET(gpr_##reg##_riscv - gpr_first_riscv),            \
55bdd1243dSDimitry Andric     lldb::eEncodingUint, lldb::eFormatHex,                                     \
56*06c3fb27SDimitry Andric     GPR64_KIND(gpr_##reg, generic_kind), nullptr, nullptr, nullptr,            \
57bdd1243dSDimitry Andric   }
58bdd1243dSDimitry Andric 
59bdd1243dSDimitry Andric #define DEFINE_FPR64(reg, generic_kind) DEFINE_FPR64_ALT(reg, reg, generic_kind)
60bdd1243dSDimitry Andric 
61bdd1243dSDimitry Andric #define DEFINE_FPR64_ALT(reg, alt, generic_kind) DEFINE_FPR_ALT(reg, alt, 8, generic_kind)
62bdd1243dSDimitry Andric 
63bdd1243dSDimitry Andric #define DEFINE_FPR_ALT(reg, alt, size, generic_kind)                           \
64bdd1243dSDimitry Andric   {                                                                            \
65bdd1243dSDimitry Andric     #reg, #alt, size, FPR_OFFSET(fpr_##reg##_riscv - fpr_first_riscv),         \
66bdd1243dSDimitry Andric     lldb::eEncodingUint, lldb::eFormatHex,                                     \
67*06c3fb27SDimitry Andric     FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr, nullptr,           \
68*06c3fb27SDimitry Andric   }
69*06c3fb27SDimitry Andric 
70*06c3fb27SDimitry Andric #define DEFINE_VPR(reg, generic_kind) DEFINE_VPR_ALT(reg, reg, generic_kind)
71*06c3fb27SDimitry Andric 
72*06c3fb27SDimitry Andric // Defines a scalable vector register, with default size 128 bits
73*06c3fb27SDimitry Andric // The byte offset 0 is a placeholder, which should be corrected at runtime.
74*06c3fb27SDimitry Andric #define DEFINE_VPR_ALT(reg, alt, generic_kind)                                 \
75*06c3fb27SDimitry Andric   {                                                                            \
76*06c3fb27SDimitry Andric     #reg, #alt, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,      \
77*06c3fb27SDimitry Andric     VPR_KIND(vpr_##reg, generic_kind), nullptr, nullptr, nullptr               \
78bdd1243dSDimitry Andric   }
79bdd1243dSDimitry Andric 
80bdd1243dSDimitry Andric // clang-format on
81bdd1243dSDimitry Andric 
82bdd1243dSDimitry Andric static lldb_private::RegisterInfo g_register_infos_riscv64_le[] = {
83bdd1243dSDimitry Andric     // DEFINE_GPR64(name, GENERIC KIND)
84bdd1243dSDimitry Andric     DEFINE_GPR64(pc, LLDB_REGNUM_GENERIC_PC),
85bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(ra, x1, LLDB_REGNUM_GENERIC_RA),
86bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(sp, x2, LLDB_REGNUM_GENERIC_SP),
87bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(gp, x3, LLDB_INVALID_REGNUM),
88bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(tp, x4, LLDB_INVALID_REGNUM),
89bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(t0, x5, LLDB_INVALID_REGNUM),
90bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(t1, x6, LLDB_INVALID_REGNUM),
91bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(t2, x7, LLDB_INVALID_REGNUM),
92bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(fp, x8, LLDB_REGNUM_GENERIC_FP),
93bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s1, x9, LLDB_INVALID_REGNUM),
94bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(a0, x10, LLDB_REGNUM_GENERIC_ARG1),
95bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(a1, x11, LLDB_REGNUM_GENERIC_ARG2),
96bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(a2, x12, LLDB_REGNUM_GENERIC_ARG3),
97bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(a3, x13, LLDB_REGNUM_GENERIC_ARG4),
98bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(a4, x14, LLDB_REGNUM_GENERIC_ARG5),
99bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(a5, x15, LLDB_REGNUM_GENERIC_ARG6),
100bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(a6, x16, LLDB_REGNUM_GENERIC_ARG7),
101bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(a7, x17, LLDB_REGNUM_GENERIC_ARG8),
102bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s2, x18, LLDB_INVALID_REGNUM),
103bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s3, x19, LLDB_INVALID_REGNUM),
104bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s4, x20, LLDB_INVALID_REGNUM),
105bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s5, x21, LLDB_INVALID_REGNUM),
106bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s6, x22, LLDB_INVALID_REGNUM),
107bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s7, x23, LLDB_INVALID_REGNUM),
108bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s8, x24, LLDB_INVALID_REGNUM),
109bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s9, x25, LLDB_INVALID_REGNUM),
110bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s10, x26, LLDB_INVALID_REGNUM),
111bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(s11, x27, LLDB_INVALID_REGNUM),
112bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(t3, x28, LLDB_INVALID_REGNUM),
113bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(t4, x29, LLDB_INVALID_REGNUM),
114bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(t5, x30, LLDB_INVALID_REGNUM),
115bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(t6, x31, LLDB_INVALID_REGNUM),
116bdd1243dSDimitry Andric     DEFINE_GPR64_ALT(zero, x0, LLDB_INVALID_REGNUM),
117bdd1243dSDimitry Andric 
118bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft0, f0, LLDB_INVALID_REGNUM),
119bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft1, f1, LLDB_INVALID_REGNUM),
120bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft2, f2, LLDB_INVALID_REGNUM),
121bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft3, f3, LLDB_INVALID_REGNUM),
122bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft4, f4, LLDB_INVALID_REGNUM),
123bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft5, f5, LLDB_INVALID_REGNUM),
124bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft6, f6, LLDB_INVALID_REGNUM),
125bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft7, f7, LLDB_INVALID_REGNUM),
126bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs0, f8, LLDB_INVALID_REGNUM),
127bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs1, f9, LLDB_INVALID_REGNUM),
128bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fa0, f10, LLDB_INVALID_REGNUM),
129bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fa1, f11, LLDB_INVALID_REGNUM),
130bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fa2, f12, LLDB_INVALID_REGNUM),
131bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fa3, f13, LLDB_INVALID_REGNUM),
132bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fa4, f14, LLDB_INVALID_REGNUM),
133bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fa5, f15, LLDB_INVALID_REGNUM),
134bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fa6, f16, LLDB_INVALID_REGNUM),
135bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fa7, f17, LLDB_INVALID_REGNUM),
136bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs2, f18, LLDB_INVALID_REGNUM),
137bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs3, f19, LLDB_INVALID_REGNUM),
138bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs4, f20, LLDB_INVALID_REGNUM),
139bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs5, f21, LLDB_INVALID_REGNUM),
140bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs6, f22, LLDB_INVALID_REGNUM),
141bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs7, f23, LLDB_INVALID_REGNUM),
142bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs8, f24, LLDB_INVALID_REGNUM),
143bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs9, f25, LLDB_INVALID_REGNUM),
144bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs10, f26, LLDB_INVALID_REGNUM),
145bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(fs11, f27, LLDB_INVALID_REGNUM),
146bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft8, f28, LLDB_INVALID_REGNUM),
147bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft9, f29, LLDB_INVALID_REGNUM),
148bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft10, f30, LLDB_INVALID_REGNUM),
149bdd1243dSDimitry Andric     DEFINE_FPR64_ALT(ft11, f31, LLDB_INVALID_REGNUM),
150bdd1243dSDimitry Andric     DEFINE_FPR_ALT(fcsr, nullptr, 4, LLDB_INVALID_REGNUM),
151*06c3fb27SDimitry Andric 
152*06c3fb27SDimitry Andric     DEFINE_VPR(v0, LLDB_INVALID_REGNUM),
153*06c3fb27SDimitry Andric     DEFINE_VPR(v1, LLDB_INVALID_REGNUM),
154*06c3fb27SDimitry Andric     DEFINE_VPR(v2, LLDB_INVALID_REGNUM),
155*06c3fb27SDimitry Andric     DEFINE_VPR(v3, LLDB_INVALID_REGNUM),
156*06c3fb27SDimitry Andric     DEFINE_VPR(v4, LLDB_INVALID_REGNUM),
157*06c3fb27SDimitry Andric     DEFINE_VPR(v5, LLDB_INVALID_REGNUM),
158*06c3fb27SDimitry Andric     DEFINE_VPR(v6, LLDB_INVALID_REGNUM),
159*06c3fb27SDimitry Andric     DEFINE_VPR(v7, LLDB_INVALID_REGNUM),
160*06c3fb27SDimitry Andric     DEFINE_VPR(v8, LLDB_INVALID_REGNUM),
161*06c3fb27SDimitry Andric     DEFINE_VPR(v9, LLDB_INVALID_REGNUM),
162*06c3fb27SDimitry Andric     DEFINE_VPR(v10, LLDB_INVALID_REGNUM),
163*06c3fb27SDimitry Andric     DEFINE_VPR(v11, LLDB_INVALID_REGNUM),
164*06c3fb27SDimitry Andric     DEFINE_VPR(v12, LLDB_INVALID_REGNUM),
165*06c3fb27SDimitry Andric     DEFINE_VPR(v13, LLDB_INVALID_REGNUM),
166*06c3fb27SDimitry Andric     DEFINE_VPR(v14, LLDB_INVALID_REGNUM),
167*06c3fb27SDimitry Andric     DEFINE_VPR(v15, LLDB_INVALID_REGNUM),
168*06c3fb27SDimitry Andric     DEFINE_VPR(v16, LLDB_INVALID_REGNUM),
169*06c3fb27SDimitry Andric     DEFINE_VPR(v17, LLDB_INVALID_REGNUM),
170*06c3fb27SDimitry Andric     DEFINE_VPR(v18, LLDB_INVALID_REGNUM),
171*06c3fb27SDimitry Andric     DEFINE_VPR(v19, LLDB_INVALID_REGNUM),
172*06c3fb27SDimitry Andric     DEFINE_VPR(v20, LLDB_INVALID_REGNUM),
173*06c3fb27SDimitry Andric     DEFINE_VPR(v21, LLDB_INVALID_REGNUM),
174*06c3fb27SDimitry Andric     DEFINE_VPR(v22, LLDB_INVALID_REGNUM),
175*06c3fb27SDimitry Andric     DEFINE_VPR(v23, LLDB_INVALID_REGNUM),
176*06c3fb27SDimitry Andric     DEFINE_VPR(v24, LLDB_INVALID_REGNUM),
177*06c3fb27SDimitry Andric     DEFINE_VPR(v25, LLDB_INVALID_REGNUM),
178*06c3fb27SDimitry Andric     DEFINE_VPR(v26, LLDB_INVALID_REGNUM),
179*06c3fb27SDimitry Andric     DEFINE_VPR(v27, LLDB_INVALID_REGNUM),
180*06c3fb27SDimitry Andric     DEFINE_VPR(v28, LLDB_INVALID_REGNUM),
181*06c3fb27SDimitry Andric     DEFINE_VPR(v29, LLDB_INVALID_REGNUM),
182*06c3fb27SDimitry Andric     DEFINE_VPR(v30, LLDB_INVALID_REGNUM),
183*06c3fb27SDimitry Andric     DEFINE_VPR(v31, LLDB_INVALID_REGNUM),
184bdd1243dSDimitry Andric };
185bdd1243dSDimitry Andric 
186bdd1243dSDimitry Andric #endif // DECLARE_REGISTER_INFOS_RISCV64_STRUCT
187