xref: /freebsd-src/contrib/llvm-project/lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h (revision 06c3fb2749bda94cb5201f81ffdb8fa6c3161b2e)
1e8d8bef9SDimitry Andric //===-- RegisterInfos_arm64_sve.h -------------------------------*- C++ -*-===//
2e8d8bef9SDimitry Andric //
3e8d8bef9SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4e8d8bef9SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5e8d8bef9SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6e8d8bef9SDimitry Andric //
7e8d8bef9SDimitry Andric //===----------------------------------------------------------------------===//
8e8d8bef9SDimitry Andric 
9e8d8bef9SDimitry Andric #ifdef DECLARE_REGISTER_INFOS_ARM64_STRUCT
10e8d8bef9SDimitry Andric 
11e8d8bef9SDimitry Andric enum {
12e8d8bef9SDimitry Andric   sve_vg = exc_far,
13e8d8bef9SDimitry Andric 
14e8d8bef9SDimitry Andric   sve_z0,
15e8d8bef9SDimitry Andric   sve_z1,
16e8d8bef9SDimitry Andric   sve_z2,
17e8d8bef9SDimitry Andric   sve_z3,
18e8d8bef9SDimitry Andric   sve_z4,
19e8d8bef9SDimitry Andric   sve_z5,
20e8d8bef9SDimitry Andric   sve_z6,
21e8d8bef9SDimitry Andric   sve_z7,
22e8d8bef9SDimitry Andric   sve_z8,
23e8d8bef9SDimitry Andric   sve_z9,
24e8d8bef9SDimitry Andric   sve_z10,
25e8d8bef9SDimitry Andric   sve_z11,
26e8d8bef9SDimitry Andric   sve_z12,
27e8d8bef9SDimitry Andric   sve_z13,
28e8d8bef9SDimitry Andric   sve_z14,
29e8d8bef9SDimitry Andric   sve_z15,
30e8d8bef9SDimitry Andric   sve_z16,
31e8d8bef9SDimitry Andric   sve_z17,
32e8d8bef9SDimitry Andric   sve_z18,
33e8d8bef9SDimitry Andric   sve_z19,
34e8d8bef9SDimitry Andric   sve_z20,
35e8d8bef9SDimitry Andric   sve_z21,
36e8d8bef9SDimitry Andric   sve_z22,
37e8d8bef9SDimitry Andric   sve_z23,
38e8d8bef9SDimitry Andric   sve_z24,
39e8d8bef9SDimitry Andric   sve_z25,
40e8d8bef9SDimitry Andric   sve_z26,
41e8d8bef9SDimitry Andric   sve_z27,
42e8d8bef9SDimitry Andric   sve_z28,
43e8d8bef9SDimitry Andric   sve_z29,
44e8d8bef9SDimitry Andric   sve_z30,
45e8d8bef9SDimitry Andric   sve_z31,
46e8d8bef9SDimitry Andric 
47e8d8bef9SDimitry Andric   sve_p0,
48e8d8bef9SDimitry Andric   sve_p1,
49e8d8bef9SDimitry Andric   sve_p2,
50e8d8bef9SDimitry Andric   sve_p3,
51e8d8bef9SDimitry Andric   sve_p4,
52e8d8bef9SDimitry Andric   sve_p5,
53e8d8bef9SDimitry Andric   sve_p6,
54e8d8bef9SDimitry Andric   sve_p7,
55e8d8bef9SDimitry Andric   sve_p8,
56e8d8bef9SDimitry Andric   sve_p9,
57e8d8bef9SDimitry Andric   sve_p10,
58e8d8bef9SDimitry Andric   sve_p11,
59e8d8bef9SDimitry Andric   sve_p12,
60e8d8bef9SDimitry Andric   sve_p13,
61e8d8bef9SDimitry Andric   sve_p14,
62e8d8bef9SDimitry Andric   sve_p15,
63e8d8bef9SDimitry Andric 
64e8d8bef9SDimitry Andric   sve_ffr,
65e8d8bef9SDimitry Andric };
66e8d8bef9SDimitry Andric 
67e8d8bef9SDimitry Andric #ifndef SVE_OFFSET_VG
68e8d8bef9SDimitry Andric #error SVE_OFFSET_VG must be defined before including this header file
69e8d8bef9SDimitry Andric #endif
70e8d8bef9SDimitry Andric 
71e8d8bef9SDimitry Andric static uint32_t g_sve_s0_invalidates[] = {sve_z0, fpu_v0, fpu_d0,
72e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
73e8d8bef9SDimitry Andric static uint32_t g_sve_s1_invalidates[] = {sve_z1, fpu_v1, fpu_d1,
74e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
75e8d8bef9SDimitry Andric static uint32_t g_sve_s2_invalidates[] = {sve_z2, fpu_v2, fpu_d2,
76e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
77e8d8bef9SDimitry Andric static uint32_t g_sve_s3_invalidates[] = {sve_z3, fpu_v3, fpu_d3,
78e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
79e8d8bef9SDimitry Andric static uint32_t g_sve_s4_invalidates[] = {sve_z4, fpu_v4, fpu_d4,
80e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
81e8d8bef9SDimitry Andric static uint32_t g_sve_s5_invalidates[] = {sve_z5, fpu_v5, fpu_d5,
82e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
83e8d8bef9SDimitry Andric static uint32_t g_sve_s6_invalidates[] = {sve_z6, fpu_v6, fpu_d6,
84e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
85e8d8bef9SDimitry Andric static uint32_t g_sve_s7_invalidates[] = {sve_z7, fpu_v7, fpu_d7,
86e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
87e8d8bef9SDimitry Andric static uint32_t g_sve_s8_invalidates[] = {sve_z8, fpu_v8, fpu_d8,
88e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
89e8d8bef9SDimitry Andric static uint32_t g_sve_s9_invalidates[] = {sve_z9, fpu_v9, fpu_d9,
90e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
91e8d8bef9SDimitry Andric static uint32_t g_sve_s10_invalidates[] = {sve_z10, fpu_v10, fpu_d10,
92e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
93e8d8bef9SDimitry Andric static uint32_t g_sve_s11_invalidates[] = {sve_z11, fpu_v11, fpu_d11,
94e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
95e8d8bef9SDimitry Andric static uint32_t g_sve_s12_invalidates[] = {sve_z12, fpu_v12, fpu_d12,
96e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
97e8d8bef9SDimitry Andric static uint32_t g_sve_s13_invalidates[] = {sve_z13, fpu_v13, fpu_d13,
98e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
99e8d8bef9SDimitry Andric static uint32_t g_sve_s14_invalidates[] = {sve_z14, fpu_v14, fpu_d14,
100e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
101e8d8bef9SDimitry Andric static uint32_t g_sve_s15_invalidates[] = {sve_z15, fpu_v15, fpu_d15,
102e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
103e8d8bef9SDimitry Andric static uint32_t g_sve_s16_invalidates[] = {sve_z16, fpu_v16, fpu_d16,
104e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
105e8d8bef9SDimitry Andric static uint32_t g_sve_s17_invalidates[] = {sve_z17, fpu_v17, fpu_d17,
106e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
107e8d8bef9SDimitry Andric static uint32_t g_sve_s18_invalidates[] = {sve_z18, fpu_v18, fpu_d18,
108e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
109e8d8bef9SDimitry Andric static uint32_t g_sve_s19_invalidates[] = {sve_z19, fpu_v19, fpu_d19,
110e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
111e8d8bef9SDimitry Andric static uint32_t g_sve_s20_invalidates[] = {sve_z20, fpu_v20, fpu_d20,
112e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
113e8d8bef9SDimitry Andric static uint32_t g_sve_s21_invalidates[] = {sve_z21, fpu_v21, fpu_d21,
114e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
115e8d8bef9SDimitry Andric static uint32_t g_sve_s22_invalidates[] = {sve_z22, fpu_v22, fpu_d22,
116e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
117e8d8bef9SDimitry Andric static uint32_t g_sve_s23_invalidates[] = {sve_z23, fpu_v23, fpu_d23,
118e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
119e8d8bef9SDimitry Andric static uint32_t g_sve_s24_invalidates[] = {sve_z24, fpu_v24, fpu_d24,
120e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
121e8d8bef9SDimitry Andric static uint32_t g_sve_s25_invalidates[] = {sve_z25, fpu_v25, fpu_d25,
122e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
123e8d8bef9SDimitry Andric static uint32_t g_sve_s26_invalidates[] = {sve_z26, fpu_v26, fpu_d26,
124e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
125e8d8bef9SDimitry Andric static uint32_t g_sve_s27_invalidates[] = {sve_z27, fpu_v27, fpu_d27,
126e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
127e8d8bef9SDimitry Andric static uint32_t g_sve_s28_invalidates[] = {sve_z28, fpu_v28, fpu_d28,
128e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
129e8d8bef9SDimitry Andric static uint32_t g_sve_s29_invalidates[] = {sve_z29, fpu_v29, fpu_d29,
130e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
131e8d8bef9SDimitry Andric static uint32_t g_sve_s30_invalidates[] = {sve_z30, fpu_v30, fpu_d30,
132e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
133e8d8bef9SDimitry Andric static uint32_t g_sve_s31_invalidates[] = {sve_z31, fpu_v31, fpu_d31,
134e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
135e8d8bef9SDimitry Andric 
136e8d8bef9SDimitry Andric static uint32_t g_sve_d0_invalidates[] = {sve_z0, fpu_v0, fpu_s0,
137e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
138e8d8bef9SDimitry Andric static uint32_t g_sve_d1_invalidates[] = {sve_z1, fpu_v1, fpu_s1,
139e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
140e8d8bef9SDimitry Andric static uint32_t g_sve_d2_invalidates[] = {sve_z2, fpu_v2, fpu_s2,
141e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
142e8d8bef9SDimitry Andric static uint32_t g_sve_d3_invalidates[] = {sve_z3, fpu_v3, fpu_s3,
143e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
144e8d8bef9SDimitry Andric static uint32_t g_sve_d4_invalidates[] = {sve_z4, fpu_v4, fpu_s4,
145e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
146e8d8bef9SDimitry Andric static uint32_t g_sve_d5_invalidates[] = {sve_z5, fpu_v5, fpu_s5,
147e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
148e8d8bef9SDimitry Andric static uint32_t g_sve_d6_invalidates[] = {sve_z6, fpu_v6, fpu_s6,
149e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
150e8d8bef9SDimitry Andric static uint32_t g_sve_d7_invalidates[] = {sve_z7, fpu_v7, fpu_s7,
151e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
152e8d8bef9SDimitry Andric static uint32_t g_sve_d8_invalidates[] = {sve_z8, fpu_v8, fpu_s8,
153e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
154e8d8bef9SDimitry Andric static uint32_t g_sve_d9_invalidates[] = {sve_z9, fpu_v9, fpu_s9,
155e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
156e8d8bef9SDimitry Andric static uint32_t g_sve_d10_invalidates[] = {sve_z10, fpu_v10, fpu_s10,
157e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
158e8d8bef9SDimitry Andric static uint32_t g_sve_d11_invalidates[] = {sve_z11, fpu_v11, fpu_s11,
159e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
160e8d8bef9SDimitry Andric static uint32_t g_sve_d12_invalidates[] = {sve_z12, fpu_v12, fpu_s12,
161e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
162e8d8bef9SDimitry Andric static uint32_t g_sve_d13_invalidates[] = {sve_z13, fpu_v13, fpu_s13,
163e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
164e8d8bef9SDimitry Andric static uint32_t g_sve_d14_invalidates[] = {sve_z14, fpu_v14, fpu_s14,
165e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
166e8d8bef9SDimitry Andric static uint32_t g_sve_d15_invalidates[] = {sve_z15, fpu_v15, fpu_s15,
167e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
168e8d8bef9SDimitry Andric static uint32_t g_sve_d16_invalidates[] = {sve_z16, fpu_v16, fpu_s16,
169e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
170e8d8bef9SDimitry Andric static uint32_t g_sve_d17_invalidates[] = {sve_z17, fpu_v17, fpu_s17,
171e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
172e8d8bef9SDimitry Andric static uint32_t g_sve_d18_invalidates[] = {sve_z18, fpu_v18, fpu_s18,
173e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
174e8d8bef9SDimitry Andric static uint32_t g_sve_d19_invalidates[] = {sve_z19, fpu_v19, fpu_s19,
175e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
176e8d8bef9SDimitry Andric static uint32_t g_sve_d20_invalidates[] = {sve_z20, fpu_v20, fpu_s20,
177e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
178e8d8bef9SDimitry Andric static uint32_t g_sve_d21_invalidates[] = {sve_z21, fpu_v21, fpu_s21,
179e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
180e8d8bef9SDimitry Andric static uint32_t g_sve_d22_invalidates[] = {sve_z22, fpu_v22, fpu_s22,
181e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
182e8d8bef9SDimitry Andric static uint32_t g_sve_d23_invalidates[] = {sve_z23, fpu_v23, fpu_s23,
183e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
184e8d8bef9SDimitry Andric static uint32_t g_sve_d24_invalidates[] = {sve_z24, fpu_v24, fpu_s24,
185e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
186e8d8bef9SDimitry Andric static uint32_t g_sve_d25_invalidates[] = {sve_z25, fpu_v25, fpu_s25,
187e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
188e8d8bef9SDimitry Andric static uint32_t g_sve_d26_invalidates[] = {sve_z26, fpu_v26, fpu_s26,
189e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
190e8d8bef9SDimitry Andric static uint32_t g_sve_d27_invalidates[] = {sve_z27, fpu_v27, fpu_s27,
191e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
192e8d8bef9SDimitry Andric static uint32_t g_sve_d28_invalidates[] = {sve_z28, fpu_v28, fpu_s28,
193e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
194e8d8bef9SDimitry Andric static uint32_t g_sve_d29_invalidates[] = {sve_z29, fpu_v29, fpu_s29,
195e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
196e8d8bef9SDimitry Andric static uint32_t g_sve_d30_invalidates[] = {sve_z30, fpu_v30, fpu_s30,
197e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
198e8d8bef9SDimitry Andric static uint32_t g_sve_d31_invalidates[] = {sve_z31, fpu_v31, fpu_s31,
199e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
200e8d8bef9SDimitry Andric 
201e8d8bef9SDimitry Andric static uint32_t g_sve_v0_invalidates[] = {sve_z0, fpu_d0, fpu_s0,
202e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
203e8d8bef9SDimitry Andric static uint32_t g_sve_v1_invalidates[] = {sve_z1, fpu_d1, fpu_s1,
204e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
205e8d8bef9SDimitry Andric static uint32_t g_sve_v2_invalidates[] = {sve_z2, fpu_d2, fpu_s2,
206e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
207e8d8bef9SDimitry Andric static uint32_t g_sve_v3_invalidates[] = {sve_z3, fpu_d3, fpu_s3,
208e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
209e8d8bef9SDimitry Andric static uint32_t g_sve_v4_invalidates[] = {sve_z4, fpu_d4, fpu_s4,
210e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
211e8d8bef9SDimitry Andric static uint32_t g_sve_v5_invalidates[] = {sve_z5, fpu_d5, fpu_s5,
212e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
213e8d8bef9SDimitry Andric static uint32_t g_sve_v6_invalidates[] = {sve_z6, fpu_d6, fpu_s6,
214e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
215e8d8bef9SDimitry Andric static uint32_t g_sve_v7_invalidates[] = {sve_z7, fpu_d7, fpu_s7,
216e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
217e8d8bef9SDimitry Andric static uint32_t g_sve_v8_invalidates[] = {sve_z8, fpu_d8, fpu_s8,
218e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
219e8d8bef9SDimitry Andric static uint32_t g_sve_v9_invalidates[] = {sve_z9, fpu_d9, fpu_s9,
220e8d8bef9SDimitry Andric                                           LLDB_INVALID_REGNUM};
221e8d8bef9SDimitry Andric static uint32_t g_sve_v10_invalidates[] = {sve_z10, fpu_d10, fpu_s10,
222e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
223e8d8bef9SDimitry Andric static uint32_t g_sve_v11_invalidates[] = {sve_z11, fpu_d11, fpu_s11,
224e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
225e8d8bef9SDimitry Andric static uint32_t g_sve_v12_invalidates[] = {sve_z12, fpu_d12, fpu_s12,
226e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
227e8d8bef9SDimitry Andric static uint32_t g_sve_v13_invalidates[] = {sve_z13, fpu_d13, fpu_s13,
228e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
229e8d8bef9SDimitry Andric static uint32_t g_sve_v14_invalidates[] = {sve_z14, fpu_d14, fpu_s14,
230e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
231e8d8bef9SDimitry Andric static uint32_t g_sve_v15_invalidates[] = {sve_z15, fpu_d15, fpu_s15,
232e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
233e8d8bef9SDimitry Andric static uint32_t g_sve_v16_invalidates[] = {sve_z16, fpu_d16, fpu_s16,
234e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
235e8d8bef9SDimitry Andric static uint32_t g_sve_v17_invalidates[] = {sve_z17, fpu_d17, fpu_s17,
236e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
237e8d8bef9SDimitry Andric static uint32_t g_sve_v18_invalidates[] = {sve_z18, fpu_d18, fpu_s18,
238e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
239e8d8bef9SDimitry Andric static uint32_t g_sve_v19_invalidates[] = {sve_z19, fpu_d19, fpu_s19,
240e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
241e8d8bef9SDimitry Andric static uint32_t g_sve_v20_invalidates[] = {sve_z20, fpu_d20, fpu_s20,
242e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
243e8d8bef9SDimitry Andric static uint32_t g_sve_v21_invalidates[] = {sve_z21, fpu_d21, fpu_s21,
244e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
245e8d8bef9SDimitry Andric static uint32_t g_sve_v22_invalidates[] = {sve_z22, fpu_d22, fpu_s22,
246e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
247e8d8bef9SDimitry Andric static uint32_t g_sve_v23_invalidates[] = {sve_z23, fpu_d23, fpu_s23,
248e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
249e8d8bef9SDimitry Andric static uint32_t g_sve_v24_invalidates[] = {sve_z24, fpu_d24, fpu_s24,
250e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
251e8d8bef9SDimitry Andric static uint32_t g_sve_v25_invalidates[] = {sve_z25, fpu_d25, fpu_s25,
252e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
253e8d8bef9SDimitry Andric static uint32_t g_sve_v26_invalidates[] = {sve_z26, fpu_d26, fpu_s26,
254e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
255e8d8bef9SDimitry Andric static uint32_t g_sve_v27_invalidates[] = {sve_z27, fpu_d27, fpu_s27,
256e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
257e8d8bef9SDimitry Andric static uint32_t g_sve_v28_invalidates[] = {sve_z28, fpu_d28, fpu_s28,
258e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
259e8d8bef9SDimitry Andric static uint32_t g_sve_v29_invalidates[] = {sve_z29, fpu_d29, fpu_s29,
260e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
261e8d8bef9SDimitry Andric static uint32_t g_sve_v30_invalidates[] = {sve_z30, fpu_d30, fpu_s30,
262e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
263e8d8bef9SDimitry Andric static uint32_t g_sve_v31_invalidates[] = {sve_z31, fpu_d31, fpu_s31,
264e8d8bef9SDimitry Andric                                            LLDB_INVALID_REGNUM};
265e8d8bef9SDimitry Andric 
266e8d8bef9SDimitry Andric static uint32_t g_contained_z0[] = {sve_z0, LLDB_INVALID_REGNUM};
267e8d8bef9SDimitry Andric static uint32_t g_contained_z1[] = {sve_z1, LLDB_INVALID_REGNUM};
268e8d8bef9SDimitry Andric static uint32_t g_contained_z2[] = {sve_z2, LLDB_INVALID_REGNUM};
269e8d8bef9SDimitry Andric static uint32_t g_contained_z3[] = {sve_z3, LLDB_INVALID_REGNUM};
270e8d8bef9SDimitry Andric static uint32_t g_contained_z4[] = {sve_z4, LLDB_INVALID_REGNUM};
271e8d8bef9SDimitry Andric static uint32_t g_contained_z5[] = {sve_z5, LLDB_INVALID_REGNUM};
272e8d8bef9SDimitry Andric static uint32_t g_contained_z6[] = {sve_z6, LLDB_INVALID_REGNUM};
273e8d8bef9SDimitry Andric static uint32_t g_contained_z7[] = {sve_z7, LLDB_INVALID_REGNUM};
274e8d8bef9SDimitry Andric static uint32_t g_contained_z8[] = {sve_z8, LLDB_INVALID_REGNUM};
275e8d8bef9SDimitry Andric static uint32_t g_contained_z9[] = {sve_z9, LLDB_INVALID_REGNUM};
276e8d8bef9SDimitry Andric static uint32_t g_contained_z10[] = {sve_z10, LLDB_INVALID_REGNUM};
277e8d8bef9SDimitry Andric static uint32_t g_contained_z11[] = {sve_z11, LLDB_INVALID_REGNUM};
278e8d8bef9SDimitry Andric static uint32_t g_contained_z12[] = {sve_z12, LLDB_INVALID_REGNUM};
279e8d8bef9SDimitry Andric static uint32_t g_contained_z13[] = {sve_z13, LLDB_INVALID_REGNUM};
280e8d8bef9SDimitry Andric static uint32_t g_contained_z14[] = {sve_z14, LLDB_INVALID_REGNUM};
281e8d8bef9SDimitry Andric static uint32_t g_contained_z15[] = {sve_z15, LLDB_INVALID_REGNUM};
282e8d8bef9SDimitry Andric static uint32_t g_contained_z16[] = {sve_z16, LLDB_INVALID_REGNUM};
283e8d8bef9SDimitry Andric static uint32_t g_contained_z17[] = {sve_z17, LLDB_INVALID_REGNUM};
284e8d8bef9SDimitry Andric static uint32_t g_contained_z18[] = {sve_z18, LLDB_INVALID_REGNUM};
285e8d8bef9SDimitry Andric static uint32_t g_contained_z19[] = {sve_z19, LLDB_INVALID_REGNUM};
286e8d8bef9SDimitry Andric static uint32_t g_contained_z20[] = {sve_z20, LLDB_INVALID_REGNUM};
287e8d8bef9SDimitry Andric static uint32_t g_contained_z21[] = {sve_z21, LLDB_INVALID_REGNUM};
288e8d8bef9SDimitry Andric static uint32_t g_contained_z22[] = {sve_z22, LLDB_INVALID_REGNUM};
289e8d8bef9SDimitry Andric static uint32_t g_contained_z23[] = {sve_z23, LLDB_INVALID_REGNUM};
290e8d8bef9SDimitry Andric static uint32_t g_contained_z24[] = {sve_z24, LLDB_INVALID_REGNUM};
291e8d8bef9SDimitry Andric static uint32_t g_contained_z25[] = {sve_z25, LLDB_INVALID_REGNUM};
292e8d8bef9SDimitry Andric static uint32_t g_contained_z26[] = {sve_z26, LLDB_INVALID_REGNUM};
293e8d8bef9SDimitry Andric static uint32_t g_contained_z27[] = {sve_z27, LLDB_INVALID_REGNUM};
294e8d8bef9SDimitry Andric static uint32_t g_contained_z28[] = {sve_z28, LLDB_INVALID_REGNUM};
295e8d8bef9SDimitry Andric static uint32_t g_contained_z29[] = {sve_z29, LLDB_INVALID_REGNUM};
296e8d8bef9SDimitry Andric static uint32_t g_contained_z30[] = {sve_z30, LLDB_INVALID_REGNUM};
297e8d8bef9SDimitry Andric static uint32_t g_contained_z31[] = {sve_z31, LLDB_INVALID_REGNUM};
298e8d8bef9SDimitry Andric 
299e8d8bef9SDimitry Andric #define VG_OFFSET_NAME(reg) SVE_OFFSET_VG
300e8d8bef9SDimitry Andric 
301e8d8bef9SDimitry Andric #define SVE_REG_KIND(reg) MISC_KIND(reg, sve, LLDB_INVALID_REGNUM)
302e8d8bef9SDimitry Andric #define MISC_VG_KIND(lldb_kind) MISC_KIND(vg, sve, LLDB_INVALID_REGNUM)
303e8d8bef9SDimitry Andric 
304e8d8bef9SDimitry Andric // Default offset SVE Z registers and all corresponding pseudo registers
305e8d8bef9SDimitry Andric // ( S, D and V registers) is zero and will be configured during execution.
306e8d8bef9SDimitry Andric 
307bdd1243dSDimitry Andric // clang-format off
308bdd1243dSDimitry Andric 
309e8d8bef9SDimitry Andric // Defines sve pseudo vector (V) register with 16-byte size
310e8d8bef9SDimitry Andric #define DEFINE_VREG_SVE(vreg, zreg)                                            \
311e8d8bef9SDimitry Andric   {                                                                            \
312e8d8bef9SDimitry Andric     #vreg, nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  \
313e8d8bef9SDimitry Andric         VREG_KIND(vreg), g_contained_##zreg, g_sve_##vreg##_invalidates,       \
314*06c3fb27SDimitry Andric         nullptr,                                                               \
315e8d8bef9SDimitry Andric   }
316e8d8bef9SDimitry Andric 
317e8d8bef9SDimitry Andric // Defines S and D pseudo registers mapping over corresponding vector register
318e8d8bef9SDimitry Andric #define DEFINE_FPU_PSEUDO_SVE(reg, size, zreg)                                 \
319e8d8bef9SDimitry Andric   {                                                                            \
320e8d8bef9SDimitry Andric     #reg, nullptr, size, 0, lldb::eEncodingIEEE754, lldb::eFormatFloat,        \
321e8d8bef9SDimitry Andric         LLDB_KIND(fpu_##reg), g_contained_##zreg, g_sve_##reg##_invalidates,   \
322*06c3fb27SDimitry Andric         nullptr,                                                               \
323e8d8bef9SDimitry Andric   }
324e8d8bef9SDimitry Andric 
325e8d8bef9SDimitry Andric // Defines a Z vector register with 16-byte default size
326e8d8bef9SDimitry Andric #define DEFINE_ZREG(reg)                                                       \
327e8d8bef9SDimitry Andric   {                                                                            \
328e8d8bef9SDimitry Andric     #reg, nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,   \
329*06c3fb27SDimitry Andric         SVE_REG_KIND(reg), nullptr, nullptr, nullptr,                          \
330e8d8bef9SDimitry Andric   }
331e8d8bef9SDimitry Andric 
332e8d8bef9SDimitry Andric // Defines a P vector register with 2-byte default size
333e8d8bef9SDimitry Andric #define DEFINE_PREG(reg)                                                       \
334e8d8bef9SDimitry Andric   {                                                                            \
335e8d8bef9SDimitry Andric     #reg, nullptr, 2, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,    \
336*06c3fb27SDimitry Andric         SVE_REG_KIND(reg), nullptr, nullptr, nullptr,                          \
337e8d8bef9SDimitry Andric   }
338e8d8bef9SDimitry Andric 
339e8d8bef9SDimitry Andric static lldb_private::RegisterInfo g_register_infos_arm64_sve_le[] = {
340e8d8bef9SDimitry Andric     // DEFINE_GPR64(name, GENERIC KIND)
341e8d8bef9SDimitry Andric     DEFINE_GPR64(x0, LLDB_REGNUM_GENERIC_ARG1),
342e8d8bef9SDimitry Andric     DEFINE_GPR64(x1, LLDB_REGNUM_GENERIC_ARG2),
343e8d8bef9SDimitry Andric     DEFINE_GPR64(x2, LLDB_REGNUM_GENERIC_ARG3),
344e8d8bef9SDimitry Andric     DEFINE_GPR64(x3, LLDB_REGNUM_GENERIC_ARG4),
345e8d8bef9SDimitry Andric     DEFINE_GPR64(x4, LLDB_REGNUM_GENERIC_ARG5),
346e8d8bef9SDimitry Andric     DEFINE_GPR64(x5, LLDB_REGNUM_GENERIC_ARG6),
347e8d8bef9SDimitry Andric     DEFINE_GPR64(x6, LLDB_REGNUM_GENERIC_ARG7),
348e8d8bef9SDimitry Andric     DEFINE_GPR64(x7, LLDB_REGNUM_GENERIC_ARG8),
349e8d8bef9SDimitry Andric     DEFINE_GPR64(x8, LLDB_INVALID_REGNUM),
350e8d8bef9SDimitry Andric     DEFINE_GPR64(x9, LLDB_INVALID_REGNUM),
351e8d8bef9SDimitry Andric     DEFINE_GPR64(x10, LLDB_INVALID_REGNUM),
352e8d8bef9SDimitry Andric     DEFINE_GPR64(x11, LLDB_INVALID_REGNUM),
353e8d8bef9SDimitry Andric     DEFINE_GPR64(x12, LLDB_INVALID_REGNUM),
354e8d8bef9SDimitry Andric     DEFINE_GPR64(x13, LLDB_INVALID_REGNUM),
355e8d8bef9SDimitry Andric     DEFINE_GPR64(x14, LLDB_INVALID_REGNUM),
356e8d8bef9SDimitry Andric     DEFINE_GPR64(x15, LLDB_INVALID_REGNUM),
357e8d8bef9SDimitry Andric     DEFINE_GPR64(x16, LLDB_INVALID_REGNUM),
358e8d8bef9SDimitry Andric     DEFINE_GPR64(x17, LLDB_INVALID_REGNUM),
359e8d8bef9SDimitry Andric     DEFINE_GPR64(x18, LLDB_INVALID_REGNUM),
360e8d8bef9SDimitry Andric     DEFINE_GPR64(x19, LLDB_INVALID_REGNUM),
361e8d8bef9SDimitry Andric     DEFINE_GPR64(x20, LLDB_INVALID_REGNUM),
362e8d8bef9SDimitry Andric     DEFINE_GPR64(x21, LLDB_INVALID_REGNUM),
363e8d8bef9SDimitry Andric     DEFINE_GPR64(x22, LLDB_INVALID_REGNUM),
364e8d8bef9SDimitry Andric     DEFINE_GPR64(x23, LLDB_INVALID_REGNUM),
365e8d8bef9SDimitry Andric     DEFINE_GPR64(x24, LLDB_INVALID_REGNUM),
366e8d8bef9SDimitry Andric     DEFINE_GPR64(x25, LLDB_INVALID_REGNUM),
367e8d8bef9SDimitry Andric     DEFINE_GPR64(x26, LLDB_INVALID_REGNUM),
368e8d8bef9SDimitry Andric     DEFINE_GPR64(x27, LLDB_INVALID_REGNUM),
369e8d8bef9SDimitry Andric     DEFINE_GPR64(x28, LLDB_INVALID_REGNUM),
370e8d8bef9SDimitry Andric     // DEFINE_GPR64(name, GENERIC KIND)
371e8d8bef9SDimitry Andric     DEFINE_GPR64_ALT(fp, x29, LLDB_REGNUM_GENERIC_FP),
372e8d8bef9SDimitry Andric     DEFINE_GPR64_ALT(lr, x30, LLDB_REGNUM_GENERIC_RA),
373e8d8bef9SDimitry Andric     DEFINE_GPR64_ALT(sp, x31, LLDB_REGNUM_GENERIC_SP),
374e8d8bef9SDimitry Andric     DEFINE_GPR64(pc, LLDB_REGNUM_GENERIC_PC),
375e8d8bef9SDimitry Andric 
376e8d8bef9SDimitry Andric     // DEFINE_MISC_REGS(name, size, TYPE, lldb kind)
377e8d8bef9SDimitry Andric     DEFINE_MISC_REGS(cpsr, 4, GPR, gpr_cpsr),
378e8d8bef9SDimitry Andric 
379e8d8bef9SDimitry Andric     // DEFINE_GPR32(name, parent name)
380e8d8bef9SDimitry Andric     DEFINE_GPR32(w0, x0),
381e8d8bef9SDimitry Andric     DEFINE_GPR32(w1, x1),
382e8d8bef9SDimitry Andric     DEFINE_GPR32(w2, x2),
383e8d8bef9SDimitry Andric     DEFINE_GPR32(w3, x3),
384e8d8bef9SDimitry Andric     DEFINE_GPR32(w4, x4),
385e8d8bef9SDimitry Andric     DEFINE_GPR32(w5, x5),
386e8d8bef9SDimitry Andric     DEFINE_GPR32(w6, x6),
387e8d8bef9SDimitry Andric     DEFINE_GPR32(w7, x7),
388e8d8bef9SDimitry Andric     DEFINE_GPR32(w8, x8),
389e8d8bef9SDimitry Andric     DEFINE_GPR32(w9, x9),
390e8d8bef9SDimitry Andric     DEFINE_GPR32(w10, x10),
391e8d8bef9SDimitry Andric     DEFINE_GPR32(w11, x11),
392e8d8bef9SDimitry Andric     DEFINE_GPR32(w12, x12),
393e8d8bef9SDimitry Andric     DEFINE_GPR32(w13, x13),
394e8d8bef9SDimitry Andric     DEFINE_GPR32(w14, x14),
395e8d8bef9SDimitry Andric     DEFINE_GPR32(w15, x15),
396e8d8bef9SDimitry Andric     DEFINE_GPR32(w16, x16),
397e8d8bef9SDimitry Andric     DEFINE_GPR32(w17, x17),
398e8d8bef9SDimitry Andric     DEFINE_GPR32(w18, x18),
399e8d8bef9SDimitry Andric     DEFINE_GPR32(w19, x19),
400e8d8bef9SDimitry Andric     DEFINE_GPR32(w20, x20),
401e8d8bef9SDimitry Andric     DEFINE_GPR32(w21, x21),
402e8d8bef9SDimitry Andric     DEFINE_GPR32(w22, x22),
403e8d8bef9SDimitry Andric     DEFINE_GPR32(w23, x23),
404e8d8bef9SDimitry Andric     DEFINE_GPR32(w24, x24),
405e8d8bef9SDimitry Andric     DEFINE_GPR32(w25, x25),
406e8d8bef9SDimitry Andric     DEFINE_GPR32(w26, x26),
407e8d8bef9SDimitry Andric     DEFINE_GPR32(w27, x27),
408e8d8bef9SDimitry Andric     DEFINE_GPR32(w28, x28),
409e8d8bef9SDimitry Andric 
410e8d8bef9SDimitry Andric     // DEFINE_VREG_SVE(v register, z register)
411e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v0, z0),
412e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v1, z1),
413e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v2, z2),
414e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v3, z3),
415e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v4, z4),
416e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v5, z5),
417e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v6, z6),
418e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v7, z7),
419e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v8, z8),
420e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v9, z9),
421e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v10, z10),
422e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v11, z11),
423e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v12, z12),
424e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v13, z13),
425e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v14, z14),
426e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v15, z15),
427e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v16, z16),
428e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v17, z17),
429e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v18, z18),
430e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v19, z19),
431e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v20, z20),
432e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v21, z21),
433e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v22, z22),
434e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v23, z23),
435e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v24, z24),
436e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v25, z25),
437e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v26, z26),
438e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v27, z27),
439e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v28, z28),
440e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v29, z29),
441e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v30, z30),
442e8d8bef9SDimitry Andric     DEFINE_VREG_SVE(v31, z31),
443e8d8bef9SDimitry Andric 
444e8d8bef9SDimitry Andric     // DEFINE_FPU_PSEUDO(name, size, ENDIAN OFFSET, parent register)
445e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s0, 4, z0),
446e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s1, 4, z1),
447e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s2, 4, z2),
448e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s3, 4, z3),
449e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s4, 4, z4),
450e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s5, 4, z5),
451e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s6, 4, z6),
452e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s7, 4, z7),
453e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s8, 4, z8),
454e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s9, 4, z9),
455e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s10, 4, z10),
456e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s11, 4, z11),
457e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s12, 4, z12),
458e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s13, 4, z13),
459e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s14, 4, z14),
460e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s15, 4, z15),
461e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s16, 4, z16),
462e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s17, 4, z17),
463e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s18, 4, z18),
464e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s19, 4, z19),
465e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s20, 4, z20),
466e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s21, 4, z21),
467e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s22, 4, z22),
468e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s23, 4, z23),
469e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s24, 4, z24),
470e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s25, 4, z25),
471e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s26, 4, z26),
472e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s27, 4, z27),
473e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s28, 4, z28),
474e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s29, 4, z29),
475e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s30, 4, z30),
476e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(s31, 4, z31),
477e8d8bef9SDimitry Andric 
478e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d0, 8, z0),
479e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d1, 8, z1),
480e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d2, 8, z2),
481e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d3, 8, z3),
482e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d4, 8, z4),
483e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d5, 8, z5),
484e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d6, 8, z6),
485e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d7, 8, z7),
486e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d8, 8, z8),
487e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d9, 8, z9),
488e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d10, 8, z10),
489e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d11, 8, z11),
490e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d12, 8, z12),
491e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d13, 8, z13),
492e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d14, 8, z14),
493e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d15, 8, z15),
494e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d16, 8, z16),
495e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d17, 8, z17),
496e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d18, 8, z18),
497e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d19, 8, z19),
498e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d20, 8, z20),
499e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d21, 8, z21),
500e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d22, 8, z22),
501e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d23, 8, z23),
502e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d24, 8, z24),
503e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d25, 8, z25),
504e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d26, 8, z26),
505e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d27, 8, z27),
506e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d28, 8, z28),
507e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d29, 8, z29),
508e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d30, 8, z30),
509e8d8bef9SDimitry Andric     DEFINE_FPU_PSEUDO_SVE(d31, 8, z31),
510e8d8bef9SDimitry Andric 
511e8d8bef9SDimitry Andric     // DEFINE_MISC_REGS(name, size, TYPE, lldb kind)
512e8d8bef9SDimitry Andric     DEFINE_MISC_REGS(fpsr, 4, FPU, fpu_fpsr),
513e8d8bef9SDimitry Andric     DEFINE_MISC_REGS(fpcr, 4, FPU, fpu_fpcr),
514e8d8bef9SDimitry Andric 
515e8d8bef9SDimitry Andric     DEFINE_MISC_REGS(vg, 8, VG, sve_vg),
516e8d8bef9SDimitry Andric     // DEFINE_ZREG(name)
517e8d8bef9SDimitry Andric     DEFINE_ZREG(z0),
518e8d8bef9SDimitry Andric     DEFINE_ZREG(z1),
519e8d8bef9SDimitry Andric     DEFINE_ZREG(z2),
520e8d8bef9SDimitry Andric     DEFINE_ZREG(z3),
521e8d8bef9SDimitry Andric     DEFINE_ZREG(z4),
522e8d8bef9SDimitry Andric     DEFINE_ZREG(z5),
523e8d8bef9SDimitry Andric     DEFINE_ZREG(z6),
524e8d8bef9SDimitry Andric     DEFINE_ZREG(z7),
525e8d8bef9SDimitry Andric     DEFINE_ZREG(z8),
526e8d8bef9SDimitry Andric     DEFINE_ZREG(z9),
527e8d8bef9SDimitry Andric     DEFINE_ZREG(z10),
528e8d8bef9SDimitry Andric     DEFINE_ZREG(z11),
529e8d8bef9SDimitry Andric     DEFINE_ZREG(z12),
530e8d8bef9SDimitry Andric     DEFINE_ZREG(z13),
531e8d8bef9SDimitry Andric     DEFINE_ZREG(z14),
532e8d8bef9SDimitry Andric     DEFINE_ZREG(z15),
533e8d8bef9SDimitry Andric     DEFINE_ZREG(z16),
534e8d8bef9SDimitry Andric     DEFINE_ZREG(z17),
535e8d8bef9SDimitry Andric     DEFINE_ZREG(z18),
536e8d8bef9SDimitry Andric     DEFINE_ZREG(z19),
537e8d8bef9SDimitry Andric     DEFINE_ZREG(z20),
538e8d8bef9SDimitry Andric     DEFINE_ZREG(z21),
539e8d8bef9SDimitry Andric     DEFINE_ZREG(z22),
540e8d8bef9SDimitry Andric     DEFINE_ZREG(z23),
541e8d8bef9SDimitry Andric     DEFINE_ZREG(z24),
542e8d8bef9SDimitry Andric     DEFINE_ZREG(z25),
543e8d8bef9SDimitry Andric     DEFINE_ZREG(z26),
544e8d8bef9SDimitry Andric     DEFINE_ZREG(z27),
545e8d8bef9SDimitry Andric     DEFINE_ZREG(z28),
546e8d8bef9SDimitry Andric     DEFINE_ZREG(z29),
547e8d8bef9SDimitry Andric     DEFINE_ZREG(z30),
548e8d8bef9SDimitry Andric     DEFINE_ZREG(z31),
549e8d8bef9SDimitry Andric 
550e8d8bef9SDimitry Andric     // DEFINE_PREG(name)
551e8d8bef9SDimitry Andric     DEFINE_PREG(p0),
552e8d8bef9SDimitry Andric     DEFINE_PREG(p1),
553e8d8bef9SDimitry Andric     DEFINE_PREG(p2),
554e8d8bef9SDimitry Andric     DEFINE_PREG(p3),
555e8d8bef9SDimitry Andric     DEFINE_PREG(p4),
556e8d8bef9SDimitry Andric     DEFINE_PREG(p5),
557e8d8bef9SDimitry Andric     DEFINE_PREG(p6),
558e8d8bef9SDimitry Andric     DEFINE_PREG(p7),
559e8d8bef9SDimitry Andric     DEFINE_PREG(p8),
560e8d8bef9SDimitry Andric     DEFINE_PREG(p9),
561e8d8bef9SDimitry Andric     DEFINE_PREG(p10),
562e8d8bef9SDimitry Andric     DEFINE_PREG(p11),
563e8d8bef9SDimitry Andric     DEFINE_PREG(p12),
564e8d8bef9SDimitry Andric     DEFINE_PREG(p13),
565e8d8bef9SDimitry Andric     DEFINE_PREG(p14),
566e8d8bef9SDimitry Andric     DEFINE_PREG(p15),
567e8d8bef9SDimitry Andric 
568e8d8bef9SDimitry Andric     // DEFINE FFR
569e8d8bef9SDimitry Andric     DEFINE_PREG(ffr)
570e8d8bef9SDimitry Andric     // clang-format on
571e8d8bef9SDimitry Andric };
572e8d8bef9SDimitry Andric 
573e8d8bef9SDimitry Andric #endif // DECLARE_REGISTER_INFOS_ARM64_SVE_STRUCT
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