15ffd83dbSDimitry Andric //===-- EmulateInstruction.cpp --------------------------------------------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric
90b57cec5SDimitry Andric #include "lldb/Core/EmulateInstruction.h"
100b57cec5SDimitry Andric
110b57cec5SDimitry Andric #include "lldb/Core/Address.h"
120b57cec5SDimitry Andric #include "lldb/Core/DumpRegisterValue.h"
130b57cec5SDimitry Andric #include "lldb/Core/PluginManager.h"
14*5f757f3fSDimitry Andric #include "lldb/Host/StreamFile.h"
150b57cec5SDimitry Andric #include "lldb/Symbol/UnwindPlan.h"
160b57cec5SDimitry Andric #include "lldb/Target/Process.h"
170b57cec5SDimitry Andric #include "lldb/Target/RegisterContext.h"
180b57cec5SDimitry Andric #include "lldb/Target/StackFrame.h"
190b57cec5SDimitry Andric #include "lldb/Utility/ConstString.h"
200b57cec5SDimitry Andric #include "lldb/Utility/DataExtractor.h"
210b57cec5SDimitry Andric #include "lldb/Utility/RegisterValue.h"
220b57cec5SDimitry Andric #include "lldb/Utility/Status.h"
230b57cec5SDimitry Andric #include "lldb/Utility/Stream.h"
240b57cec5SDimitry Andric #include "lldb/Utility/StreamString.h"
250b57cec5SDimitry Andric #include "lldb/lldb-forward.h"
260b57cec5SDimitry Andric #include "lldb/lldb-private-interfaces.h"
270b57cec5SDimitry Andric
280b57cec5SDimitry Andric #include "llvm/ADT/StringRef.h"
290b57cec5SDimitry Andric
300b57cec5SDimitry Andric #include <cstring>
310b57cec5SDimitry Andric #include <memory>
32bdd1243dSDimitry Andric #include <optional>
330b57cec5SDimitry Andric
34fe6060f1SDimitry Andric #include <cinttypes>
35fe6060f1SDimitry Andric #include <cstdio>
360b57cec5SDimitry Andric
370b57cec5SDimitry Andric namespace lldb_private {
380b57cec5SDimitry Andric class Target;
390b57cec5SDimitry Andric }
400b57cec5SDimitry Andric
410b57cec5SDimitry Andric using namespace lldb;
420b57cec5SDimitry Andric using namespace lldb_private;
430b57cec5SDimitry Andric
440b57cec5SDimitry Andric EmulateInstruction *
FindPlugin(const ArchSpec & arch,InstructionType supported_inst_type,const char * plugin_name)450b57cec5SDimitry Andric EmulateInstruction::FindPlugin(const ArchSpec &arch,
460b57cec5SDimitry Andric InstructionType supported_inst_type,
470b57cec5SDimitry Andric const char *plugin_name) {
480b57cec5SDimitry Andric EmulateInstructionCreateInstance create_callback = nullptr;
490b57cec5SDimitry Andric if (plugin_name) {
500b57cec5SDimitry Andric create_callback =
510b57cec5SDimitry Andric PluginManager::GetEmulateInstructionCreateCallbackForPluginName(
52349cc55cSDimitry Andric plugin_name);
530b57cec5SDimitry Andric if (create_callback) {
540b57cec5SDimitry Andric EmulateInstruction *emulate_insn_ptr =
550b57cec5SDimitry Andric create_callback(arch, supported_inst_type);
560b57cec5SDimitry Andric if (emulate_insn_ptr)
570b57cec5SDimitry Andric return emulate_insn_ptr;
580b57cec5SDimitry Andric }
590b57cec5SDimitry Andric } else {
600b57cec5SDimitry Andric for (uint32_t idx = 0;
610b57cec5SDimitry Andric (create_callback =
620b57cec5SDimitry Andric PluginManager::GetEmulateInstructionCreateCallbackAtIndex(idx)) !=
630b57cec5SDimitry Andric nullptr;
640b57cec5SDimitry Andric ++idx) {
650b57cec5SDimitry Andric EmulateInstruction *emulate_insn_ptr =
660b57cec5SDimitry Andric create_callback(arch, supported_inst_type);
670b57cec5SDimitry Andric if (emulate_insn_ptr)
680b57cec5SDimitry Andric return emulate_insn_ptr;
690b57cec5SDimitry Andric }
700b57cec5SDimitry Andric }
710b57cec5SDimitry Andric return nullptr;
720b57cec5SDimitry Andric }
730b57cec5SDimitry Andric
EmulateInstruction(const ArchSpec & arch)740b57cec5SDimitry Andric EmulateInstruction::EmulateInstruction(const ArchSpec &arch) : m_arch(arch) {}
750b57cec5SDimitry Andric
76bdd1243dSDimitry Andric std::optional<RegisterValue>
ReadRegister(const RegisterInfo & reg_info)77bdd1243dSDimitry Andric EmulateInstruction::ReadRegister(const RegisterInfo ®_info) {
78bdd1243dSDimitry Andric if (m_read_reg_callback == nullptr)
79bdd1243dSDimitry Andric return {};
80bdd1243dSDimitry Andric
81bdd1243dSDimitry Andric RegisterValue reg_value;
82bdd1243dSDimitry Andric bool success = m_read_reg_callback(this, m_baton, ®_info, reg_value);
83bdd1243dSDimitry Andric if (success)
84bdd1243dSDimitry Andric return reg_value;
85bdd1243dSDimitry Andric return {};
860b57cec5SDimitry Andric }
870b57cec5SDimitry Andric
ReadRegister(lldb::RegisterKind reg_kind,uint32_t reg_num,RegisterValue & reg_value)880b57cec5SDimitry Andric bool EmulateInstruction::ReadRegister(lldb::RegisterKind reg_kind,
890b57cec5SDimitry Andric uint32_t reg_num,
900b57cec5SDimitry Andric RegisterValue ®_value) {
91bdd1243dSDimitry Andric std::optional<RegisterInfo> reg_info = GetRegisterInfo(reg_kind, reg_num);
92bdd1243dSDimitry Andric if (!reg_info)
930b57cec5SDimitry Andric return false;
94bdd1243dSDimitry Andric
95bdd1243dSDimitry Andric std::optional<RegisterValue> value = ReadRegister(*reg_info);
96bdd1243dSDimitry Andric if (value)
97bdd1243dSDimitry Andric reg_value = *value;
98bdd1243dSDimitry Andric return value.has_value();
990b57cec5SDimitry Andric }
1000b57cec5SDimitry Andric
ReadRegisterUnsigned(lldb::RegisterKind reg_kind,uint32_t reg_num,uint64_t fail_value,bool * success_ptr)1010b57cec5SDimitry Andric uint64_t EmulateInstruction::ReadRegisterUnsigned(lldb::RegisterKind reg_kind,
1020b57cec5SDimitry Andric uint32_t reg_num,
1030b57cec5SDimitry Andric uint64_t fail_value,
1040b57cec5SDimitry Andric bool *success_ptr) {
1050b57cec5SDimitry Andric RegisterValue reg_value;
1060b57cec5SDimitry Andric if (ReadRegister(reg_kind, reg_num, reg_value))
1070b57cec5SDimitry Andric return reg_value.GetAsUInt64(fail_value, success_ptr);
1080b57cec5SDimitry Andric if (success_ptr)
1090b57cec5SDimitry Andric *success_ptr = false;
1100b57cec5SDimitry Andric return fail_value;
1110b57cec5SDimitry Andric }
1120b57cec5SDimitry Andric
ReadRegisterUnsigned(const RegisterInfo & reg_info,uint64_t fail_value,bool * success_ptr)113bdd1243dSDimitry Andric uint64_t EmulateInstruction::ReadRegisterUnsigned(const RegisterInfo ®_info,
1140b57cec5SDimitry Andric uint64_t fail_value,
1150b57cec5SDimitry Andric bool *success_ptr) {
116bdd1243dSDimitry Andric std::optional<RegisterValue> reg_value = ReadRegister(reg_info);
117bdd1243dSDimitry Andric if (!reg_value) {
1180b57cec5SDimitry Andric if (success_ptr)
1190b57cec5SDimitry Andric *success_ptr = false;
1200b57cec5SDimitry Andric return fail_value;
1210b57cec5SDimitry Andric }
1220b57cec5SDimitry Andric
123bdd1243dSDimitry Andric return reg_value->GetAsUInt64(fail_value, success_ptr);
124bdd1243dSDimitry Andric }
125bdd1243dSDimitry Andric
WriteRegister(const Context & context,const RegisterInfo & reg_info,const RegisterValue & reg_value)1260b57cec5SDimitry Andric bool EmulateInstruction::WriteRegister(const Context &context,
127bdd1243dSDimitry Andric const RegisterInfo ®_info,
1280b57cec5SDimitry Andric const RegisterValue ®_value) {
1290b57cec5SDimitry Andric if (m_write_reg_callback != nullptr)
130bdd1243dSDimitry Andric return m_write_reg_callback(this, m_baton, context, ®_info, reg_value);
1310b57cec5SDimitry Andric return false;
1320b57cec5SDimitry Andric }
1330b57cec5SDimitry Andric
WriteRegister(const Context & context,lldb::RegisterKind reg_kind,uint32_t reg_num,const RegisterValue & reg_value)1340b57cec5SDimitry Andric bool EmulateInstruction::WriteRegister(const Context &context,
1350b57cec5SDimitry Andric lldb::RegisterKind reg_kind,
1360b57cec5SDimitry Andric uint32_t reg_num,
1370b57cec5SDimitry Andric const RegisterValue ®_value) {
138bdd1243dSDimitry Andric std::optional<RegisterInfo> reg_info = GetRegisterInfo(reg_kind, reg_num);
139bdd1243dSDimitry Andric if (reg_info)
140bdd1243dSDimitry Andric return WriteRegister(context, *reg_info, reg_value);
1410b57cec5SDimitry Andric return false;
1420b57cec5SDimitry Andric }
1430b57cec5SDimitry Andric
WriteRegisterUnsigned(const Context & context,lldb::RegisterKind reg_kind,uint32_t reg_num,uint64_t uint_value)1440b57cec5SDimitry Andric bool EmulateInstruction::WriteRegisterUnsigned(const Context &context,
1450b57cec5SDimitry Andric lldb::RegisterKind reg_kind,
1460b57cec5SDimitry Andric uint32_t reg_num,
1470b57cec5SDimitry Andric uint64_t uint_value) {
148bdd1243dSDimitry Andric std::optional<RegisterInfo> reg_info = GetRegisterInfo(reg_kind, reg_num);
149bdd1243dSDimitry Andric if (reg_info) {
1500b57cec5SDimitry Andric RegisterValue reg_value;
151bdd1243dSDimitry Andric if (reg_value.SetUInt(uint_value, reg_info->byte_size))
152bdd1243dSDimitry Andric return WriteRegister(context, *reg_info, reg_value);
1530b57cec5SDimitry Andric }
1540b57cec5SDimitry Andric return false;
1550b57cec5SDimitry Andric }
1560b57cec5SDimitry Andric
WriteRegisterUnsigned(const Context & context,const RegisterInfo & reg_info,uint64_t uint_value)1570b57cec5SDimitry Andric bool EmulateInstruction::WriteRegisterUnsigned(const Context &context,
158bdd1243dSDimitry Andric const RegisterInfo ®_info,
1590b57cec5SDimitry Andric uint64_t uint_value) {
1600b57cec5SDimitry Andric RegisterValue reg_value;
161bdd1243dSDimitry Andric if (reg_value.SetUInt(uint_value, reg_info.byte_size))
1620b57cec5SDimitry Andric return WriteRegister(context, reg_info, reg_value);
1630b57cec5SDimitry Andric return false;
1640b57cec5SDimitry Andric }
1650b57cec5SDimitry Andric
ReadMemory(const Context & context,lldb::addr_t addr,void * dst,size_t dst_len)1660b57cec5SDimitry Andric size_t EmulateInstruction::ReadMemory(const Context &context, lldb::addr_t addr,
1670b57cec5SDimitry Andric void *dst, size_t dst_len) {
1680b57cec5SDimitry Andric if (m_read_mem_callback != nullptr)
1690b57cec5SDimitry Andric return m_read_mem_callback(this, m_baton, context, addr, dst, dst_len) ==
1700b57cec5SDimitry Andric dst_len;
1710b57cec5SDimitry Andric return false;
1720b57cec5SDimitry Andric }
1730b57cec5SDimitry Andric
ReadMemoryUnsigned(const Context & context,lldb::addr_t addr,size_t byte_size,uint64_t fail_value,bool * success_ptr)1740b57cec5SDimitry Andric uint64_t EmulateInstruction::ReadMemoryUnsigned(const Context &context,
1750b57cec5SDimitry Andric lldb::addr_t addr,
1760b57cec5SDimitry Andric size_t byte_size,
1770b57cec5SDimitry Andric uint64_t fail_value,
1780b57cec5SDimitry Andric bool *success_ptr) {
1790b57cec5SDimitry Andric uint64_t uval64 = 0;
1800b57cec5SDimitry Andric bool success = false;
1810b57cec5SDimitry Andric if (byte_size <= 8) {
1820b57cec5SDimitry Andric uint8_t buf[sizeof(uint64_t)];
1830b57cec5SDimitry Andric size_t bytes_read =
1840b57cec5SDimitry Andric m_read_mem_callback(this, m_baton, context, addr, buf, byte_size);
1850b57cec5SDimitry Andric if (bytes_read == byte_size) {
1860b57cec5SDimitry Andric lldb::offset_t offset = 0;
1870b57cec5SDimitry Andric DataExtractor data(buf, byte_size, GetByteOrder(), GetAddressByteSize());
1880b57cec5SDimitry Andric uval64 = data.GetMaxU64(&offset, byte_size);
1890b57cec5SDimitry Andric success = true;
1900b57cec5SDimitry Andric }
1910b57cec5SDimitry Andric }
1920b57cec5SDimitry Andric
1930b57cec5SDimitry Andric if (success_ptr)
1940b57cec5SDimitry Andric *success_ptr = success;
1950b57cec5SDimitry Andric
1960b57cec5SDimitry Andric if (!success)
1970b57cec5SDimitry Andric uval64 = fail_value;
1980b57cec5SDimitry Andric return uval64;
1990b57cec5SDimitry Andric }
2000b57cec5SDimitry Andric
WriteMemoryUnsigned(const Context & context,lldb::addr_t addr,uint64_t uval,size_t uval_byte_size)2010b57cec5SDimitry Andric bool EmulateInstruction::WriteMemoryUnsigned(const Context &context,
2020b57cec5SDimitry Andric lldb::addr_t addr, uint64_t uval,
2030b57cec5SDimitry Andric size_t uval_byte_size) {
2040b57cec5SDimitry Andric StreamString strm(Stream::eBinary, GetAddressByteSize(), GetByteOrder());
2050b57cec5SDimitry Andric strm.PutMaxHex64(uval, uval_byte_size);
2060b57cec5SDimitry Andric
2070b57cec5SDimitry Andric size_t bytes_written = m_write_mem_callback(
2080b57cec5SDimitry Andric this, m_baton, context, addr, strm.GetString().data(), uval_byte_size);
2090b57cec5SDimitry Andric return (bytes_written == uval_byte_size);
2100b57cec5SDimitry Andric }
2110b57cec5SDimitry Andric
WriteMemory(const Context & context,lldb::addr_t addr,const void * src,size_t src_len)2120b57cec5SDimitry Andric bool EmulateInstruction::WriteMemory(const Context &context, lldb::addr_t addr,
2130b57cec5SDimitry Andric const void *src, size_t src_len) {
2140b57cec5SDimitry Andric if (m_write_mem_callback != nullptr)
2150b57cec5SDimitry Andric return m_write_mem_callback(this, m_baton, context, addr, src, src_len) ==
2160b57cec5SDimitry Andric src_len;
2170b57cec5SDimitry Andric return false;
2180b57cec5SDimitry Andric }
2190b57cec5SDimitry Andric
SetBaton(void * baton)2200b57cec5SDimitry Andric void EmulateInstruction::SetBaton(void *baton) { m_baton = baton; }
2210b57cec5SDimitry Andric
SetCallbacks(ReadMemoryCallback read_mem_callback,WriteMemoryCallback write_mem_callback,ReadRegisterCallback read_reg_callback,WriteRegisterCallback write_reg_callback)2220b57cec5SDimitry Andric void EmulateInstruction::SetCallbacks(
2230b57cec5SDimitry Andric ReadMemoryCallback read_mem_callback,
2240b57cec5SDimitry Andric WriteMemoryCallback write_mem_callback,
2250b57cec5SDimitry Andric ReadRegisterCallback read_reg_callback,
2260b57cec5SDimitry Andric WriteRegisterCallback write_reg_callback) {
2270b57cec5SDimitry Andric m_read_mem_callback = read_mem_callback;
2280b57cec5SDimitry Andric m_write_mem_callback = write_mem_callback;
2290b57cec5SDimitry Andric m_read_reg_callback = read_reg_callback;
2300b57cec5SDimitry Andric m_write_reg_callback = write_reg_callback;
2310b57cec5SDimitry Andric }
2320b57cec5SDimitry Andric
SetReadMemCallback(ReadMemoryCallback read_mem_callback)2330b57cec5SDimitry Andric void EmulateInstruction::SetReadMemCallback(
2340b57cec5SDimitry Andric ReadMemoryCallback read_mem_callback) {
2350b57cec5SDimitry Andric m_read_mem_callback = read_mem_callback;
2360b57cec5SDimitry Andric }
2370b57cec5SDimitry Andric
SetWriteMemCallback(WriteMemoryCallback write_mem_callback)2380b57cec5SDimitry Andric void EmulateInstruction::SetWriteMemCallback(
2390b57cec5SDimitry Andric WriteMemoryCallback write_mem_callback) {
2400b57cec5SDimitry Andric m_write_mem_callback = write_mem_callback;
2410b57cec5SDimitry Andric }
2420b57cec5SDimitry Andric
SetReadRegCallback(ReadRegisterCallback read_reg_callback)2430b57cec5SDimitry Andric void EmulateInstruction::SetReadRegCallback(
2440b57cec5SDimitry Andric ReadRegisterCallback read_reg_callback) {
2450b57cec5SDimitry Andric m_read_reg_callback = read_reg_callback;
2460b57cec5SDimitry Andric }
2470b57cec5SDimitry Andric
SetWriteRegCallback(WriteRegisterCallback write_reg_callback)2480b57cec5SDimitry Andric void EmulateInstruction::SetWriteRegCallback(
2490b57cec5SDimitry Andric WriteRegisterCallback write_reg_callback) {
2500b57cec5SDimitry Andric m_write_reg_callback = write_reg_callback;
2510b57cec5SDimitry Andric }
2520b57cec5SDimitry Andric
2530b57cec5SDimitry Andric //
2540b57cec5SDimitry Andric // Read & Write Memory and Registers callback functions.
2550b57cec5SDimitry Andric //
2560b57cec5SDimitry Andric
ReadMemoryFrame(EmulateInstruction * instruction,void * baton,const Context & context,lldb::addr_t addr,void * dst,size_t dst_len)2570b57cec5SDimitry Andric size_t EmulateInstruction::ReadMemoryFrame(EmulateInstruction *instruction,
2580b57cec5SDimitry Andric void *baton, const Context &context,
2590b57cec5SDimitry Andric lldb::addr_t addr, void *dst,
2600b57cec5SDimitry Andric size_t dst_len) {
2610b57cec5SDimitry Andric if (baton == nullptr || dst == nullptr || dst_len == 0)
2620b57cec5SDimitry Andric return 0;
2630b57cec5SDimitry Andric
2640b57cec5SDimitry Andric StackFrame *frame = (StackFrame *)baton;
2650b57cec5SDimitry Andric
2660b57cec5SDimitry Andric ProcessSP process_sp(frame->CalculateProcess());
2670b57cec5SDimitry Andric if (process_sp) {
2680b57cec5SDimitry Andric Status error;
2690b57cec5SDimitry Andric return process_sp->ReadMemory(addr, dst, dst_len, error);
2700b57cec5SDimitry Andric }
2710b57cec5SDimitry Andric return 0;
2720b57cec5SDimitry Andric }
2730b57cec5SDimitry Andric
WriteMemoryFrame(EmulateInstruction * instruction,void * baton,const Context & context,lldb::addr_t addr,const void * src,size_t src_len)2740b57cec5SDimitry Andric size_t EmulateInstruction::WriteMemoryFrame(EmulateInstruction *instruction,
2750b57cec5SDimitry Andric void *baton, const Context &context,
2760b57cec5SDimitry Andric lldb::addr_t addr, const void *src,
2770b57cec5SDimitry Andric size_t src_len) {
2780b57cec5SDimitry Andric if (baton == nullptr || src == nullptr || src_len == 0)
2790b57cec5SDimitry Andric return 0;
2800b57cec5SDimitry Andric
2810b57cec5SDimitry Andric StackFrame *frame = (StackFrame *)baton;
2820b57cec5SDimitry Andric
2830b57cec5SDimitry Andric ProcessSP process_sp(frame->CalculateProcess());
2840b57cec5SDimitry Andric if (process_sp) {
2850b57cec5SDimitry Andric Status error;
2860b57cec5SDimitry Andric return process_sp->WriteMemory(addr, src, src_len, error);
2870b57cec5SDimitry Andric }
2880b57cec5SDimitry Andric
2890b57cec5SDimitry Andric return 0;
2900b57cec5SDimitry Andric }
2910b57cec5SDimitry Andric
ReadRegisterFrame(EmulateInstruction * instruction,void * baton,const RegisterInfo * reg_info,RegisterValue & reg_value)2920b57cec5SDimitry Andric bool EmulateInstruction::ReadRegisterFrame(EmulateInstruction *instruction,
2930b57cec5SDimitry Andric void *baton,
2940b57cec5SDimitry Andric const RegisterInfo *reg_info,
2950b57cec5SDimitry Andric RegisterValue ®_value) {
2960b57cec5SDimitry Andric if (baton == nullptr)
2970b57cec5SDimitry Andric return false;
2980b57cec5SDimitry Andric
2990b57cec5SDimitry Andric StackFrame *frame = (StackFrame *)baton;
3000b57cec5SDimitry Andric return frame->GetRegisterContext()->ReadRegister(reg_info, reg_value);
3010b57cec5SDimitry Andric }
3020b57cec5SDimitry Andric
WriteRegisterFrame(EmulateInstruction * instruction,void * baton,const Context & context,const RegisterInfo * reg_info,const RegisterValue & reg_value)3030b57cec5SDimitry Andric bool EmulateInstruction::WriteRegisterFrame(EmulateInstruction *instruction,
3040b57cec5SDimitry Andric void *baton, const Context &context,
3050b57cec5SDimitry Andric const RegisterInfo *reg_info,
3060b57cec5SDimitry Andric const RegisterValue ®_value) {
3070b57cec5SDimitry Andric if (baton == nullptr)
3080b57cec5SDimitry Andric return false;
3090b57cec5SDimitry Andric
3100b57cec5SDimitry Andric StackFrame *frame = (StackFrame *)baton;
3110b57cec5SDimitry Andric return frame->GetRegisterContext()->WriteRegister(reg_info, reg_value);
3120b57cec5SDimitry Andric }
3130b57cec5SDimitry Andric
ReadMemoryDefault(EmulateInstruction * instruction,void * baton,const Context & context,lldb::addr_t addr,void * dst,size_t length)3140b57cec5SDimitry Andric size_t EmulateInstruction::ReadMemoryDefault(EmulateInstruction *instruction,
3150b57cec5SDimitry Andric void *baton,
3160b57cec5SDimitry Andric const Context &context,
3170b57cec5SDimitry Andric lldb::addr_t addr, void *dst,
3180b57cec5SDimitry Andric size_t length) {
3190b57cec5SDimitry Andric StreamFile strm(stdout, false);
3200b57cec5SDimitry Andric strm.Printf(" Read from Memory (address = 0x%" PRIx64 ", length = %" PRIu64
3210b57cec5SDimitry Andric ", context = ",
3220b57cec5SDimitry Andric addr, (uint64_t)length);
3230b57cec5SDimitry Andric context.Dump(strm, instruction);
3240b57cec5SDimitry Andric strm.EOL();
3250b57cec5SDimitry Andric *((uint64_t *)dst) = 0xdeadbeef;
3260b57cec5SDimitry Andric return length;
3270b57cec5SDimitry Andric }
3280b57cec5SDimitry Andric
WriteMemoryDefault(EmulateInstruction * instruction,void * baton,const Context & context,lldb::addr_t addr,const void * dst,size_t length)3290b57cec5SDimitry Andric size_t EmulateInstruction::WriteMemoryDefault(EmulateInstruction *instruction,
3300b57cec5SDimitry Andric void *baton,
3310b57cec5SDimitry Andric const Context &context,
3320b57cec5SDimitry Andric lldb::addr_t addr,
3330b57cec5SDimitry Andric const void *dst, size_t length) {
3340b57cec5SDimitry Andric StreamFile strm(stdout, false);
3350b57cec5SDimitry Andric strm.Printf(" Write to Memory (address = 0x%" PRIx64 ", length = %" PRIu64
3360b57cec5SDimitry Andric ", context = ",
3370b57cec5SDimitry Andric addr, (uint64_t)length);
3380b57cec5SDimitry Andric context.Dump(strm, instruction);
3390b57cec5SDimitry Andric strm.EOL();
3400b57cec5SDimitry Andric return length;
3410b57cec5SDimitry Andric }
3420b57cec5SDimitry Andric
ReadRegisterDefault(EmulateInstruction * instruction,void * baton,const RegisterInfo * reg_info,RegisterValue & reg_value)3430b57cec5SDimitry Andric bool EmulateInstruction::ReadRegisterDefault(EmulateInstruction *instruction,
3440b57cec5SDimitry Andric void *baton,
3450b57cec5SDimitry Andric const RegisterInfo *reg_info,
3460b57cec5SDimitry Andric RegisterValue ®_value) {
3470b57cec5SDimitry Andric StreamFile strm(stdout, false);
3480b57cec5SDimitry Andric strm.Printf(" Read Register (%s)\n", reg_info->name);
3490b57cec5SDimitry Andric lldb::RegisterKind reg_kind;
3500b57cec5SDimitry Andric uint32_t reg_num;
3510b57cec5SDimitry Andric if (GetBestRegisterKindAndNumber(reg_info, reg_kind, reg_num))
3520b57cec5SDimitry Andric reg_value.SetUInt64((uint64_t)reg_kind << 24 | reg_num);
3530b57cec5SDimitry Andric else
3540b57cec5SDimitry Andric reg_value.SetUInt64(0);
3550b57cec5SDimitry Andric
3560b57cec5SDimitry Andric return true;
3570b57cec5SDimitry Andric }
3580b57cec5SDimitry Andric
WriteRegisterDefault(EmulateInstruction * instruction,void * baton,const Context & context,const RegisterInfo * reg_info,const RegisterValue & reg_value)3590b57cec5SDimitry Andric bool EmulateInstruction::WriteRegisterDefault(EmulateInstruction *instruction,
3600b57cec5SDimitry Andric void *baton,
3610b57cec5SDimitry Andric const Context &context,
3620b57cec5SDimitry Andric const RegisterInfo *reg_info,
3630b57cec5SDimitry Andric const RegisterValue ®_value) {
3640b57cec5SDimitry Andric StreamFile strm(stdout, false);
3650b57cec5SDimitry Andric strm.Printf(" Write to Register (name = %s, value = ", reg_info->name);
36606c3fb27SDimitry Andric DumpRegisterValue(reg_value, strm, *reg_info, false, false, eFormatDefault);
3670b57cec5SDimitry Andric strm.PutCString(", context = ");
3680b57cec5SDimitry Andric context.Dump(strm, instruction);
3690b57cec5SDimitry Andric strm.EOL();
3700b57cec5SDimitry Andric return true;
3710b57cec5SDimitry Andric }
3720b57cec5SDimitry Andric
Dump(Stream & strm,EmulateInstruction * instruction) const3730b57cec5SDimitry Andric void EmulateInstruction::Context::Dump(Stream &strm,
3740b57cec5SDimitry Andric EmulateInstruction *instruction) const {
3750b57cec5SDimitry Andric switch (type) {
3760b57cec5SDimitry Andric case eContextReadOpcode:
3770b57cec5SDimitry Andric strm.PutCString("reading opcode");
3780b57cec5SDimitry Andric break;
3790b57cec5SDimitry Andric
3800b57cec5SDimitry Andric case eContextImmediate:
3810b57cec5SDimitry Andric strm.PutCString("immediate");
3820b57cec5SDimitry Andric break;
3830b57cec5SDimitry Andric
3840b57cec5SDimitry Andric case eContextPushRegisterOnStack:
3850b57cec5SDimitry Andric strm.PutCString("push register");
3860b57cec5SDimitry Andric break;
3870b57cec5SDimitry Andric
3880b57cec5SDimitry Andric case eContextPopRegisterOffStack:
3890b57cec5SDimitry Andric strm.PutCString("pop register");
3900b57cec5SDimitry Andric break;
3910b57cec5SDimitry Andric
3920b57cec5SDimitry Andric case eContextAdjustStackPointer:
3930b57cec5SDimitry Andric strm.PutCString("adjust sp");
3940b57cec5SDimitry Andric break;
3950b57cec5SDimitry Andric
3960b57cec5SDimitry Andric case eContextSetFramePointer:
3970b57cec5SDimitry Andric strm.PutCString("set frame pointer");
3980b57cec5SDimitry Andric break;
3990b57cec5SDimitry Andric
4000b57cec5SDimitry Andric case eContextAdjustBaseRegister:
4010b57cec5SDimitry Andric strm.PutCString("adjusting (writing value back to) a base register");
4020b57cec5SDimitry Andric break;
4030b57cec5SDimitry Andric
4040b57cec5SDimitry Andric case eContextRegisterPlusOffset:
4050b57cec5SDimitry Andric strm.PutCString("register + offset");
4060b57cec5SDimitry Andric break;
4070b57cec5SDimitry Andric
4080b57cec5SDimitry Andric case eContextRegisterStore:
4090b57cec5SDimitry Andric strm.PutCString("store register");
4100b57cec5SDimitry Andric break;
4110b57cec5SDimitry Andric
4120b57cec5SDimitry Andric case eContextRegisterLoad:
4130b57cec5SDimitry Andric strm.PutCString("load register");
4140b57cec5SDimitry Andric break;
4150b57cec5SDimitry Andric
4160b57cec5SDimitry Andric case eContextRelativeBranchImmediate:
4170b57cec5SDimitry Andric strm.PutCString("relative branch immediate");
4180b57cec5SDimitry Andric break;
4190b57cec5SDimitry Andric
4200b57cec5SDimitry Andric case eContextAbsoluteBranchRegister:
4210b57cec5SDimitry Andric strm.PutCString("absolute branch register");
4220b57cec5SDimitry Andric break;
4230b57cec5SDimitry Andric
4240b57cec5SDimitry Andric case eContextSupervisorCall:
4250b57cec5SDimitry Andric strm.PutCString("supervisor call");
4260b57cec5SDimitry Andric break;
4270b57cec5SDimitry Andric
4280b57cec5SDimitry Andric case eContextTableBranchReadMemory:
4290b57cec5SDimitry Andric strm.PutCString("table branch read memory");
4300b57cec5SDimitry Andric break;
4310b57cec5SDimitry Andric
4320b57cec5SDimitry Andric case eContextWriteRegisterRandomBits:
4330b57cec5SDimitry Andric strm.PutCString("write random bits to a register");
4340b57cec5SDimitry Andric break;
4350b57cec5SDimitry Andric
4360b57cec5SDimitry Andric case eContextWriteMemoryRandomBits:
4370b57cec5SDimitry Andric strm.PutCString("write random bits to a memory address");
4380b57cec5SDimitry Andric break;
4390b57cec5SDimitry Andric
4400b57cec5SDimitry Andric case eContextArithmetic:
4410b57cec5SDimitry Andric strm.PutCString("arithmetic");
4420b57cec5SDimitry Andric break;
4430b57cec5SDimitry Andric
4440b57cec5SDimitry Andric case eContextReturnFromException:
4450b57cec5SDimitry Andric strm.PutCString("return from exception");
4460b57cec5SDimitry Andric break;
4470b57cec5SDimitry Andric
4480b57cec5SDimitry Andric default:
4490b57cec5SDimitry Andric strm.PutCString("unrecognized context.");
4500b57cec5SDimitry Andric break;
4510b57cec5SDimitry Andric }
4520b57cec5SDimitry Andric
453bdd1243dSDimitry Andric switch (GetInfoType()) {
4540b57cec5SDimitry Andric case eInfoTypeRegisterPlusOffset:
4550b57cec5SDimitry Andric strm.Printf(" (reg_plus_offset = %s%+" PRId64 ")",
4560b57cec5SDimitry Andric info.RegisterPlusOffset.reg.name,
4570b57cec5SDimitry Andric info.RegisterPlusOffset.signed_offset);
4580b57cec5SDimitry Andric break;
4590b57cec5SDimitry Andric
4600b57cec5SDimitry Andric case eInfoTypeRegisterPlusIndirectOffset:
4610b57cec5SDimitry Andric strm.Printf(" (reg_plus_reg = %s + %s)",
4620b57cec5SDimitry Andric info.RegisterPlusIndirectOffset.base_reg.name,
4630b57cec5SDimitry Andric info.RegisterPlusIndirectOffset.offset_reg.name);
4640b57cec5SDimitry Andric break;
4650b57cec5SDimitry Andric
4660b57cec5SDimitry Andric case eInfoTypeRegisterToRegisterPlusOffset:
4670b57cec5SDimitry Andric strm.Printf(" (base_and_imm_offset = %s%+" PRId64 ", data_reg = %s)",
4680b57cec5SDimitry Andric info.RegisterToRegisterPlusOffset.base_reg.name,
4690b57cec5SDimitry Andric info.RegisterToRegisterPlusOffset.offset,
4700b57cec5SDimitry Andric info.RegisterToRegisterPlusOffset.data_reg.name);
4710b57cec5SDimitry Andric break;
4720b57cec5SDimitry Andric
4730b57cec5SDimitry Andric case eInfoTypeRegisterToRegisterPlusIndirectOffset:
4740b57cec5SDimitry Andric strm.Printf(" (base_and_reg_offset = %s + %s, data_reg = %s)",
4750b57cec5SDimitry Andric info.RegisterToRegisterPlusIndirectOffset.base_reg.name,
4760b57cec5SDimitry Andric info.RegisterToRegisterPlusIndirectOffset.offset_reg.name,
4770b57cec5SDimitry Andric info.RegisterToRegisterPlusIndirectOffset.data_reg.name);
4780b57cec5SDimitry Andric break;
4790b57cec5SDimitry Andric
4800b57cec5SDimitry Andric case eInfoTypeRegisterRegisterOperands:
4810b57cec5SDimitry Andric strm.Printf(" (register to register binary op: %s and %s)",
4820b57cec5SDimitry Andric info.RegisterRegisterOperands.operand1.name,
4830b57cec5SDimitry Andric info.RegisterRegisterOperands.operand2.name);
4840b57cec5SDimitry Andric break;
4850b57cec5SDimitry Andric
4860b57cec5SDimitry Andric case eInfoTypeOffset:
4870b57cec5SDimitry Andric strm.Printf(" (signed_offset = %+" PRId64 ")", info.signed_offset);
4880b57cec5SDimitry Andric break;
4890b57cec5SDimitry Andric
4900b57cec5SDimitry Andric case eInfoTypeRegister:
4910b57cec5SDimitry Andric strm.Printf(" (reg = %s)", info.reg.name);
4920b57cec5SDimitry Andric break;
4930b57cec5SDimitry Andric
4940b57cec5SDimitry Andric case eInfoTypeImmediate:
4950b57cec5SDimitry Andric strm.Printf(" (unsigned_immediate = %" PRIu64 " (0x%16.16" PRIx64 "))",
4960b57cec5SDimitry Andric info.unsigned_immediate, info.unsigned_immediate);
4970b57cec5SDimitry Andric break;
4980b57cec5SDimitry Andric
4990b57cec5SDimitry Andric case eInfoTypeImmediateSigned:
5000b57cec5SDimitry Andric strm.Printf(" (signed_immediate = %+" PRId64 " (0x%16.16" PRIx64 "))",
5010b57cec5SDimitry Andric info.signed_immediate, info.signed_immediate);
5020b57cec5SDimitry Andric break;
5030b57cec5SDimitry Andric
5040b57cec5SDimitry Andric case eInfoTypeAddress:
5050b57cec5SDimitry Andric strm.Printf(" (address = 0x%" PRIx64 ")", info.address);
5060b57cec5SDimitry Andric break;
5070b57cec5SDimitry Andric
5080b57cec5SDimitry Andric case eInfoTypeISAAndImmediate:
5090b57cec5SDimitry Andric strm.Printf(" (isa = %u, unsigned_immediate = %u (0x%8.8x))",
5100b57cec5SDimitry Andric info.ISAAndImmediate.isa, info.ISAAndImmediate.unsigned_data32,
5110b57cec5SDimitry Andric info.ISAAndImmediate.unsigned_data32);
5120b57cec5SDimitry Andric break;
5130b57cec5SDimitry Andric
5140b57cec5SDimitry Andric case eInfoTypeISAAndImmediateSigned:
5150b57cec5SDimitry Andric strm.Printf(" (isa = %u, signed_immediate = %i (0x%8.8x))",
5160b57cec5SDimitry Andric info.ISAAndImmediateSigned.isa,
5170b57cec5SDimitry Andric info.ISAAndImmediateSigned.signed_data32,
5180b57cec5SDimitry Andric info.ISAAndImmediateSigned.signed_data32);
5190b57cec5SDimitry Andric break;
5200b57cec5SDimitry Andric
5210b57cec5SDimitry Andric case eInfoTypeISA:
5220b57cec5SDimitry Andric strm.Printf(" (isa = %u)", info.isa);
5230b57cec5SDimitry Andric break;
5240b57cec5SDimitry Andric
5250b57cec5SDimitry Andric case eInfoTypeNoArgs:
5260b57cec5SDimitry Andric break;
5270b57cec5SDimitry Andric }
5280b57cec5SDimitry Andric }
5290b57cec5SDimitry Andric
SetInstruction(const Opcode & opcode,const Address & inst_addr,Target * target)5300b57cec5SDimitry Andric bool EmulateInstruction::SetInstruction(const Opcode &opcode,
5310b57cec5SDimitry Andric const Address &inst_addr,
5320b57cec5SDimitry Andric Target *target) {
5330b57cec5SDimitry Andric m_opcode = opcode;
5340b57cec5SDimitry Andric m_addr = LLDB_INVALID_ADDRESS;
5350b57cec5SDimitry Andric if (inst_addr.IsValid()) {
5360b57cec5SDimitry Andric if (target != nullptr)
5370b57cec5SDimitry Andric m_addr = inst_addr.GetLoadAddress(target);
5380b57cec5SDimitry Andric if (m_addr == LLDB_INVALID_ADDRESS)
5390b57cec5SDimitry Andric m_addr = inst_addr.GetFileAddress();
5400b57cec5SDimitry Andric }
5410b57cec5SDimitry Andric return true;
5420b57cec5SDimitry Andric }
5430b57cec5SDimitry Andric
GetBestRegisterKindAndNumber(const RegisterInfo * reg_info,lldb::RegisterKind & reg_kind,uint32_t & reg_num)5440b57cec5SDimitry Andric bool EmulateInstruction::GetBestRegisterKindAndNumber(
5450b57cec5SDimitry Andric const RegisterInfo *reg_info, lldb::RegisterKind ®_kind,
5460b57cec5SDimitry Andric uint32_t ®_num) {
5470b57cec5SDimitry Andric // Generic and DWARF should be the two most popular register kinds when
5480b57cec5SDimitry Andric // emulating instructions since they are the most platform agnostic...
5490b57cec5SDimitry Andric reg_num = reg_info->kinds[eRegisterKindGeneric];
5500b57cec5SDimitry Andric if (reg_num != LLDB_INVALID_REGNUM) {
5510b57cec5SDimitry Andric reg_kind = eRegisterKindGeneric;
5520b57cec5SDimitry Andric return true;
5530b57cec5SDimitry Andric }
5540b57cec5SDimitry Andric
5550b57cec5SDimitry Andric reg_num = reg_info->kinds[eRegisterKindDWARF];
5560b57cec5SDimitry Andric if (reg_num != LLDB_INVALID_REGNUM) {
5570b57cec5SDimitry Andric reg_kind = eRegisterKindDWARF;
5580b57cec5SDimitry Andric return true;
5590b57cec5SDimitry Andric }
5600b57cec5SDimitry Andric
5610b57cec5SDimitry Andric reg_num = reg_info->kinds[eRegisterKindLLDB];
5620b57cec5SDimitry Andric if (reg_num != LLDB_INVALID_REGNUM) {
5630b57cec5SDimitry Andric reg_kind = eRegisterKindLLDB;
5640b57cec5SDimitry Andric return true;
5650b57cec5SDimitry Andric }
5660b57cec5SDimitry Andric
5670b57cec5SDimitry Andric reg_num = reg_info->kinds[eRegisterKindEHFrame];
5680b57cec5SDimitry Andric if (reg_num != LLDB_INVALID_REGNUM) {
5690b57cec5SDimitry Andric reg_kind = eRegisterKindEHFrame;
5700b57cec5SDimitry Andric return true;
5710b57cec5SDimitry Andric }
5720b57cec5SDimitry Andric
5730b57cec5SDimitry Andric reg_num = reg_info->kinds[eRegisterKindProcessPlugin];
5740b57cec5SDimitry Andric if (reg_num != LLDB_INVALID_REGNUM) {
5750b57cec5SDimitry Andric reg_kind = eRegisterKindProcessPlugin;
5760b57cec5SDimitry Andric return true;
5770b57cec5SDimitry Andric }
5780b57cec5SDimitry Andric return false;
5790b57cec5SDimitry Andric }
5800b57cec5SDimitry Andric
5810b57cec5SDimitry Andric uint32_t
GetInternalRegisterNumber(RegisterContext * reg_ctx,const RegisterInfo & reg_info)5820b57cec5SDimitry Andric EmulateInstruction::GetInternalRegisterNumber(RegisterContext *reg_ctx,
5830b57cec5SDimitry Andric const RegisterInfo ®_info) {
5840b57cec5SDimitry Andric lldb::RegisterKind reg_kind;
5850b57cec5SDimitry Andric uint32_t reg_num;
5860b57cec5SDimitry Andric if (reg_ctx && GetBestRegisterKindAndNumber(®_info, reg_kind, reg_num))
5870b57cec5SDimitry Andric return reg_ctx->ConvertRegisterKindToRegisterNumber(reg_kind, reg_num);
5880b57cec5SDimitry Andric return LLDB_INVALID_REGNUM;
5890b57cec5SDimitry Andric }
5900b57cec5SDimitry Andric
CreateFunctionEntryUnwind(UnwindPlan & unwind_plan)5910b57cec5SDimitry Andric bool EmulateInstruction::CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) {
5920b57cec5SDimitry Andric unwind_plan.Clear();
5930b57cec5SDimitry Andric return false;
5940b57cec5SDimitry Andric }
595