1*f3087befSAndrew Turner /* 2*f3087befSAndrew Turner * Single-precision vector sinpi function. 3*f3087befSAndrew Turner * 4*f3087befSAndrew Turner * Copyright (c) 2023-2024, Arm Limited. 5*f3087befSAndrew Turner * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 6*f3087befSAndrew Turner */ 7*f3087befSAndrew Turner 8*f3087befSAndrew Turner #include "mathlib.h" 9*f3087befSAndrew Turner #include "v_math.h" 10*f3087befSAndrew Turner #include "v_poly_f32.h" 11*f3087befSAndrew Turner #include "test_sig.h" 12*f3087befSAndrew Turner #include "test_defs.h" 13*f3087befSAndrew Turner 14*f3087befSAndrew Turner static const struct data 15*f3087befSAndrew Turner { 16*f3087befSAndrew Turner float32x4_t poly[6]; 17*f3087befSAndrew Turner } data = { 18*f3087befSAndrew Turner /* Taylor series coefficents for sin(pi * x). */ 19*f3087befSAndrew Turner .poly = { V4 (0x1.921fb6p1f), V4 (-0x1.4abbcep2f), V4 (0x1.466bc6p1f), 20*f3087befSAndrew Turner V4 (-0x1.32d2ccp-1f), V4 (0x1.50783p-4f), V4 (-0x1.e30750p-8f) }, 21*f3087befSAndrew Turner }; 22*f3087befSAndrew Turner 23*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT 24*f3087befSAndrew Turner # define TinyBound v_u32 (0x30000000) /* asuint32(0x1p-31f). */ 25*f3087befSAndrew Turner # define Thresh v_u32 (0x1f000000) /* asuint32(0x1p31f) - TinyBound. */ 26*f3087befSAndrew Turner 27*f3087befSAndrew Turner static float32x4_t VPCS_ATTR NOINLINE 28*f3087befSAndrew Turner special_case (float32x4_t x, float32x4_t y, uint32x4_t odd, uint32x4_t cmp) 29*f3087befSAndrew Turner { 30*f3087befSAndrew Turner /* Fall back to scalar code. */ 31*f3087befSAndrew Turner y = vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); 32*f3087befSAndrew Turner return v_call_f32 (arm_math_sinpif, x, y, cmp); 33*f3087befSAndrew Turner } 34*f3087befSAndrew Turner #endif 35*f3087befSAndrew Turner 36*f3087befSAndrew Turner /* Approximation for vector single-precision sinpi(x) 37*f3087befSAndrew Turner Maximum Error 3.03 ULP: 38*f3087befSAndrew Turner _ZGVnN4v_sinpif(0x1.c597ccp-2) got 0x1.f7cd56p-1 39*f3087befSAndrew Turner want 0x1.f7cd5p-1. */ 40*f3087befSAndrew Turner float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (sinpi) (float32x4_t x) 41*f3087befSAndrew Turner { 42*f3087befSAndrew Turner const struct data *d = ptr_barrier (&data); 43*f3087befSAndrew Turner 44*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT 45*f3087befSAndrew Turner uint32x4_t ir = vreinterpretq_u32_f32 (vabsq_f32 (x)); 46*f3087befSAndrew Turner uint32x4_t cmp = vcgeq_u32 (vsubq_u32 (ir, TinyBound), Thresh); 47*f3087befSAndrew Turner 48*f3087befSAndrew Turner /* When WANT_SIMD_EXCEPT = 1, special lanes should be set to 0 49*f3087befSAndrew Turner to avoid them under/overflowing and throwing exceptions. */ 50*f3087befSAndrew Turner float32x4_t r = v_zerofy_f32 (x, cmp); 51*f3087befSAndrew Turner #else 52*f3087befSAndrew Turner float32x4_t r = x; 53*f3087befSAndrew Turner #endif 54*f3087befSAndrew Turner 55*f3087befSAndrew Turner /* If r is odd, the sign of the result should be inverted. */ 56*f3087befSAndrew Turner uint32x4_t odd 57*f3087befSAndrew Turner = vshlq_n_u32 (vreinterpretq_u32_s32 (vcvtaq_s32_f32 (r)), 31); 58*f3087befSAndrew Turner 59*f3087befSAndrew Turner /* r = x - rint(x). Range reduction to -1/2 .. 1/2. */ 60*f3087befSAndrew Turner r = vsubq_f32 (r, vrndaq_f32 (r)); 61*f3087befSAndrew Turner 62*f3087befSAndrew Turner /* Pairwise Horner approximation for y = sin(r * pi). */ 63*f3087befSAndrew Turner float32x4_t r2 = vmulq_f32 (r, r); 64*f3087befSAndrew Turner float32x4_t r4 = vmulq_f32 (r2, r2); 65*f3087befSAndrew Turner float32x4_t y = vmulq_f32 (v_pw_horner_5_f32 (r2, r4, d->poly), r); 66*f3087befSAndrew Turner 67*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT 68*f3087befSAndrew Turner if (unlikely (v_any_u32 (cmp))) 69*f3087befSAndrew Turner return special_case (x, y, odd, cmp); 70*f3087befSAndrew Turner #endif 71*f3087befSAndrew Turner 72*f3087befSAndrew Turner return vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd)); 73*f3087befSAndrew Turner } 74*f3087befSAndrew Turner 75*f3087befSAndrew Turner HALF_WIDTH_ALIAS_F1 (sinpi) 76*f3087befSAndrew Turner 77*f3087befSAndrew Turner #if WANT_TRIGPI_TESTS 78*f3087befSAndrew Turner TEST_ULP (V_NAME_F1 (sinpi), 2.54) 79*f3087befSAndrew Turner TEST_DISABLE_FENV_IF_NOT (V_NAME_F1 (sinpi), WANT_SIMD_EXCEPT) 80*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0, 0x1p-31, 5000) 81*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0x1p-31, 0.5, 10000) 82*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0.5, 0x1p31f, 10000) 83*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0x1p31f, inf, 10000) 84*f3087befSAndrew Turner #endif 85