xref: /freebsd-src/contrib/arm-optimized-routines/math/aarch64/advsimd/sinf.c (revision f3087bef11543b42e0d69b708f367097a4118d24)
1*f3087befSAndrew Turner /*
2*f3087befSAndrew Turner  * Single-precision vector sin function.
3*f3087befSAndrew Turner  *
4*f3087befSAndrew Turner  * Copyright (c) 2019-2024, Arm Limited.
5*f3087befSAndrew Turner  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6*f3087befSAndrew Turner  */
7*f3087befSAndrew Turner 
8*f3087befSAndrew Turner #include "mathlib.h"
9*f3087befSAndrew Turner #include "v_math.h"
10*f3087befSAndrew Turner #include "test_defs.h"
11*f3087befSAndrew Turner #include "test_sig.h"
12*f3087befSAndrew Turner 
13*f3087befSAndrew Turner static const struct data
14*f3087befSAndrew Turner {
15*f3087befSAndrew Turner   float32x4_t poly[4];
16*f3087befSAndrew Turner   float32x4_t range_val, inv_pi, pi_1, pi_2, pi_3;
17*f3087befSAndrew Turner } data = {
18*f3087befSAndrew Turner   /* 1.886 ulp error.  */
19*f3087befSAndrew Turner   .poly = { V4 (-0x1.555548p-3f), V4 (0x1.110df4p-7f), V4 (-0x1.9f42eap-13f),
20*f3087befSAndrew Turner 	    V4 (0x1.5b2e76p-19f) },
21*f3087befSAndrew Turner 
22*f3087befSAndrew Turner   .pi_1 = V4 (0x1.921fb6p+1f),
23*f3087befSAndrew Turner   .pi_2 = V4 (-0x1.777a5cp-24f),
24*f3087befSAndrew Turner   .pi_3 = V4 (-0x1.ee59dap-49f),
25*f3087befSAndrew Turner 
26*f3087befSAndrew Turner   .inv_pi = V4 (0x1.45f306p-2f),
27*f3087befSAndrew Turner   .range_val = V4 (0x1p20f)
28*f3087befSAndrew Turner };
29*f3087befSAndrew Turner 
30*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
31*f3087befSAndrew Turner /* asuint32(0x1p-59f), below which multiply by inv_pi underflows.  */
32*f3087befSAndrew Turner # define TinyBound v_u32 (0x22000000)
33*f3087befSAndrew Turner /* RangeVal - TinyBound.  */
34*f3087befSAndrew Turner # define Thresh v_u32 (0x27800000)
35*f3087befSAndrew Turner #endif
36*f3087befSAndrew Turner 
37*f3087befSAndrew Turner #define C(i) d->poly[i]
38*f3087befSAndrew Turner 
39*f3087befSAndrew Turner static float32x4_t VPCS_ATTR NOINLINE
40*f3087befSAndrew Turner special_case (float32x4_t x, float32x4_t y, uint32x4_t odd, uint32x4_t cmp)
41*f3087befSAndrew Turner {
42*f3087befSAndrew Turner   /* Fall back to scalar code.  */
43*f3087befSAndrew Turner   y = vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd));
44*f3087befSAndrew Turner   return v_call_f32 (sinf, x, y, cmp);
45*f3087befSAndrew Turner }
46*f3087befSAndrew Turner 
47*f3087befSAndrew Turner float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (sin) (float32x4_t x)
48*f3087befSAndrew Turner {
49*f3087befSAndrew Turner   const struct data *d = ptr_barrier (&data);
50*f3087befSAndrew Turner   float32x4_t n, r, r2, y;
51*f3087befSAndrew Turner   uint32x4_t odd, cmp;
52*f3087befSAndrew Turner 
53*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
54*f3087befSAndrew Turner   uint32x4_t ir = vreinterpretq_u32_f32 (vabsq_f32 (x));
55*f3087befSAndrew Turner   cmp = vcgeq_u32 (vsubq_u32 (ir, TinyBound), Thresh);
56*f3087befSAndrew Turner   /* If fenv exceptions are to be triggered correctly, set any special lanes
57*f3087befSAndrew Turner      to 1 (which is neutral w.r.t. fenv). These lanes will be fixed by
58*f3087befSAndrew Turner      special-case handler later.  */
59*f3087befSAndrew Turner   r = vreinterpretq_f32_u32 (vbicq_u32 (vreinterpretq_u32_f32 (x), cmp));
60*f3087befSAndrew Turner #else
61*f3087befSAndrew Turner   r = x;
62*f3087befSAndrew Turner   cmp = vcageq_f32 (x, d->range_val);
63*f3087befSAndrew Turner #endif
64*f3087befSAndrew Turner 
65*f3087befSAndrew Turner   /* n = rint(|x|/pi).  */
66*f3087befSAndrew Turner   n = vrndaq_f32 (vmulq_f32 (r, d->inv_pi));
67*f3087befSAndrew Turner   odd = vshlq_n_u32 (vreinterpretq_u32_s32 (vcvtq_s32_f32 (n)), 31);
68*f3087befSAndrew Turner 
69*f3087befSAndrew Turner   /* r = |x| - n*pi  (range reduction into -pi/2 .. pi/2).  */
70*f3087befSAndrew Turner   r = vfmsq_f32 (r, d->pi_1, n);
71*f3087befSAndrew Turner   r = vfmsq_f32 (r, d->pi_2, n);
72*f3087befSAndrew Turner   r = vfmsq_f32 (r, d->pi_3, n);
73*f3087befSAndrew Turner 
74*f3087befSAndrew Turner   /* y = sin(r).  */
75*f3087befSAndrew Turner   r2 = vmulq_f32 (r, r);
76*f3087befSAndrew Turner   y = vfmaq_f32 (C (2), C (3), r2);
77*f3087befSAndrew Turner   y = vfmaq_f32 (C (1), y, r2);
78*f3087befSAndrew Turner   y = vfmaq_f32 (C (0), y, r2);
79*f3087befSAndrew Turner   y = vfmaq_f32 (r, vmulq_f32 (y, r2), r);
80*f3087befSAndrew Turner 
81*f3087befSAndrew Turner   if (unlikely (v_any_u32 (cmp)))
82*f3087befSAndrew Turner     return special_case (x, y, odd, cmp);
83*f3087befSAndrew Turner   return vreinterpretq_f32_u32 (veorq_u32 (vreinterpretq_u32_f32 (y), odd));
84*f3087befSAndrew Turner }
85*f3087befSAndrew Turner 
86*f3087befSAndrew Turner HALF_WIDTH_ALIAS_F1 (sin)
87*f3087befSAndrew Turner 
88*f3087befSAndrew Turner TEST_SIG (V, F, 1, sin, -3.1, 3.1)
89*f3087befSAndrew Turner TEST_ULP (V_NAME_F1 (sin), 1.4)
90*f3087befSAndrew Turner TEST_DISABLE_FENV_IF_NOT (V_NAME_F1 (sin), WANT_SIMD_EXCEPT)
91*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_F1 (sin), 0, 0x1p20, 500000)
92*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_F1 (sin), 0x1p20, inf, 10000)
93