1*f3087befSAndrew Turner /* 2*f3087befSAndrew Turner * Double-precision vector e^x function. 3*f3087befSAndrew Turner * 4*f3087befSAndrew Turner * Copyright (c) 2019-2024, Arm Limited. 5*f3087befSAndrew Turner * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 6*f3087befSAndrew Turner */ 7*f3087befSAndrew Turner 8*f3087befSAndrew Turner #include "mathlib.h" 9*f3087befSAndrew Turner #include "v_math.h" 10*f3087befSAndrew Turner #include "test_defs.h" 11*f3087befSAndrew Turner #include "test_sig.h" 12*f3087befSAndrew Turner 13*f3087befSAndrew Turner #define N (1 << V_EXP_TABLE_BITS) 14*f3087befSAndrew Turner #define IndexMask (N - 1) 15*f3087befSAndrew Turner 16*f3087befSAndrew Turner const static volatile struct 17*f3087befSAndrew Turner { 18*f3087befSAndrew Turner float64x2_t poly[3]; 19*f3087befSAndrew Turner float64x2_t inv_ln2, ln2_hi, ln2_lo, shift; 20*f3087befSAndrew Turner #if !WANT_SIMD_EXCEPT 21*f3087befSAndrew Turner float64x2_t special_bound, scale_thresh; 22*f3087befSAndrew Turner #endif 23*f3087befSAndrew Turner } data = { 24*f3087befSAndrew Turner /* maxerr: 1.88 +0.5 ulp 25*f3087befSAndrew Turner rel error: 1.4337*2^-53 26*f3087befSAndrew Turner abs error: 1.4299*2^-53 in [ -ln2/256, ln2/256 ]. */ 27*f3087befSAndrew Turner .poly = { V2 (0x1.ffffffffffd43p-2), V2 (0x1.55555c75adbb2p-3), 28*f3087befSAndrew Turner V2 (0x1.55555da646206p-5) }, 29*f3087befSAndrew Turner #if !WANT_SIMD_EXCEPT 30*f3087befSAndrew Turner .scale_thresh = V2 (163840.0), /* 1280.0 * N. */ 31*f3087befSAndrew Turner .special_bound = V2 (704.0), 32*f3087befSAndrew Turner #endif 33*f3087befSAndrew Turner .inv_ln2 = V2 (0x1.71547652b82fep7), /* N/ln2. */ 34*f3087befSAndrew Turner .ln2_hi = V2 (0x1.62e42fefa39efp-8), /* ln2/N. */ 35*f3087befSAndrew Turner .ln2_lo = V2 (0x1.abc9e3b39803f3p-63), 36*f3087befSAndrew Turner .shift = V2 (0x1.8p+52) 37*f3087befSAndrew Turner }; 38*f3087befSAndrew Turner 39*f3087befSAndrew Turner #define C(i) data.poly[i] 40*f3087befSAndrew Turner #define Tab __v_exp_data 41*f3087befSAndrew Turner 42*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT 43*f3087befSAndrew Turner 44*f3087befSAndrew Turner # define TinyBound v_u64 (0x2000000000000000) /* asuint64 (0x1p-511). */ 45*f3087befSAndrew Turner # define BigBound v_u64 (0x4080000000000000) /* asuint64 (0x1p9). */ 46*f3087befSAndrew Turner # define SpecialBound v_u64 (0x2080000000000000) /* BigBound - TinyBound. */ 47*f3087befSAndrew Turner 48*f3087befSAndrew Turner static float64x2_t VPCS_ATTR NOINLINE 49*f3087befSAndrew Turner special_case (float64x2_t x, float64x2_t y, uint64x2_t cmp) 50*f3087befSAndrew Turner { 51*f3087befSAndrew Turner /* If fenv exceptions are to be triggered correctly, fall back to the scalar 52*f3087befSAndrew Turner routine to special lanes. */ 53*f3087befSAndrew Turner return v_call_f64 (exp, x, y, cmp); 54*f3087befSAndrew Turner } 55*f3087befSAndrew Turner 56*f3087befSAndrew Turner #else 57*f3087befSAndrew Turner 58*f3087befSAndrew Turner # define SpecialOffset v_u64 (0x6000000000000000) /* 0x1p513. */ 59*f3087befSAndrew Turner /* SpecialBias1 + SpecialBias1 = asuint(1.0). */ 60*f3087befSAndrew Turner # define SpecialBias1 v_u64 (0x7000000000000000) /* 0x1p769. */ 61*f3087befSAndrew Turner # define SpecialBias2 v_u64 (0x3010000000000000) /* 0x1p-254. */ 62*f3087befSAndrew Turner 63*f3087befSAndrew Turner static inline float64x2_t VPCS_ATTR 64*f3087befSAndrew Turner special_case (float64x2_t s, float64x2_t y, float64x2_t n) 65*f3087befSAndrew Turner { 66*f3087befSAndrew Turner /* 2^(n/N) may overflow, break it up into s1*s2. */ 67*f3087befSAndrew Turner uint64x2_t b = vandq_u64 (vcltzq_f64 (n), SpecialOffset); 68*f3087befSAndrew Turner float64x2_t s1 = vreinterpretq_f64_u64 (vsubq_u64 (SpecialBias1, b)); 69*f3087befSAndrew Turner float64x2_t s2 = vreinterpretq_f64_u64 ( 70*f3087befSAndrew Turner vaddq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (s), SpecialBias2), b)); 71*f3087befSAndrew Turner uint64x2_t cmp = vcagtq_f64 (n, data.scale_thresh); 72*f3087befSAndrew Turner float64x2_t r1 = vmulq_f64 (s1, s1); 73*f3087befSAndrew Turner float64x2_t r0 = vmulq_f64 (vfmaq_f64 (s2, y, s2), s1); 74*f3087befSAndrew Turner return vbslq_f64 (cmp, r1, r0); 75*f3087befSAndrew Turner } 76*f3087befSAndrew Turner 77*f3087befSAndrew Turner #endif 78*f3087befSAndrew Turner 79*f3087befSAndrew Turner float64x2_t VPCS_ATTR V_NAME_D1 (exp) (float64x2_t x) 80*f3087befSAndrew Turner { 81*f3087befSAndrew Turner float64x2_t n, r, r2, s, y, z; 82*f3087befSAndrew Turner uint64x2_t cmp, u, e; 83*f3087befSAndrew Turner 84*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT 85*f3087befSAndrew Turner /* If any lanes are special, mask them with 1 and retain a copy of x to allow 86*f3087befSAndrew Turner special_case to fix special lanes later. This is only necessary if fenv 87*f3087befSAndrew Turner exceptions are to be triggered correctly. */ 88*f3087befSAndrew Turner float64x2_t xm = x; 89*f3087befSAndrew Turner uint64x2_t iax = vreinterpretq_u64_f64 (vabsq_f64 (x)); 90*f3087befSAndrew Turner cmp = vcgeq_u64 (vsubq_u64 (iax, TinyBound), SpecialBound); 91*f3087befSAndrew Turner if (unlikely (v_any_u64 (cmp))) 92*f3087befSAndrew Turner x = vbslq_f64 (cmp, v_f64 (1), x); 93*f3087befSAndrew Turner #else 94*f3087befSAndrew Turner cmp = vcagtq_f64 (x, data.special_bound); 95*f3087befSAndrew Turner #endif 96*f3087befSAndrew Turner 97*f3087befSAndrew Turner /* n = round(x/(ln2/N)). */ 98*f3087befSAndrew Turner z = vfmaq_f64 (data.shift, x, data.inv_ln2); 99*f3087befSAndrew Turner u = vreinterpretq_u64_f64 (z); 100*f3087befSAndrew Turner n = vsubq_f64 (z, data.shift); 101*f3087befSAndrew Turner 102*f3087befSAndrew Turner /* r = x - n*ln2/N. */ 103*f3087befSAndrew Turner r = x; 104*f3087befSAndrew Turner r = vfmsq_f64 (r, data.ln2_hi, n); 105*f3087befSAndrew Turner r = vfmsq_f64 (r, data.ln2_lo, n); 106*f3087befSAndrew Turner 107*f3087befSAndrew Turner e = vshlq_n_u64 (u, 52 - V_EXP_TABLE_BITS); 108*f3087befSAndrew Turner 109*f3087befSAndrew Turner /* y = exp(r) - 1 ~= r + C0 r^2 + C1 r^3 + C2 r^4. */ 110*f3087befSAndrew Turner r2 = vmulq_f64 (r, r); 111*f3087befSAndrew Turner y = vfmaq_f64 (C (0), C (1), r); 112*f3087befSAndrew Turner y = vfmaq_f64 (y, C (2), r2); 113*f3087befSAndrew Turner y = vfmaq_f64 (r, y, r2); 114*f3087befSAndrew Turner 115*f3087befSAndrew Turner /* s = 2^(n/N). */ 116*f3087befSAndrew Turner u = (uint64x2_t){ Tab[u[0] & IndexMask], Tab[u[1] & IndexMask] }; 117*f3087befSAndrew Turner s = vreinterpretq_f64_u64 (vaddq_u64 (u, e)); 118*f3087befSAndrew Turner 119*f3087befSAndrew Turner if (unlikely (v_any_u64 (cmp))) 120*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT 121*f3087befSAndrew Turner return special_case (xm, vfmaq_f64 (s, y, s), cmp); 122*f3087befSAndrew Turner #else 123*f3087befSAndrew Turner return special_case (s, y, n); 124*f3087befSAndrew Turner #endif 125*f3087befSAndrew Turner 126*f3087befSAndrew Turner return vfmaq_f64 (s, y, s); 127*f3087befSAndrew Turner } 128*f3087befSAndrew Turner 129*f3087befSAndrew Turner TEST_SIG (V, D, 1, exp, -9.9, 9.9) 130*f3087befSAndrew Turner TEST_ULP (V_NAME_D1 (exp), 1.9) 131*f3087befSAndrew Turner TEST_DISABLE_FENV_IF_NOT (V_NAME_D1 (exp), WANT_SIMD_EXCEPT) 132*f3087befSAndrew Turner TEST_INTERVAL (V_NAME_D1 (exp), 0, 0xffff000000000000, 10000) 133*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_D1 (exp), 0x1p-6, 0x1p6, 400000) 134*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_D1 (exp), 633.3, 733.3, 10000) 135