1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2015 Intel Corporation. 3 * Copyright 2013-2014 6WIND S.A. 4 */ 5 6 #ifndef _RTE_PCI_H_ 7 #define _RTE_PCI_H_ 8 9 /** 10 * @file 11 * 12 * RTE PCI Library 13 */ 14 15 #ifdef __cplusplus 16 extern "C" { 17 #endif 18 19 #include <stdio.h> 20 #include <limits.h> 21 #include <inttypes.h> 22 #include <sys/types.h> 23 24 /* 25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of 26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of 27 * configuration space. 28 */ 29 #define RTE_PCI_CFG_SPACE_SIZE 256 30 #define RTE_PCI_CFG_SPACE_EXP_SIZE 4096 31 32 #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */ 33 #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */ 34 #define RTE_PCI_COMMAND 0x04 /* 16 bits */ 35 36 /* PCI Command Register */ 37 #define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */ 38 39 /* PCI Express capability registers */ 40 #define RTE_PCI_EXP_DEVCTL 8 /* Device Control */ 41 42 /* Extended Capabilities (PCI-X 2.0 and Express) */ 43 #define RTE_PCI_EXT_CAP_ID(header) (header & 0x0000ffff) 44 #define RTE_PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc) 45 46 #define RTE_PCI_EXT_CAP_ID_ERR 0x01 /* Advanced Error Reporting */ 47 #define RTE_PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */ 48 #define RTE_PCI_EXT_CAP_ID_SRIOV 0x10 /* SR-IOV*/ 49 50 /* Single Root I/O Virtualization */ 51 #define RTE_PCI_SRIOV_CAP 0x04 /* SR-IOV Capabilities */ 52 #define RTE_PCI_SRIOV_CTRL 0x08 /* SR-IOV Control */ 53 #define RTE_PCI_SRIOV_INITIAL_VF 0x0c /* Initial VFs */ 54 #define RTE_PCI_SRIOV_TOTAL_VF 0x0e /* Total VFs */ 55 #define RTE_PCI_SRIOV_NUM_VF 0x10 /* Number of VFs */ 56 #define RTE_PCI_SRIOV_FUNC_LINK 0x12 /* Function Dependency Link */ 57 #define RTE_PCI_SRIOV_VF_OFFSET 0x14 /* First VF Offset */ 58 #define RTE_PCI_SRIOV_VF_STRIDE 0x16 /* Following VF Stride */ 59 #define RTE_PCI_SRIOV_VF_DID 0x1a /* VF Device ID */ 60 #define RTE_PCI_SRIOV_SUP_PGSIZE 0x1c /* Supported Page Sizes */ 61 62 /** Formatting string for PCI device identifier: Ex: 0000:00:01.0 */ 63 #define PCI_PRI_FMT "%.4" PRIx32 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8 64 #define PCI_PRI_STR_SIZE sizeof("XXXXXXXX:XX:XX.X") 65 66 /** Short formatting string, without domain, for PCI device: Ex: 00:01.0 */ 67 #define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8 68 69 /** Nb. of values in PCI device identifier format string. */ 70 #define PCI_FMT_NVAL 4 71 72 /** Nb. of values in PCI resource format. */ 73 #define PCI_RESOURCE_FMT_NVAL 3 74 75 /** Maximum number of PCI resources. */ 76 #define PCI_MAX_RESOURCE 6 77 78 /** 79 * A structure describing an ID for a PCI driver. Each driver provides a 80 * table of these IDs for each device that it supports. 81 */ 82 struct rte_pci_id { 83 uint32_t class_id; /**< Class ID or RTE_CLASS_ANY_ID. */ 84 uint16_t vendor_id; /**< Vendor ID or RTE_PCI_ANY_ID. */ 85 uint16_t device_id; /**< Device ID or RTE_PCI_ANY_ID. */ 86 uint16_t subsystem_vendor_id; /**< Subsystem vendor ID or RTE_PCI_ANY_ID. */ 87 uint16_t subsystem_device_id; /**< Subsystem device ID or RTE_PCI_ANY_ID. */ 88 }; 89 90 /** 91 * A structure describing the location of a PCI device. 92 */ 93 struct rte_pci_addr { 94 uint32_t domain; /**< Device domain */ 95 uint8_t bus; /**< Device bus */ 96 uint8_t devid; /**< Device ID */ 97 uint8_t function; /**< Device function. */ 98 }; 99 100 /** Any PCI device identifier (vendor, device, ...) */ 101 #define RTE_PCI_ANY_ID (0xffff) 102 /** @deprecated Replaced with RTE_PCI_ANY_ID */ 103 #define PCI_ANY_ID RTE_DEPRECATED(PCI_ANY_ID) RTE_PCI_ANY_ID 104 #define RTE_CLASS_ANY_ID (0xffffff) 105 106 /** 107 * Utility function to write a pci device name, this device name can later be 108 * used to retrieve the corresponding rte_pci_addr using eal_parse_pci_* 109 * BDF helpers. 110 * 111 * @param addr 112 * The PCI Bus-Device-Function address 113 * @param output 114 * The output buffer string 115 * @param size 116 * The output buffer size 117 */ 118 void rte_pci_device_name(const struct rte_pci_addr *addr, 119 char *output, size_t size); 120 121 /** 122 * Utility function to compare two PCI device addresses. 123 * 124 * @param addr 125 * The PCI Bus-Device-Function address to compare 126 * @param addr2 127 * The PCI Bus-Device-Function address to compare 128 * @return 129 * 0 on equal PCI address. 130 * Positive on addr is greater than addr2. 131 * Negative on addr is less than addr2, or error. 132 */ 133 int rte_pci_addr_cmp(const struct rte_pci_addr *addr, 134 const struct rte_pci_addr *addr2); 135 136 137 /** 138 * Utility function to parse a string into a PCI location. 139 * 140 * @param str 141 * The string to parse 142 * @param addr 143 * The reference to the structure where the location 144 * is stored. 145 * @return 146 * 0 on success 147 * <0 otherwise 148 */ 149 int rte_pci_addr_parse(const char *str, struct rte_pci_addr *addr); 150 151 #ifdef __cplusplus 152 } 153 #endif 154 155 #endif /* _RTE_PCI_H_ */ 156