1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2015 Intel Corporation. 3 * Copyright 2013-2014 6WIND S.A. 4 */ 5 6 #ifndef _RTE_PCI_H_ 7 #define _RTE_PCI_H_ 8 9 /** 10 * @file 11 * 12 * RTE PCI Library 13 */ 14 15 #ifdef __cplusplus 16 extern "C" { 17 #endif 18 19 #include <stdio.h> 20 #include <inttypes.h> 21 #include <sys/types.h> 22 23 /* 24 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of 25 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of 26 * configuration space. 27 */ 28 #define RTE_PCI_CFG_SPACE_SIZE 256 29 #define RTE_PCI_CFG_SPACE_EXP_SIZE 4096 30 31 #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */ 32 #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */ 33 #define RTE_PCI_COMMAND 0x04 /* 16 bits */ 34 35 /* PCI Command Register */ 36 #define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */ 37 38 /* PCI Express capability registers */ 39 #define RTE_PCI_EXP_DEVCTL 8 /* Device Control */ 40 41 /* Extended Capabilities (PCI-X 2.0 and Express) */ 42 #define RTE_PCI_EXT_CAP_ID(header) (header & 0x0000ffff) 43 #define RTE_PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc) 44 45 #define RTE_PCI_EXT_CAP_ID_ERR 0x01 /* Advanced Error Reporting */ 46 #define RTE_PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */ 47 #define RTE_PCI_EXT_CAP_ID_SRIOV 0x10 /* SR-IOV*/ 48 49 /* Single Root I/O Virtualization */ 50 #define RTE_PCI_SRIOV_CAP 0x04 /* SR-IOV Capabilities */ 51 #define RTE_PCI_SRIOV_CTRL 0x08 /* SR-IOV Control */ 52 #define RTE_PCI_SRIOV_INITIAL_VF 0x0c /* Initial VFs */ 53 #define RTE_PCI_SRIOV_TOTAL_VF 0x0e /* Total VFs */ 54 #define RTE_PCI_SRIOV_NUM_VF 0x10 /* Number of VFs */ 55 #define RTE_PCI_SRIOV_FUNC_LINK 0x12 /* Function Dependency Link */ 56 #define RTE_PCI_SRIOV_VF_OFFSET 0x14 /* First VF Offset */ 57 #define RTE_PCI_SRIOV_VF_STRIDE 0x16 /* Following VF Stride */ 58 #define RTE_PCI_SRIOV_VF_DID 0x1a /* VF Device ID */ 59 #define RTE_PCI_SRIOV_SUP_PGSIZE 0x1c /* Supported Page Sizes */ 60 61 /** Formatting string for PCI device identifier: Ex: 0000:00:01.0 */ 62 #define PCI_PRI_FMT "%.4" PRIx32 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8 63 #define PCI_PRI_STR_SIZE sizeof("XXXXXXXX:XX:XX.X") 64 65 /** Short formatting string, without domain, for PCI device: Ex: 00:01.0 */ 66 #define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8 67 68 /** Nb. of values in PCI device identifier format string. */ 69 #define PCI_FMT_NVAL 4 70 71 /** Nb. of values in PCI resource format. */ 72 #define PCI_RESOURCE_FMT_NVAL 3 73 74 /** Maximum number of PCI resources. */ 75 #define PCI_MAX_RESOURCE 6 76 77 /** 78 * A structure describing an ID for a PCI driver. Each driver provides a 79 * table of these IDs for each device that it supports. 80 */ 81 struct rte_pci_id { 82 uint32_t class_id; /**< Class ID or RTE_CLASS_ANY_ID. */ 83 uint16_t vendor_id; /**< Vendor ID or RTE_PCI_ANY_ID. */ 84 uint16_t device_id; /**< Device ID or RTE_PCI_ANY_ID. */ 85 uint16_t subsystem_vendor_id; /**< Subsystem vendor ID or RTE_PCI_ANY_ID. */ 86 uint16_t subsystem_device_id; /**< Subsystem device ID or RTE_PCI_ANY_ID. */ 87 }; 88 89 /** 90 * A structure describing the location of a PCI device. 91 */ 92 struct rte_pci_addr { 93 uint32_t domain; /**< Device domain */ 94 uint8_t bus; /**< Device bus */ 95 uint8_t devid; /**< Device ID */ 96 uint8_t function; /**< Device function. */ 97 }; 98 99 /** Any PCI device identifier (vendor, device, ...) */ 100 #define RTE_PCI_ANY_ID (0xffff) 101 /** @deprecated Replaced with RTE_PCI_ANY_ID */ 102 #define PCI_ANY_ID RTE_DEPRECATED(PCI_ANY_ID) RTE_PCI_ANY_ID 103 #define RTE_CLASS_ANY_ID (0xffffff) 104 105 /** 106 * Utility function to write a pci device name, this device name can later be 107 * used to retrieve the corresponding rte_pci_addr using eal_parse_pci_* 108 * BDF helpers. 109 * 110 * @param addr 111 * The PCI Bus-Device-Function address 112 * @param output 113 * The output buffer string 114 * @param size 115 * The output buffer size 116 */ 117 void rte_pci_device_name(const struct rte_pci_addr *addr, 118 char *output, size_t size); 119 120 /** 121 * Utility function to compare two PCI device addresses. 122 * 123 * @param addr 124 * The PCI Bus-Device-Function address to compare 125 * @param addr2 126 * The PCI Bus-Device-Function address to compare 127 * @return 128 * 0 on equal PCI address. 129 * Positive on addr is greater than addr2. 130 * Negative on addr is less than addr2, or error. 131 */ 132 int rte_pci_addr_cmp(const struct rte_pci_addr *addr, 133 const struct rte_pci_addr *addr2); 134 135 136 /** 137 * Utility function to parse a string into a PCI location. 138 * 139 * @param str 140 * The string to parse 141 * @param addr 142 * The reference to the structure where the location 143 * is stored. 144 * @return 145 * 0 on success 146 * <0 otherwise 147 */ 148 int rte_pci_addr_parse(const char *str, struct rte_pci_addr *addr); 149 150 #ifdef __cplusplus 151 } 152 #endif 153 154 #endif /* _RTE_PCI_H_ */ 155