1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2015 Intel Corporation 3 */ 4 5 #ifndef _RTE_ETH_CTRL_H_ 6 #define _RTE_ETH_CTRL_H_ 7 8 #include <stdint.h> 9 #include <rte_common.h> 10 #include <rte_ether.h> 11 #include "rte_flow.h" 12 #include "rte_ethdev.h" 13 14 /** 15 * @deprecated Please use rte_flow API instead of this legacy one. 16 * @file 17 * 18 * Ethernet device features and related data structures used 19 * by control APIs should be defined in this file. 20 */ 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /** 27 * Define all structures for ntuple Filter type. 28 */ 29 30 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001 /**< If set, dst_ip is part of ntuple */ 31 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002 /**< If set, src_ip is part of ntuple */ 32 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004 /**< If set, dst_port is part of ntuple */ 33 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008 /**< If set, src_port is part of ntuple */ 34 #define RTE_NTUPLE_FLAGS_PROTO 0x0010 /**< If set, protocol is part of ntuple */ 35 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020 /**< If set, tcp flag is involved */ 36 37 #define RTE_5TUPLE_FLAGS ( \ 38 RTE_NTUPLE_FLAGS_DST_IP | \ 39 RTE_NTUPLE_FLAGS_SRC_IP | \ 40 RTE_NTUPLE_FLAGS_DST_PORT | \ 41 RTE_NTUPLE_FLAGS_SRC_PORT | \ 42 RTE_NTUPLE_FLAGS_PROTO) 43 44 #define RTE_2TUPLE_FLAGS ( \ 45 RTE_NTUPLE_FLAGS_DST_PORT | \ 46 RTE_NTUPLE_FLAGS_PROTO) 47 48 #define RTE_NTUPLE_TCP_FLAGS_MASK 0x3F /**< TCP flags filter can match. */ 49 50 /** 51 * A structure used to define the ntuple filter entry 52 * to support RTE_ETH_FILTER_NTUPLE data representation. 53 */ 54 struct rte_eth_ntuple_filter { 55 uint16_t flags; /**< Flags from RTE_NTUPLE_FLAGS_* */ 56 uint32_t dst_ip; /**< Destination IP address in big endian. */ 57 uint32_t dst_ip_mask; /**< Mask of destination IP address. */ 58 uint32_t src_ip; /**< Source IP address in big endian. */ 59 uint32_t src_ip_mask; /**< Mask of destination IP address. */ 60 uint16_t dst_port; /**< Destination port in big endian. */ 61 uint16_t dst_port_mask; /**< Mask of destination port. */ 62 uint16_t src_port; /**< Source Port in big endian. */ 63 uint16_t src_port_mask; /**< Mask of source port. */ 64 uint8_t proto; /**< L4 protocol. */ 65 uint8_t proto_mask; /**< Mask of L4 protocol. */ 66 /** tcp_flags only meaningful when the proto is TCP. 67 The packet matched above ntuple fields and contain 68 any set bit in tcp_flags will hit this filter. */ 69 uint8_t tcp_flags; 70 uint16_t priority; /**< seven levels (001b-111b), 111b is highest, 71 used when more than one filter matches. */ 72 uint16_t queue; /**< Queue assigned to when match*/ 73 }; 74 75 #define RTE_ETH_FDIR_MAX_FLEXLEN 16 /**< Max length of flexbytes. */ 76 #define RTE_ETH_INSET_SIZE_MAX 128 /**< Max length of input set. */ 77 78 /** 79 * Input set fields for Flow Director and Hash filters 80 */ 81 enum rte_eth_input_set_field { 82 RTE_ETH_INPUT_SET_UNKNOWN = 0, 83 84 /* L2 */ 85 RTE_ETH_INPUT_SET_L2_SRC_MAC = 1, 86 RTE_ETH_INPUT_SET_L2_DST_MAC, 87 RTE_ETH_INPUT_SET_L2_OUTER_VLAN, 88 RTE_ETH_INPUT_SET_L2_INNER_VLAN, 89 RTE_ETH_INPUT_SET_L2_ETHERTYPE, 90 91 /* L3 */ 92 RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129, 93 RTE_ETH_INPUT_SET_L3_DST_IP4, 94 RTE_ETH_INPUT_SET_L3_SRC_IP6, 95 RTE_ETH_INPUT_SET_L3_DST_IP6, 96 RTE_ETH_INPUT_SET_L3_IP4_TOS, 97 RTE_ETH_INPUT_SET_L3_IP4_PROTO, 98 RTE_ETH_INPUT_SET_L3_IP6_TC, 99 RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER, 100 RTE_ETH_INPUT_SET_L3_IP4_TTL, 101 RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS, 102 103 /* L4 */ 104 RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257, 105 RTE_ETH_INPUT_SET_L4_UDP_DST_PORT, 106 RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT, 107 RTE_ETH_INPUT_SET_L4_TCP_DST_PORT, 108 RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT, 109 RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT, 110 RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG, 111 112 /* Tunnel */ 113 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385, 114 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC, 115 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN, 116 RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY, 117 RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY, 118 119 /* Flexible Payload */ 120 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641, 121 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD, 122 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD, 123 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD, 124 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD, 125 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD, 126 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD, 127 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD, 128 129 RTE_ETH_INPUT_SET_DEFAULT = 65533, 130 RTE_ETH_INPUT_SET_NONE = 65534, 131 RTE_ETH_INPUT_SET_MAX = 65535, 132 }; 133 134 /** 135 * Filters input set operations 136 */ 137 enum rte_filter_input_set_op { 138 RTE_ETH_INPUT_SET_OP_UNKNOWN, 139 RTE_ETH_INPUT_SET_SELECT, /**< select input set */ 140 RTE_ETH_INPUT_SET_ADD, /**< add input set entry */ 141 RTE_ETH_INPUT_SET_OP_MAX 142 }; 143 144 145 /** 146 * A structure used to define the input set configuration for 147 * flow director and hash filters 148 */ 149 struct rte_eth_input_set_conf { 150 uint16_t flow_type; 151 uint16_t inset_size; 152 enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX]; 153 enum rte_filter_input_set_op op; 154 }; 155 156 /** 157 * A structure used to define the input for L2 flow 158 */ 159 struct rte_eth_l2_flow { 160 uint16_t ether_type; /**< Ether type in big endian */ 161 }; 162 163 /** 164 * A structure used to define the input for IPV4 flow 165 */ 166 struct rte_eth_ipv4_flow { 167 uint32_t src_ip; /**< IPv4 source address in big endian. */ 168 uint32_t dst_ip; /**< IPv4 destination address in big endian. */ 169 uint8_t tos; /**< Type of service to match. */ 170 uint8_t ttl; /**< Time to live to match. */ 171 uint8_t proto; /**< Protocol, next header in big endian. */ 172 }; 173 174 /** 175 * A structure used to define the input for IPV4 UDP flow 176 */ 177 struct rte_eth_udpv4_flow { 178 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 179 uint16_t src_port; /**< UDP source port in big endian. */ 180 uint16_t dst_port; /**< UDP destination port in big endian. */ 181 }; 182 183 /** 184 * A structure used to define the input for IPV4 TCP flow 185 */ 186 struct rte_eth_tcpv4_flow { 187 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 188 uint16_t src_port; /**< TCP source port in big endian. */ 189 uint16_t dst_port; /**< TCP destination port in big endian. */ 190 }; 191 192 /** 193 * A structure used to define the input for IPV4 SCTP flow 194 */ 195 struct rte_eth_sctpv4_flow { 196 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 197 uint16_t src_port; /**< SCTP source port in big endian. */ 198 uint16_t dst_port; /**< SCTP destination port in big endian. */ 199 uint32_t verify_tag; /**< Verify tag in big endian */ 200 }; 201 202 /** 203 * A structure used to define the input for IPV6 flow 204 */ 205 struct rte_eth_ipv6_flow { 206 uint32_t src_ip[4]; /**< IPv6 source address in big endian. */ 207 uint32_t dst_ip[4]; /**< IPv6 destination address in big endian. */ 208 uint8_t tc; /**< Traffic class to match. */ 209 uint8_t proto; /**< Protocol, next header to match. */ 210 uint8_t hop_limits; /**< Hop limits to match. */ 211 }; 212 213 /** 214 * A structure used to define the input for IPV6 UDP flow 215 */ 216 struct rte_eth_udpv6_flow { 217 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 218 uint16_t src_port; /**< UDP source port in big endian. */ 219 uint16_t dst_port; /**< UDP destination port in big endian. */ 220 }; 221 222 /** 223 * A structure used to define the input for IPV6 TCP flow 224 */ 225 struct rte_eth_tcpv6_flow { 226 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 227 uint16_t src_port; /**< TCP source port to in big endian. */ 228 uint16_t dst_port; /**< TCP destination port in big endian. */ 229 }; 230 231 /** 232 * A structure used to define the input for IPV6 SCTP flow 233 */ 234 struct rte_eth_sctpv6_flow { 235 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 236 uint16_t src_port; /**< SCTP source port in big endian. */ 237 uint16_t dst_port; /**< SCTP destination port in big endian. */ 238 uint32_t verify_tag; /**< Verify tag in big endian. */ 239 }; 240 241 /** 242 * A structure used to define the input for MAC VLAN flow 243 */ 244 struct rte_eth_mac_vlan_flow { 245 struct rte_ether_addr mac_addr; /**< Mac address to match. */ 246 }; 247 248 /** 249 * Tunnel type for flow director. 250 */ 251 enum rte_eth_fdir_tunnel_type { 252 RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0, 253 RTE_FDIR_TUNNEL_TYPE_NVGRE, 254 RTE_FDIR_TUNNEL_TYPE_VXLAN, 255 }; 256 257 /** 258 * A structure used to define the input for tunnel flow, now it's VxLAN or 259 * NVGRE 260 */ 261 struct rte_eth_tunnel_flow { 262 enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */ 263 /** Tunnel ID to match. TNI, VNI... in big endian. */ 264 uint32_t tunnel_id; 265 struct rte_ether_addr mac_addr; /**< Mac address to match. */ 266 }; 267 268 /** 269 * An union contains the inputs for all types of flow 270 * Items in flows need to be in big endian 271 */ 272 union rte_eth_fdir_flow { 273 struct rte_eth_l2_flow l2_flow; 274 struct rte_eth_udpv4_flow udp4_flow; 275 struct rte_eth_tcpv4_flow tcp4_flow; 276 struct rte_eth_sctpv4_flow sctp4_flow; 277 struct rte_eth_ipv4_flow ip4_flow; 278 struct rte_eth_udpv6_flow udp6_flow; 279 struct rte_eth_tcpv6_flow tcp6_flow; 280 struct rte_eth_sctpv6_flow sctp6_flow; 281 struct rte_eth_ipv6_flow ipv6_flow; 282 struct rte_eth_mac_vlan_flow mac_vlan_flow; 283 struct rte_eth_tunnel_flow tunnel_flow; 284 }; 285 286 /** 287 * A structure used to contain extend input of flow 288 */ 289 struct rte_eth_fdir_flow_ext { 290 uint16_t vlan_tci; 291 uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN]; 292 /**< It is filled by the flexible payload to match. */ 293 uint8_t is_vf; /**< 1 for VF, 0 for port dev */ 294 uint16_t dst_id; /**< VF ID, available when is_vf is 1*/ 295 }; 296 297 /** 298 * A structure used to define the input for a flow director filter entry 299 */ 300 struct rte_eth_fdir_input { 301 uint16_t flow_type; 302 union rte_eth_fdir_flow flow; 303 /**< Flow fields to match, dependent on flow_type */ 304 struct rte_eth_fdir_flow_ext flow_ext; 305 /**< Additional fields to match */ 306 }; 307 308 /** 309 * Behavior will be taken if FDIR match 310 */ 311 enum rte_eth_fdir_behavior { 312 RTE_ETH_FDIR_ACCEPT = 0, 313 RTE_ETH_FDIR_REJECT, 314 RTE_ETH_FDIR_PASSTHRU, 315 }; 316 317 /** 318 * Flow director report status 319 * It defines what will be reported if FDIR entry is matched. 320 */ 321 enum rte_eth_fdir_status { 322 RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */ 323 RTE_ETH_FDIR_REPORT_ID, /**< Only report FD ID. */ 324 RTE_ETH_FDIR_REPORT_ID_FLEX_4, /**< Report FD ID and 4 flex bytes. */ 325 RTE_ETH_FDIR_REPORT_FLEX_8, /**< Report 8 flex bytes. */ 326 }; 327 328 /** 329 * A structure used to define an action when match FDIR packet filter. 330 */ 331 struct rte_eth_fdir_action { 332 uint16_t rx_queue; /**< Queue assigned to if FDIR match. */ 333 enum rte_eth_fdir_behavior behavior; /**< Behavior will be taken */ 334 enum rte_eth_fdir_status report_status; /**< Status report option */ 335 uint8_t flex_off; 336 /**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or 337 RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported 338 flex bytes start from in flexible payload. */ 339 }; 340 341 /** 342 * A structure used to define the flow director filter entry. 343 */ 344 struct rte_eth_fdir_filter { 345 uint32_t soft_id; 346 /**< ID, an unique value is required when deal with FDIR entry */ 347 struct rte_eth_fdir_input input; /**< Input set */ 348 struct rte_eth_fdir_action action; /**< Action taken when match */ 349 }; 350 351 /** 352 * A structure used to configure FDIR masks that are used by the device 353 * to match the various fields of Rx packet headers. 354 */ 355 struct rte_eth_fdir_masks { 356 uint16_t vlan_tci_mask; /**< Bit mask for vlan_tci in big endian */ 357 /** Bit mask for ipv4 flow in big endian. */ 358 struct rte_eth_ipv4_flow ipv4_mask; 359 /** Bit mask for ipv6 flow in big endian. */ 360 struct rte_eth_ipv6_flow ipv6_mask; 361 /** Bit mask for L4 source port in big endian. */ 362 uint16_t src_port_mask; 363 /** Bit mask for L4 destination port in big endian. */ 364 uint16_t dst_port_mask; 365 /** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the 366 first byte on the wire */ 367 uint8_t mac_addr_byte_mask; 368 /** Bit mask for tunnel ID in big endian. */ 369 uint32_t tunnel_id_mask; 370 uint8_t tunnel_type_mask; /**< 1 - Match tunnel type, 371 0 - Ignore tunnel type. */ 372 }; 373 374 /** 375 * Payload type 376 */ 377 enum rte_eth_payload_type { 378 RTE_ETH_PAYLOAD_UNKNOWN = 0, 379 RTE_ETH_RAW_PAYLOAD, 380 RTE_ETH_L2_PAYLOAD, 381 RTE_ETH_L3_PAYLOAD, 382 RTE_ETH_L4_PAYLOAD, 383 RTE_ETH_PAYLOAD_MAX = 8, 384 }; 385 386 /** 387 * A structure used to select bytes extracted from the protocol layers to 388 * flexible payload for filter 389 */ 390 struct rte_eth_flex_payload_cfg { 391 enum rte_eth_payload_type type; /**< Payload type */ 392 uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN]; 393 /**< Offset in bytes from the beginning of packet's payload 394 src_offset[i] indicates the flexbyte i's offset in original 395 packet payload. This value should be less than 396 flex_payload_limit in struct rte_eth_fdir_info.*/ 397 }; 398 399 /** 400 * A structure used to define FDIR masks for flexible payload 401 * for each flow type 402 */ 403 struct rte_eth_fdir_flex_mask { 404 uint16_t flow_type; 405 uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN]; 406 /**< Mask for the whole flexible payload */ 407 }; 408 409 /** 410 * A structure used to define all flexible payload related setting 411 * include flex payload and flex mask 412 */ 413 struct rte_eth_fdir_flex_conf { 414 uint16_t nb_payloads; /**< The number of following payload cfg */ 415 uint16_t nb_flexmasks; /**< The number of following mask */ 416 struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX]; 417 /**< Flex payload configuration for each payload type */ 418 struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX]; 419 /**< Flex mask configuration for each flow type */ 420 }; 421 422 /** 423 * Flow Director setting modes: none, signature or perfect. 424 */ 425 enum rte_fdir_mode { 426 RTE_FDIR_MODE_NONE = 0, /**< Disable FDIR support. */ 427 RTE_FDIR_MODE_SIGNATURE, /**< Enable FDIR signature filter mode. */ 428 RTE_FDIR_MODE_PERFECT, /**< Enable FDIR perfect filter mode. */ 429 RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */ 430 RTE_FDIR_MODE_PERFECT_TUNNEL, /**< Enable FDIR filter mode - tunnel. */ 431 }; 432 433 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t)) 434 #define RTE_FLOW_MASK_ARRAY_SIZE \ 435 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT) 436 437 /** 438 * A structure used to get the information of flow director filter. 439 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation. 440 * It includes the mode, flexible payload configuration information, 441 * capabilities and supported flow types, flexible payload characters. 442 * It can be gotten to help taking specific configurations per device. 443 */ 444 struct rte_eth_fdir_info { 445 enum rte_fdir_mode mode; /**< Flow director mode */ 446 struct rte_eth_fdir_masks mask; 447 /** Flex payload configuration information */ 448 struct rte_eth_fdir_flex_conf flex_conf; 449 uint32_t guarant_spc; /**< Guaranteed spaces.*/ 450 uint32_t best_spc; /**< Best effort spaces.*/ 451 /** Bit mask for every supported flow type. */ 452 uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE]; 453 uint32_t max_flexpayload; /**< Total flex payload in bytes. */ 454 /** Flexible payload unit in bytes. Size and alignments of all flex 455 payload segments should be multiplies of this value. */ 456 uint32_t flex_payload_unit; 457 /** Max number of flexible payload continuous segments. 458 Each segment should be a multiple of flex_payload_unit.*/ 459 uint32_t max_flex_payload_segment_num; 460 /** Maximum src_offset in bytes allowed. It indicates that 461 src_offset[i] in struct rte_eth_flex_payload_cfg should be less 462 than this value. */ 463 uint16_t flex_payload_limit; 464 /** Flex bitmask unit in bytes. Size of flex bitmasks should be a 465 multiply of this value. */ 466 uint32_t flex_bitmask_unit; 467 /** Max supported size of flex bitmasks in flex_bitmask_unit */ 468 uint32_t max_flex_bitmask_num; 469 }; 470 471 /** 472 * A structure used to define the statistics of flow director. 473 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation. 474 */ 475 struct rte_eth_fdir_stats { 476 uint32_t collision; /**< Number of filters with collision. */ 477 uint32_t free; /**< Number of free filters. */ 478 uint32_t maxhash; 479 /**< The lookup hash value of the added filter that updated the value 480 of the MAXLEN field */ 481 uint32_t maxlen; /**< Longest linked list of filters. */ 482 uint64_t add; /**< Number of added filters. */ 483 uint64_t remove; /**< Number of removed filters. */ 484 uint64_t f_add; /**< Number of failed added filters. */ 485 uint64_t f_remove; /**< Number of failed removed filters. */ 486 uint32_t guarant_cnt; /**< Number of filters in guaranteed spaces. */ 487 uint32_t best_cnt; /**< Number of filters in best effort spaces. */ 488 }; 489 490 #ifdef __cplusplus 491 } 492 #endif 493 494 #endif /* _RTE_ETH_CTRL_H_ */ 495