1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2015 Intel Corporation 3 */ 4 5 #ifndef _RTE_PREFETCH_X86_64_H_ 6 #define _RTE_PREFETCH_X86_64_H_ 7 8 #ifdef __cplusplus 9 extern "C" { 10 #endif 11 12 #include <rte_common.h> 13 #include "generic/rte_prefetch.h" 14 15 static inline void rte_prefetch0(const volatile void *p) 16 { 17 asm volatile ("prefetcht0 %[p]" : : [p] "m" (*(const volatile char *)p)); 18 } 19 20 static inline void rte_prefetch1(const volatile void *p) 21 { 22 asm volatile ("prefetcht1 %[p]" : : [p] "m" (*(const volatile char *)p)); 23 } 24 25 static inline void rte_prefetch2(const volatile void *p) 26 { 27 asm volatile ("prefetcht2 %[p]" : : [p] "m" (*(const volatile char *)p)); 28 } 29 30 static inline void rte_prefetch_non_temporal(const volatile void *p) 31 { 32 asm volatile ("prefetchnta %[p]" : : [p] "m" (*(const volatile char *)p)); 33 } 34 35 /* 36 * We use raw byte codes for now as only the newest compiler 37 * versions support this instruction natively. 38 */ 39 __rte_experimental 40 static inline void 41 rte_cldemote(const volatile void *p) 42 { 43 asm volatile(".byte 0x0f, 0x1c, 0x06" :: "S" (p)); 44 } 45 46 #ifdef __cplusplus 47 } 48 #endif 49 50 #endif /* _RTE_PREFETCH_X86_64_H_ */ 51