1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2015 Intel Corporation 3 */ 4 5 #ifndef _RTE_PREFETCH_X86_64_H_ 6 #define _RTE_PREFETCH_X86_64_H_ 7 8 #ifdef __cplusplus 9 extern "C" { 10 #endif 11 12 #include <rte_compat.h> 13 #include <rte_common.h> 14 #include "generic/rte_prefetch.h" 15 16 static inline void rte_prefetch0(const volatile void *p) 17 { 18 asm volatile ("prefetcht0 %[p]" : : [p] "m" (*(const volatile char *)p)); 19 } 20 21 static inline void rte_prefetch1(const volatile void *p) 22 { 23 asm volatile ("prefetcht1 %[p]" : : [p] "m" (*(const volatile char *)p)); 24 } 25 26 static inline void rte_prefetch2(const volatile void *p) 27 { 28 asm volatile ("prefetcht2 %[p]" : : [p] "m" (*(const volatile char *)p)); 29 } 30 31 static inline void rte_prefetch_non_temporal(const volatile void *p) 32 { 33 asm volatile ("prefetchnta %[p]" : : [p] "m" (*(const volatile char *)p)); 34 } 35 36 /* 37 * We use raw byte codes for now as only the newest compiler 38 * versions support this instruction natively. 39 */ 40 __rte_experimental 41 static inline void 42 rte_cldemote(const volatile void *p) 43 { 44 asm volatile(".byte 0x0f, 0x1c, 0x06" :: "S" (p)); 45 } 46 47 #ifdef __cplusplus 48 } 49 #endif 50 51 #endif /* _RTE_PREFETCH_X86_64_H_ */ 52