129631ee5SMin Zhou /*
229631ee5SMin Zhou * SPDX-License-Identifier: BSD-3-Clause
329631ee5SMin Zhou * Copyright(c) 2022 Loongson Technology Corporation Limited
429631ee5SMin Zhou */
529631ee5SMin Zhou
629631ee5SMin Zhou #include "rte_cpuflags.h"
729631ee5SMin Zhou
829631ee5SMin Zhou #include <elf.h>
929631ee5SMin Zhou #include <fcntl.h>
1029631ee5SMin Zhou #include <assert.h>
1129631ee5SMin Zhou #include <unistd.h>
1229631ee5SMin Zhou #include <string.h>
1329631ee5SMin Zhou
1429631ee5SMin Zhou /* Symbolic values for the entries in the auxiliary table */
1529631ee5SMin Zhou #define AT_HWCAP 16
1629631ee5SMin Zhou
1729631ee5SMin Zhou /* software based registers */
1829631ee5SMin Zhou enum cpu_register_t {
1929631ee5SMin Zhou REG_NONE = 0,
2029631ee5SMin Zhou REG_HWCAP,
2129631ee5SMin Zhou REG_MAX
2229631ee5SMin Zhou };
2329631ee5SMin Zhou
2429631ee5SMin Zhou typedef uint32_t hwcap_registers_t[REG_MAX];
2529631ee5SMin Zhou
2629631ee5SMin Zhou struct feature_entry {
2729631ee5SMin Zhou uint32_t reg;
2829631ee5SMin Zhou uint32_t bit;
2929631ee5SMin Zhou #define CPU_FLAG_NAME_MAX_LEN 64
3029631ee5SMin Zhou char name[CPU_FLAG_NAME_MAX_LEN];
3129631ee5SMin Zhou };
3229631ee5SMin Zhou
3329631ee5SMin Zhou #define FEAT_DEF(name, reg, bit) \
3429631ee5SMin Zhou [RTE_CPUFLAG_##name] = {reg, bit, #name},
3529631ee5SMin Zhou
3629631ee5SMin Zhou const struct feature_entry rte_cpu_feature_table[] = {
3729631ee5SMin Zhou FEAT_DEF(CPUCFG, REG_HWCAP, 0)
3829631ee5SMin Zhou FEAT_DEF(LAM, REG_HWCAP, 1)
3929631ee5SMin Zhou FEAT_DEF(UAL, REG_HWCAP, 2)
4029631ee5SMin Zhou FEAT_DEF(FPU, REG_HWCAP, 3)
4129631ee5SMin Zhou FEAT_DEF(LSX, REG_HWCAP, 4)
4229631ee5SMin Zhou FEAT_DEF(LASX, REG_HWCAP, 5)
4329631ee5SMin Zhou FEAT_DEF(CRC32, REG_HWCAP, 6)
4429631ee5SMin Zhou FEAT_DEF(COMPLEX, REG_HWCAP, 7)
4529631ee5SMin Zhou FEAT_DEF(CRYPTO, REG_HWCAP, 8)
4629631ee5SMin Zhou FEAT_DEF(LVZ, REG_HWCAP, 9)
4729631ee5SMin Zhou FEAT_DEF(LBT_X86, REG_HWCAP, 10)
4829631ee5SMin Zhou FEAT_DEF(LBT_ARM, REG_HWCAP, 11)
4929631ee5SMin Zhou FEAT_DEF(LBT_MIPS, REG_HWCAP, 12)
5029631ee5SMin Zhou };
5129631ee5SMin Zhou
5229631ee5SMin Zhou /*
5329631ee5SMin Zhou * Read AUXV software register and get cpu features for LoongArch
5429631ee5SMin Zhou */
5529631ee5SMin Zhou static void
rte_cpu_get_features(hwcap_registers_t out)5629631ee5SMin Zhou rte_cpu_get_features(hwcap_registers_t out)
5729631ee5SMin Zhou {
5829631ee5SMin Zhou out[REG_HWCAP] = rte_cpu_getauxval(AT_HWCAP);
5929631ee5SMin Zhou }
6029631ee5SMin Zhou
6129631ee5SMin Zhou /*
6229631ee5SMin Zhou * Checks if a particular flag is available on current machine.
6329631ee5SMin Zhou */
6429631ee5SMin Zhou int
rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)6529631ee5SMin Zhou rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)
6629631ee5SMin Zhou {
6729631ee5SMin Zhou const struct feature_entry *feat;
6829631ee5SMin Zhou hwcap_registers_t regs = {0};
6929631ee5SMin Zhou
70*48c33e8cSSivaprasad Tummala if ((unsigned int)feature >= RTE_DIM(rte_cpu_feature_table))
7129631ee5SMin Zhou return -ENOENT;
7229631ee5SMin Zhou
7329631ee5SMin Zhou feat = &rte_cpu_feature_table[feature];
7429631ee5SMin Zhou if (feat->reg == REG_NONE)
7529631ee5SMin Zhou return -EFAULT;
7629631ee5SMin Zhou
7729631ee5SMin Zhou rte_cpu_get_features(regs);
7829631ee5SMin Zhou return (regs[feat->reg] >> feat->bit) & 1;
7929631ee5SMin Zhou }
8029631ee5SMin Zhou
8129631ee5SMin Zhou const char *
rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)8229631ee5SMin Zhou rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)
8329631ee5SMin Zhou {
84*48c33e8cSSivaprasad Tummala if ((unsigned int)feature >= RTE_DIM(rte_cpu_feature_table))
8529631ee5SMin Zhou return NULL;
8629631ee5SMin Zhou return rte_cpu_feature_table[feature].name;
8729631ee5SMin Zhou }
8829631ee5SMin Zhou
8929631ee5SMin Zhou void
rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics * intrinsics)9029631ee5SMin Zhou rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)
9129631ee5SMin Zhou {
9229631ee5SMin Zhou memset(intrinsics, 0, sizeof(*intrinsics));
9329631ee5SMin Zhou }
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