199a2dd95SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 299a2dd95SBruce Richardson * Copyright(c) 2010-2019 Intel Corporation 399a2dd95SBruce Richardson */ 499a2dd95SBruce Richardson 599a2dd95SBruce Richardson #ifndef _RTE_OS_H_ 699a2dd95SBruce Richardson #define _RTE_OS_H_ 799a2dd95SBruce Richardson 899a2dd95SBruce Richardson /** 999a2dd95SBruce Richardson * This header should contain any definition 1099a2dd95SBruce Richardson * which is not supported natively or named differently in FreeBSD. 1199a2dd95SBruce Richardson */ 1299a2dd95SBruce Richardson 1399a2dd95SBruce Richardson #include <pthread_np.h> 14f1f6ebc0SWilliam Tu #include <sys/queue.h> 15f1f6ebc0SWilliam Tu 16f1f6ebc0SWilliam Tu /* These macros are compatible with system's sys/queue.h. */ 17f1f6ebc0SWilliam Tu #define RTE_TAILQ_HEAD(name, type) TAILQ_HEAD(name, type) 18f1f6ebc0SWilliam Tu #define RTE_TAILQ_ENTRY(type) TAILQ_ENTRY(type) 19f1f6ebc0SWilliam Tu #define RTE_TAILQ_FOREACH(var, head, field) TAILQ_FOREACH(var, head, field) 20f1f6ebc0SWilliam Tu #define RTE_TAILQ_FIRST(head) TAILQ_FIRST(head) 21f1f6ebc0SWilliam Tu #define RTE_TAILQ_NEXT(elem, field) TAILQ_NEXT(elem, field) 22f1f6ebc0SWilliam Tu #define RTE_STAILQ_HEAD(name, type) STAILQ_HEAD(name, type) 23f1f6ebc0SWilliam Tu #define RTE_STAILQ_ENTRY(type) STAILQ_ENTRY(type) 2499a2dd95SBruce Richardson 2599a2dd95SBruce Richardson typedef cpuset_t rte_cpuset_t; 2699a2dd95SBruce Richardson #define RTE_HAS_CPUSET 27*2f51bc9cSDavid Marchand 28*2f51bc9cSDavid Marchand #ifdef RTE_EAL_FREEBSD_CPUSET_LEGACY 2999a2dd95SBruce Richardson #define RTE_CPU_AND(dst, src1, src2) do \ 3099a2dd95SBruce Richardson { \ 3199a2dd95SBruce Richardson cpuset_t tmp; \ 3299a2dd95SBruce Richardson CPU_COPY(src1, &tmp); \ 3399a2dd95SBruce Richardson CPU_AND(&tmp, src2); \ 3499a2dd95SBruce Richardson CPU_COPY(&tmp, dst); \ 3599a2dd95SBruce Richardson } while (0) 3699a2dd95SBruce Richardson #define RTE_CPU_OR(dst, src1, src2) do \ 3799a2dd95SBruce Richardson { \ 3899a2dd95SBruce Richardson cpuset_t tmp; \ 3999a2dd95SBruce Richardson CPU_COPY(src1, &tmp); \ 4099a2dd95SBruce Richardson CPU_OR(&tmp, src2); \ 4199a2dd95SBruce Richardson CPU_COPY(&tmp, dst); \ 4299a2dd95SBruce Richardson } while (0) 4399a2dd95SBruce Richardson #define RTE_CPU_FILL(set) CPU_FILL(set) 4499a2dd95SBruce Richardson 4599a2dd95SBruce Richardson /* In FreeBSD 13 CPU_NAND macro is CPU_ANDNOT */ 4699a2dd95SBruce Richardson #ifdef CPU_NAND 4799a2dd95SBruce Richardson #define RTE_CPU_NOT(dst, src) do \ 4899a2dd95SBruce Richardson { \ 4999a2dd95SBruce Richardson cpuset_t tmp; \ 5099a2dd95SBruce Richardson CPU_FILL(&tmp); \ 5199a2dd95SBruce Richardson CPU_NAND(&tmp, src); \ 5299a2dd95SBruce Richardson CPU_COPY(&tmp, dst); \ 5399a2dd95SBruce Richardson } while (0) 5499a2dd95SBruce Richardson #else 5599a2dd95SBruce Richardson #define RTE_CPU_NOT(dst, src) do \ 5699a2dd95SBruce Richardson { \ 5799a2dd95SBruce Richardson cpuset_t tmp; \ 5899a2dd95SBruce Richardson CPU_FILL(&tmp); \ 5999a2dd95SBruce Richardson CPU_ANDNOT(&tmp, src); \ 6099a2dd95SBruce Richardson CPU_COPY(&tmp, dst); \ 6199a2dd95SBruce Richardson } while (0) 62*2f51bc9cSDavid Marchand #endif /* CPU_NAND */ 63*2f51bc9cSDavid Marchand 64*2f51bc9cSDavid Marchand #else /* RTE_EAL_FREEBSD_CPUSET_LEGACY */ 65*2f51bc9cSDavid Marchand 66*2f51bc9cSDavid Marchand #define RTE_CPU_AND CPU_AND 67*2f51bc9cSDavid Marchand #define RTE_CPU_OR CPU_OR 68*2f51bc9cSDavid Marchand #define RTE_CPU_FILL CPU_FILL 69*2f51bc9cSDavid Marchand #define RTE_CPU_NOT(dst, src) do { \ 70*2f51bc9cSDavid Marchand cpu_set_t tmp; \ 71*2f51bc9cSDavid Marchand CPU_FILL(&tmp); \ 72*2f51bc9cSDavid Marchand CPU_XOR(dst, src, &tmp); \ 73*2f51bc9cSDavid Marchand } while (0) 74*2f51bc9cSDavid Marchand 75*2f51bc9cSDavid Marchand #endif /* RTE_EAL_FREEBSD_CPUSET_LEGACY */ 7699a2dd95SBruce Richardson 7799a2dd95SBruce Richardson #endif /* _RTE_OS_H_ */ 78