1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #ifndef _RTE_BBDEV_OP_H_ 6 #define _RTE_BBDEV_OP_H_ 7 8 /** 9 * @file rte_bbdev_op.h 10 * 11 * Defines wireless base band layer 1 operations and capabilities 12 */ 13 14 #ifdef __cplusplus 15 extern "C" { 16 #endif 17 18 #include <stdint.h> 19 20 #include <rte_compat.h> 21 #include <rte_common.h> 22 #include <rte_mbuf.h> 23 #include <rte_memory.h> 24 #include <rte_mempool.h> 25 26 /* Number of columns in sub-block interleaver (36.212, section 5.1.4.1.1) */ 27 #define RTE_BBDEV_TURBO_C_SUBBLOCK (32) 28 /* Maximum size of Transport Block (36.213, Table, Table 7.1.7.2.5-1) */ 29 #define RTE_BBDEV_TURBO_MAX_TB_SIZE (391656) 30 /* Maximum size of Code Block (36.212, Table 5.1.3-3) */ 31 #define RTE_BBDEV_TURBO_MAX_CB_SIZE (6144) 32 /* Maximum size of Code Block */ 33 #define RTE_BBDEV_LDPC_MAX_CB_SIZE (8448) 34 /* Minimum size of Code Block */ 35 #define RTE_BBDEV_LDPC_MIN_CB_SIZE (40) 36 /* Maximum E size we can manage with default mbuf */ 37 #define RTE_BBDEV_LDPC_E_MAX_MBUF (64000) 38 /* Minimum size of Code Block (36.212, Table 5.1.3-3) */ 39 #define RTE_BBDEV_TURBO_MIN_CB_SIZE (40) 40 /* Maximum size of circular buffer */ 41 #define RTE_BBDEV_TURBO_MAX_KW (18528) 42 /* 43 * Turbo: Maximum number of Code Blocks in Transport Block. It is calculated 44 * based on maximum size of one Code Block and one Transport Block 45 * (considering CRC24A and CRC24B): 46 * (391656 + 24) / (6144 - 24) = 64 47 */ 48 #define RTE_BBDEV_TURBO_MAX_CODE_BLOCKS (64) 49 /* LDPC: Maximum number of Code Blocks in Transport Block.*/ 50 #define RTE_BBDEV_LDPC_MAX_CODE_BLOCKS (256) 51 /* 12 CS maximum */ 52 #define RTE_BBDEV_MAX_CS_2 (6) 53 #define RTE_BBDEV_MAX_CS (12) 54 /* MLD-TS up to 4 layers */ 55 #define RTE_BBDEV_MAX_MLD_LAYERS (4) 56 /* 12 SB per RB */ 57 #define RTE_BBDEV_SCPERRB (12) 58 59 /* 60 * Maximum size to be used to manage the enum rte_bbdev_op_type 61 * including padding for future enum insertion. 62 * The enum values must be explicitly kept smaller or equal to this padded maximum size. 63 */ 64 #define RTE_BBDEV_OP_TYPE_SIZE_MAX 8 65 66 /** Flags for turbo decoder operation and capability structure */ 67 enum rte_bbdev_op_td_flag_bitmasks { 68 /** If sub block de-interleaving is to be performed. */ 69 RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE = (1ULL << 0), 70 /** To use CRC Type 24B (otherwise use CRC Type 24A). */ 71 RTE_BBDEV_TURBO_CRC_TYPE_24B = (1ULL << 1), 72 /** If turbo equalization is to be performed. */ 73 RTE_BBDEV_TURBO_EQUALIZER = (1ULL << 2), 74 /** If set, saturate soft output to +/-127 */ 75 RTE_BBDEV_TURBO_SOFT_OUT_SATURATE = (1ULL << 3), 76 /** Set to 1 to start iteration from even, else odd; one iteration = 77 * max_iteration + 0.5 78 */ 79 RTE_BBDEV_TURBO_HALF_ITERATION_EVEN = (1ULL << 4), 80 /** If 0, TD stops after CRC matches; else if 1, runs to end of next 81 * odd iteration after CRC matches 82 */ 83 RTE_BBDEV_TURBO_CONTINUE_CRC_MATCH = (1ULL << 5), 84 /** Set if soft output is required to be output */ 85 RTE_BBDEV_TURBO_SOFT_OUTPUT = (1ULL << 6), 86 /** Set to enable early termination mode */ 87 RTE_BBDEV_TURBO_EARLY_TERMINATION = (1ULL << 7), 88 /** Set if a device supports decoder dequeue interrupts */ 89 RTE_BBDEV_TURBO_DEC_INTERRUPTS = (1ULL << 9), 90 /** Set if positive LLR encoded input is supported. Positive LLR value 91 * represents the level of confidence for bit '1', and vice versa for 92 * bit '0'. 93 * This is mutually exclusive with RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN 94 * when used to formalize the input data format. 95 */ 96 RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN = (1ULL << 10), 97 /** Set if negative LLR encoded input is supported. Negative LLR value 98 * represents the level of confidence for bit '1', and vice versa for 99 * bit '0'. 100 * This is mutually exclusive with RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN 101 * when used to formalize the input data format. 102 */ 103 RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN = (1ULL << 11), 104 /** Set if positive LLR soft output is supported. Positive LLR value 105 * represents the level of confidence for bit '1', and vice versa for 106 * bit '0'. 107 * This is mutually exclusive with 108 * RTE_BBDEV_TURBO_NEG_LLR_1_BIT_SOFT_OUT when used to formalize 109 * the input data format. 110 */ 111 RTE_BBDEV_TURBO_POS_LLR_1_BIT_SOFT_OUT = (1ULL << 12), 112 /** Set if negative LLR soft output is supported. Negative LLR value 113 * represents the level of confidence for bit '1', and vice versa for 114 * bit '0'. 115 * This is mutually exclusive with 116 * RTE_BBDEV_TURBO_POS_LLR_1_BIT_SOFT_OUT when used to formalize the 117 * input data format. 118 */ 119 RTE_BBDEV_TURBO_NEG_LLR_1_BIT_SOFT_OUT = (1ULL << 13), 120 /** Set if driver supports flexible parallel MAP engine decoding. If 121 * not supported, num_maps (number of MAP engines) argument is unusable. 122 */ 123 RTE_BBDEV_TURBO_MAP_DEC = (1ULL << 14), 124 /** Set if a device supports scatter-gather functionality */ 125 RTE_BBDEV_TURBO_DEC_SCATTER_GATHER = (1ULL << 15), 126 /** Set to keep CRC24B bits appended while decoding. Only usable when 127 * decoding Transport Block mode. 128 */ 129 RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP = (1ULL << 16), 130 /** Set to drop CRC24B bits not to be appended while decoding. 131 */ 132 RTE_BBDEV_TURBO_DEC_CRC_24B_DROP = (1ULL << 17) 133 }; 134 135 136 /** Flags for turbo encoder operation and capability structure */ 137 enum rte_bbdev_op_te_flag_bitmasks { 138 /** Ignore rv_index and set K0 = 0 */ 139 RTE_BBDEV_TURBO_RV_INDEX_BYPASS = (1ULL << 0), 140 /** If rate matching is to be performed */ 141 RTE_BBDEV_TURBO_RATE_MATCH = (1ULL << 1), 142 /** This bit must be set to enable CRC-24B generation */ 143 RTE_BBDEV_TURBO_CRC_24B_ATTACH = (1ULL << 2), 144 /** This bit must be set to enable CRC-24A generation */ 145 RTE_BBDEV_TURBO_CRC_24A_ATTACH = (1ULL << 3), 146 /** Set if a device supports encoder dequeue interrupts */ 147 RTE_BBDEV_TURBO_ENC_INTERRUPTS = (1ULL << 4), 148 /** Set if a device supports scatter-gather functionality */ 149 RTE_BBDEV_TURBO_ENC_SCATTER_GATHER = (1ULL << 5) 150 }; 151 152 /** Flags for LDPC decoder operation and capability structure */ 153 enum rte_bbdev_op_ldpcdec_flag_bitmasks { 154 /** Set for transport block CRC-24A checking */ 155 RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK = (1ULL << 0), 156 /** Set for code block CRC-24B checking */ 157 RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK = (1ULL << 1), 158 /** Set to drop the last CRC bits decoding output */ 159 RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP = (1ULL << 2), 160 /** Set for transport block CRC-16 checking */ 161 RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK = (1ULL << 3), 162 /** Set for bit-level de-interleaver bypass on Rx stream. */ 163 RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS = (1ULL << 4), 164 /** Set for HARQ combined input stream enable. */ 165 RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE = (1ULL << 5), 166 /** Set for HARQ combined output stream enable. */ 167 RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE = (1ULL << 6), 168 /** Set for LDPC decoder bypass. 169 * RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE must be set. 170 */ 171 RTE_BBDEV_LDPC_DECODE_BYPASS = (1ULL << 7), 172 /** Set for soft-output stream enable */ 173 RTE_BBDEV_LDPC_SOFT_OUT_ENABLE = (1ULL << 8), 174 /** Set for Rate-Matching bypass on soft-out stream. */ 175 RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS = (1ULL << 9), 176 /** Set for bit-level de-interleaver bypass on soft-output stream. */ 177 RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS = (1ULL << 10), 178 /** Set for iteration stopping on successful decode condition 179 * i.e. a successful syndrome check. 180 */ 181 RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE = (1ULL << 11), 182 /** Set if a device supports decoder dequeue interrupts. */ 183 RTE_BBDEV_LDPC_DEC_INTERRUPTS = (1ULL << 12), 184 /** Set if a device supports scatter-gather functionality. */ 185 RTE_BBDEV_LDPC_DEC_SCATTER_GATHER = (1ULL << 13), 186 /** Set if a device supports input/output HARQ compression. */ 187 RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION = (1ULL << 14), 188 /** Set if a device supports input LLR compression. */ 189 RTE_BBDEV_LDPC_LLR_COMPRESSION = (1ULL << 15), 190 /** Set if a device supports HARQ input from 191 * device's internal memory. 192 */ 193 RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE = (1ULL << 16), 194 /** Set if a device supports HARQ output to 195 * device's internal memory. 196 */ 197 RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE = (1ULL << 17), 198 /** Set if a device supports loop-back access to 199 * HARQ internal memory. Intended for troubleshooting. 200 */ 201 RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK = (1ULL << 18), 202 /** Set if a device includes LLR filler bits in the circular buffer 203 * for HARQ memory. If not set, it is assumed the filler bits are not 204 * in HARQ memory and handled directly by the LDPC decoder. 205 */ 206 RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 19), 207 /** Set if a device supports input/output HARQ 4bits compression. */ 208 RTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION = (1ULL << 20) 209 }; 210 211 /** Flags for LDPC encoder operation and capability structure */ 212 enum rte_bbdev_op_ldpcenc_flag_bitmasks { 213 /** Set for bit-level interleaver bypass on output stream. */ 214 RTE_BBDEV_LDPC_INTERLEAVER_BYPASS = (1ULL << 0), 215 /** If rate matching is to be performed */ 216 RTE_BBDEV_LDPC_RATE_MATCH = (1ULL << 1), 217 /** Set for transport block CRC-24A attach */ 218 RTE_BBDEV_LDPC_CRC_24A_ATTACH = (1ULL << 2), 219 /** Set for code block CRC-24B attach */ 220 RTE_BBDEV_LDPC_CRC_24B_ATTACH = (1ULL << 3), 221 /** Set for code block CRC-16 attach */ 222 RTE_BBDEV_LDPC_CRC_16_ATTACH = (1ULL << 4), 223 /** Set if a device supports encoder dequeue interrupts. */ 224 RTE_BBDEV_LDPC_ENC_INTERRUPTS = (1ULL << 5), 225 /** Set if a device supports scatter-gather functionality. */ 226 RTE_BBDEV_LDPC_ENC_SCATTER_GATHER = (1ULL << 6), 227 /** Set if a device supports concatenation of non byte aligned output */ 228 RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7) 229 }; 230 231 /** Flags for FFT operation and capability structure. */ 232 enum rte_bbdev_op_fft_flag_bitmasks { 233 /** Flexible windowing capability. */ 234 RTE_BBDEV_FFT_WINDOWING = (1ULL << 0), 235 /** Flexible adjustment of Cyclic Shift time offset. */ 236 RTE_BBDEV_FFT_CS_ADJUSTMENT = (1ULL << 1), 237 /** Set for bypass the DFT and get directly into iDFT input. */ 238 RTE_BBDEV_FFT_DFT_BYPASS = (1ULL << 2), 239 /** Set for bypass the IDFT and get directly the DFT output. */ 240 RTE_BBDEV_FFT_IDFT_BYPASS = (1ULL << 3), 241 /** Set for bypass time domain windowing. */ 242 RTE_BBDEV_FFT_WINDOWING_BYPASS = (1ULL << 4), 243 /** Set for optional power measurement on DFT output. */ 244 RTE_BBDEV_FFT_POWER_MEAS = (1ULL << 5), 245 /** Set if the input data used FP16 format. */ 246 RTE_BBDEV_FFT_FP16_INPUT = (1ULL << 6), 247 /** Set if the output data uses FP16 format. */ 248 RTE_BBDEV_FFT_FP16_OUTPUT = (1ULL << 7), 249 /** Flexible adjustment of Timing offset adjustment per CS. */ 250 RTE_BBDEV_FFT_TIMING_OFFSET_PER_CS = (1ULL << 8), 251 /** Flexible adjustment of Timing error correction per CS. */ 252 RTE_BBDEV_FFT_TIMING_ERROR = (1ULL << 9), 253 /** Set for optional frequency domain dewindowing. */ 254 RTE_BBDEV_FFT_DEWINDOWING = (1ULL << 10), 255 /** Flexible adjustment of frequency resampling mode. */ 256 RTE_BBDEV_FFT_FREQ_RESAMPLING = (1ULL << 11) 257 }; 258 259 /** Flags for MLDTS operation and capability structure */ 260 enum rte_bbdev_op_mldts_flag_bitmasks { 261 /** Set if the device supports C/R repetition options. */ 262 RTE_BBDEV_MLDTS_REP = (1ULL << 0), 263 }; 264 265 /** Flags for the Code Block/Transport block mode */ 266 enum rte_bbdev_op_cb_mode { 267 /** One operation is one or fraction of one transport block */ 268 RTE_BBDEV_TRANSPORT_BLOCK = 0, 269 /** One operation is one code block mode */ 270 RTE_BBDEV_CODE_BLOCK = 1, 271 }; 272 273 /** Data input and output buffer for BBDEV operations */ 274 struct rte_bbdev_op_data { 275 /** The mbuf data structure representing the data for BBDEV operation. 276 * 277 * This mbuf pointer can point to one Code Block (CB) data buffer or 278 * multiple CBs contiguously located next to each other. 279 * A Transport Block (TB) represents a whole piece of data that is 280 * divided into one or more CBs. Maximum number of CBs can be contained 281 * in one TB is defined by RTE_BBDEV_(TURBO/LDPC)_MAX_CODE_BLOCKS. 282 * 283 * An mbuf data structure cannot represent more than one TB. The 284 * smallest piece of data that can be contained in one mbuf is one CB. 285 * An mbuf can include one contiguous CB, subset of contiguous CBs that 286 * are belonging to one TB, or all contiguous CBs that are belonging to 287 * one TB. 288 * 289 * If a BBDEV PMD supports the extended capability "Scatter-Gather", 290 * then it is capable of collecting (gathering) non-contiguous 291 * (scattered) data from multiple locations in the memory. 292 * This capability is reported by the capability flags: 293 * - RTE_BBDEV_(TURBO/LDPC)_ENC_SCATTER_GATHER and 294 * - RTE_BBDEV_(TURBO/LDPC)_DEC_SCATTER_GATHER. 295 * Only if a BBDEV PMD supports this feature, chained mbuf data 296 * structures are accepted. A chained mbuf can represent one 297 * non-contiguous CB or multiple non-contiguous CBs. 298 * If BBDEV PMD does not support this feature, it will assume inbound 299 * mbuf data contains one segment. 300 * 301 * The output mbuf data though is always one segment, even if the input 302 * was a chained mbuf. 303 */ 304 struct rte_mbuf *data; 305 /** The starting point of the BBDEV (encode/decode) operation, 306 * in bytes. 307 * 308 * BBDEV starts to read data past this offset. 309 * In case of chained mbuf, this offset applies only to the first mbuf 310 * segment. 311 */ 312 uint32_t offset; 313 /** The total data length to be processed in one operation, in bytes. 314 * 315 * In case the mbuf data is representing one CB, this is the length of 316 * the CB undergoing the operation. 317 * If it's for multiple CBs, this is the total length of those CBs 318 * undergoing the operation. 319 * If it is for one TB, this is the total length of the TB under 320 * operation. 321 * 322 * In case of chained mbuf, this data length includes the lengths of the 323 * "scattered" data segments undergoing the operation. 324 */ 325 uint32_t length; 326 }; 327 328 /** Turbo decode code block parameters */ 329 struct rte_bbdev_op_dec_turbo_cb_params { 330 /** The K size of the input CB, in bits [40:6144], as specified in 331 * 3GPP TS 36.212. 332 * This size is inclusive of CRC bits, regardless whether it was 333 * pre-calculated by the application or not. 334 */ 335 uint16_t k; 336 /** The E length of the CB rate matched LLR output, in bytes, as in 337 * 3GPP TS 36.212. 338 */ 339 uint32_t e; 340 }; 341 342 /** LDPC decode code block parameters */ 343 struct rte_bbdev_op_dec_ldpc_cb_params { 344 /** Rate matching output sequence length in bits or LLRs. 345 * [3GPP TS38.212, section 5.4.2.1] 346 */ 347 uint32_t e; 348 }; 349 350 /** Turbo decode transport block parameters */ 351 struct rte_bbdev_op_dec_turbo_tb_params { 352 /** The K- size of the input CB, in bits [40:6144], that is in the 353 * Turbo operation when r < C-, as in 3GPP TS 36.212. 354 */ 355 uint16_t k_neg; 356 /** The K+ size of the input CB, in bits [40:6144], that is in the 357 * Turbo operation when r >= C-, as in 3GPP TS 36.212. 358 */ 359 uint16_t k_pos; 360 /** The number of CBs that have K- size, [0:63] */ 361 uint8_t c_neg; 362 /** The total number of CBs in the TB, 363 * [1:RTE_BBDEV_TURBO_MAX_CODE_BLOCKS] 364 */ 365 uint8_t c; 366 /** The number of CBs that uses Ea before switching to Eb, [0:63] */ 367 uint8_t cab; 368 /** The E size of the CB rate matched output to use in the Turbo 369 * operation when r < cab 370 */ 371 uint32_t ea; 372 /** The E size of the CB rate matched output to use in the Turbo 373 * operation when r >= cab 374 */ 375 uint32_t eb; 376 /** The index of the first CB in the inbound mbuf data, default is 0 */ 377 uint8_t r; 378 }; 379 380 /** LDPC decode transport block parameters */ 381 struct rte_bbdev_op_dec_ldpc_tb_params { 382 /** Ea, length after rate matching in bits, r < cab. 383 * [3GPP TS38.212, section 5.4.2.1] 384 */ 385 uint32_t ea; 386 /** Eb, length after rate matching in bits, r >= cab. 387 * [3GPP TS38.212, section 5.4.2.1] 388 */ 389 uint32_t eb; 390 /** The total number of CBs in the TB or partial TB 391 * [1:RTE_BBDEV_LDPC_MAX_CODE_BLOCKS] 392 */ 393 uint8_t c; 394 /** The index of the first CB in the inbound mbuf data, default is 0 */ 395 uint8_t r; 396 /** The number of CBs that use Ea before switching to Eb, [0:63] */ 397 uint8_t cab; 398 }; 399 400 /** Operation structure for Turbo decode. 401 * An operation can be performed on one CB at a time "CB-mode". 402 * An operation can be performed on one or multiple CBs that logically 403 * belong to one TB "TB-mode". 404 * The provided K size parameter of the CB is its size coming from the 405 * decode operation. 406 * CRC24A/B check is requested by the application by setting the flag 407 * RTE_BBDEV_TURBO_CRC_TYPE_24B for CRC24B check or CRC24A otherwise. 408 * In TB-mode, BBDEV concatenates the decoded CBs one next to the other with 409 * relevant CRC24B in between. 410 * 411 * The input encoded CB data is the Virtual Circular Buffer data stream, wk, 412 * with the null padding included as described in 3GPP TS 36.212 413 * section 5.1.4.1.2 and shown in 3GPP TS 36.212 section 5.1.4.1 Figure 5.1.4-1. 414 * The size of the virtual circular buffer is 3*Kpi, where Kpi is the 32 byte 415 * aligned value of K, as specified in 3GPP TS 36.212 section 5.1.4.1.1. 416 * 417 * Each byte in the input circular buffer is the LLR value of each bit of the 418 * original CB. 419 * 420 * Hard output is a mandatory capability that all BBDEV PMDs support. This is 421 * the decoded CBs of K sizes (CRC24A/B is the last 24-bit in each decoded CB). 422 * Soft output is an optional capability for BBDEV PMDs. If supported, an LLR 423 * rate matched output is computed in the soft_output buffer structure. 424 * 425 * The output mbuf data structure is expected to be allocated by the 426 * application with enough room for the output data. 427 */ 428 429 /* Structure rte_bbdev_op_turbo_dec 8< */ 430 struct rte_bbdev_op_turbo_dec { 431 /** The Virtual Circular Buffer, wk, size 3*Kpi for each CB */ 432 struct rte_bbdev_op_data input; 433 /** The hard decisions buffer for the decoded output, 434 * size K for each CB 435 */ 436 struct rte_bbdev_op_data hard_output; 437 /** The soft LLR output buffer - optional */ 438 struct rte_bbdev_op_data soft_output; 439 440 /** Flags from rte_bbdev_op_td_flag_bitmasks */ 441 uint32_t op_flags; 442 443 /** Rv index for rate matching [0:3] */ 444 uint8_t rv_index; 445 /** The minimum number of iterations to perform in decoding all CBs in 446 * this operation - input 447 */ 448 uint8_t iter_min:4; 449 /** The maximum number of iterations to perform in decoding all CBs in 450 * this operation - input 451 */ 452 uint8_t iter_max:4; 453 /** The maximum number of iterations that were performed in decoding 454 * all CBs in this decode operation - output 455 */ 456 uint8_t iter_count; 457 /** 5 bit extrinsic scale (scale factor on extrinsic info) */ 458 uint8_t ext_scale; 459 /** Number of MAP engines to use in decode, 460 * must be power of 2 (or 0 to auto-select) 461 */ 462 uint8_t num_maps; 463 464 /** [0 - TB : 1 - CB] */ 465 uint8_t code_block_mode; 466 union { 467 /** Struct which stores Code Block specific parameters */ 468 struct rte_bbdev_op_dec_turbo_cb_params cb_params; 469 /** Struct which stores Transport Block specific parameters */ 470 struct rte_bbdev_op_dec_turbo_tb_params tb_params; 471 }; 472 }; 473 /* >8 End of structure rte_bbdev_op_turbo_dec. */ 474 475 /** Operation structure for LDPC decode. 476 * 477 * An operation can be performed on one CB at a time "CB-mode". 478 * An operation can also be performed on one or multiple CBs that logically 479 * belong to a TB "TB-mode" (Currently not supported). 480 * 481 * The input encoded CB data is the Virtual Circular Buffer data stream. 482 * 483 * Each byte in the input circular buffer is the LLR value of each bit of the 484 * original CB. 485 * 486 * Hard output is a mandatory capability that all BBDEV PMDs support. This is 487 * the decoded CBs (CRC24A/B is the last 24-bit in each decoded CB). 488 * 489 * Soft output is an optional capability for BBDEV PMDs. If supported, an LLR 490 * rate matched output is computed in the soft_output buffer structure. 491 * These are A Posteriori Probabilities (APP) LLR samples for coded bits. 492 * 493 * HARQ combined output is an optional capability for BBDEV PMDs. 494 * If supported, a LLR output is streamed to the harq_combined_output 495 * buffer. 496 * 497 * HARQ combined input is an optional capability for BBDEV PMDs. 498 * If supported, a LLR input is streamed from the harq_combined_input 499 * buffer. 500 * 501 * The output mbuf data structure is expected to be allocated by the 502 * application with enough room for the output data. 503 */ 504 505 /* Structure rte_bbdev_op_ldpc_dec 8< */ 506 struct rte_bbdev_op_ldpc_dec { 507 /** The Virtual Circular Buffer for this code block, one LLR 508 * per bit of the original CB. 509 */ 510 struct rte_bbdev_op_data input; 511 /** The hard decisions buffer for the decoded output, 512 * size K for each CB 513 */ 514 struct rte_bbdev_op_data hard_output; 515 /** The soft LLR output LLR stream buffer - optional */ 516 struct rte_bbdev_op_data soft_output; 517 /** The HARQ combined LLR stream input buffer - optional */ 518 struct rte_bbdev_op_data harq_combined_input; 519 /** The HARQ combined LLR stream output buffer - optional */ 520 struct rte_bbdev_op_data harq_combined_output; 521 522 /** Flags from rte_bbdev_op_ldpcdec_flag_bitmasks */ 523 uint32_t op_flags; 524 525 /** Rate matching redundancy version 526 * [3GPP TS38.212, section 5.4.2.1] 527 */ 528 uint8_t rv_index; 529 /** The maximum number of iterations to perform in decoding CB in 530 * this operation - input 531 */ 532 uint8_t iter_max; 533 /** The number of iterations that were performed in decoding 534 * CB in this decode operation - output 535 */ 536 uint8_t iter_count; 537 /** 1: LDPC Base graph 1, 2: LDPC Base graph 2. 538 * [3GPP TS38.212, section 5.2.2] 539 */ 540 uint8_t basegraph; 541 /** Zc, LDPC lifting size. 542 * [3GPP TS38.212, section 5.2.2] 543 */ 544 uint16_t z_c; 545 /** Ncb, length of the circular buffer in bits. 546 * [3GPP TS38.212, section 5.4.2.1] 547 */ 548 uint16_t n_cb; 549 /** Qm, modulation order {1,2,4,6,8}. 550 * [3GPP TS38.212, section 5.4.2.2] 551 */ 552 uint8_t q_m; 553 /** Number of Filler bits, n_filler = K – K’ 554 * [3GPP TS38.212 section 5.2.2] 555 */ 556 uint16_t n_filler; 557 /** [0 - TB : 1 - CB] */ 558 uint8_t code_block_mode; 559 union { 560 /** Struct which stores Code Block specific parameters */ 561 struct rte_bbdev_op_dec_ldpc_cb_params cb_params; 562 /** Struct which stores Transport Block specific parameters */ 563 struct rte_bbdev_op_dec_ldpc_tb_params tb_params; 564 }; 565 }; 566 /* >8 End of structure rte_bbdev_op_ldpc_dec. */ 567 568 /** Turbo encode code block parameters */ 569 struct rte_bbdev_op_enc_turbo_cb_params { 570 /** The K size of the input CB, in bits [40:6144], as specified in 571 * 3GPP TS 36.212. 572 * This size is inclusive of CRC24A, regardless whether it was 573 * pre-calculated by the application or not. 574 */ 575 uint16_t k; 576 /** The E length of the CB rate matched output, in bits, as in 577 * 3GPP TS 36.212. 578 */ 579 uint32_t e; 580 /** The Ncb soft buffer size of the CB rate matched output [K:3*Kpi], 581 * in bits, as specified in 3GPP TS 36.212. 582 */ 583 uint16_t ncb; 584 }; 585 586 /** Turbo encode transport block parameters */ 587 struct rte_bbdev_op_enc_turbo_tb_params { 588 /** The K- size of the input CB, in bits [40:6144], that is in the 589 * Turbo operation when r < C-, as in 3GPP TS 36.212. 590 * This size is inclusive of CRC24B, regardless whether it was 591 * pre-calculated and appended by the application or not. 592 */ 593 uint16_t k_neg; 594 /** The K+ size of the input CB, in bits [40:6144], that is in the 595 * Turbo operation when r >= C-, as in 3GPP TS 36.212. 596 * This size is inclusive of CRC24B, regardless whether it was 597 * pre-calculated and appended by the application or not. 598 */ 599 uint16_t k_pos; 600 /** The number of CBs that have K- size, [0:63] */ 601 uint8_t c_neg; 602 /** The total number of CBs in the TB, 603 * [1:RTE_BBDEV_TURBO_MAX_CODE_BLOCKS] 604 */ 605 uint8_t c; 606 /** The number of CBs that uses Ea before switching to Eb, [0:63] */ 607 uint8_t cab; 608 /** The E size of the CB rate matched output to use in the Turbo 609 * operation when r < cab 610 */ 611 uint32_t ea; 612 /** The E size of the CB rate matched output to use in the Turbo 613 * operation when r >= cab 614 */ 615 uint32_t eb; 616 /** The Ncb soft buffer size for the rate matched CB that is used in 617 * the Turbo operation when r < C-, [K:3*Kpi] 618 */ 619 uint16_t ncb_neg; 620 /** The Ncb soft buffer size for the rate matched CB that is used in 621 * the Turbo operation when r >= C-, [K:3*Kpi] 622 */ 623 uint16_t ncb_pos; 624 /** The index of the first CB in the inbound mbuf data, default is 0 */ 625 uint8_t r; 626 }; 627 628 /** LDPC encode code block parameters */ 629 struct rte_bbdev_op_enc_ldpc_cb_params { 630 /** E, length after rate matching in bits. 631 * [3GPP TS38.212, section 5.4.2.1] 632 */ 633 uint32_t e; 634 }; 635 636 /** LDPC encode transport block parameters */ 637 struct rte_bbdev_op_enc_ldpc_tb_params { 638 /** Ea, length after rate matching in bits, r < cab. 639 * [3GPP TS38.212, section 5.4.2.1] 640 */ 641 uint32_t ea; 642 /** Eb, length after rate matching in bits, r >= cab. 643 * [3GPP TS38.212, section 5.4.2.1] 644 */ 645 uint32_t eb; 646 /** The total number of CBs in the TB or partial TB 647 * [1:RTE_BBDEV_LDPC_MAX_CODE_BLOCKS] 648 */ 649 uint8_t c; 650 /** The index of the first CB in the inbound mbuf data, default is 0 */ 651 uint8_t r; 652 /** The number of CBs that use Ea before switching to Eb, [0:63] */ 653 uint8_t cab; 654 }; 655 656 /** Operation structure for Turbo encode. 657 * An operation can be performed on one CB at a time "CB-mode". 658 * An operation can pbe erformd on one or multiple CBs that logically 659 * belong to one TB "TB-mode". 660 * 661 * In CB-mode, CRC24A/B is an optional operation. K size parameter is not 662 * affected by CRC24A/B inclusion, this only affects the inbound mbuf data 663 * length. Not all BBDEV PMDs are capable of CRC24A/B calculation. Flags 664 * RTE_BBDEV_TURBO_CRC_24A_ATTACH and RTE_BBDEV_TURBO_CRC_24B_ATTACH informs 665 * the application with relevant capability. These flags can be set in the 666 * op_flags parameter to indicate BBDEV to calculate and append CRC24A to CB 667 * before going forward with Turbo encoding. 668 * 669 * In TB-mode, CRC24A is assumed to be pre-calculated and appended to the 670 * inbound TB mbuf data buffer. 671 * 672 * The output mbuf data structure is expected to be allocated by the 673 * application with enough room for the output data. 674 */ 675 676 /* Structure rte_bbdev_op_turbo_enc 8< */ 677 struct rte_bbdev_op_turbo_enc { 678 /** The input CB or TB data */ 679 struct rte_bbdev_op_data input; 680 /** The rate matched CB or TB output buffer */ 681 struct rte_bbdev_op_data output; 682 /** Flags from rte_bbdev_op_te_flag_bitmasks */ 683 uint32_t op_flags; 684 685 /** Rv index for rate matching [0:3] */ 686 uint8_t rv_index; 687 /** [0 - TB : 1 - CB] */ 688 uint8_t code_block_mode; 689 union { 690 /** Struct which stores Code Block specific parameters */ 691 struct rte_bbdev_op_enc_turbo_cb_params cb_params; 692 /** Struct which stores Transport Block specific parameters */ 693 struct rte_bbdev_op_enc_turbo_tb_params tb_params; 694 }; 695 }; 696 /* >8 End of structure rte_bbdev_op_turbo_enc. */ 697 698 /** Operation structure for LDPC encode. 699 * An operation can be performed on one CB at a time "CB-mode". 700 * An operation can be performed on one or multiple CBs that logically 701 * belong to a TB "TB-mode". 702 * 703 * The input data is the CB or TB input to the decoder. 704 * 705 * The output data is the ratematched CB or TB data, or the output after 706 * bit-selection if RTE_BBDEV_LDPC_INTERLEAVER_BYPASS is set. 707 * 708 * The output mbuf data structure is expected to be allocated by the 709 * application with enough room for the output data. 710 */ 711 712 /* Structure rte_bbdev_op_ldpc_enc 8< */ 713 struct rte_bbdev_op_ldpc_enc { 714 /** The input TB or CB data */ 715 struct rte_bbdev_op_data input; 716 /** The rate matched TB or CB output buffer */ 717 struct rte_bbdev_op_data output; 718 719 /** Flags from rte_bbdev_op_ldpcenc_flag_bitmasks */ 720 uint32_t op_flags; 721 722 /** Rate matching redundancy version */ 723 uint8_t rv_index; 724 /** 1: LDPC Base graph 1, 2: LDPC Base graph 2. 725 * [3GPP TS38.212, section 5.2.2] 726 */ 727 uint8_t basegraph; 728 /** Zc, LDPC lifting size. 729 * [3GPP TS38.212, section 5.2.2] 730 */ 731 uint16_t z_c; 732 /** Ncb, length of the circular buffer in bits. 733 * [3GPP TS38.212, section 5.4.2.1] 734 */ 735 uint16_t n_cb; 736 /** Qm, modulation order {2,4,6,8,10}. 737 * [3GPP TS38.212, section 5.4.2.2] 738 */ 739 uint8_t q_m; 740 /** Number of Filler bits, n_filler = K – K’ 741 * [3GPP TS38.212 section 5.2.2] 742 */ 743 uint16_t n_filler; 744 /** [0 - TB : 1 - CB] */ 745 uint8_t code_block_mode; 746 union { 747 /** Struct which stores Code Block specific parameters */ 748 struct rte_bbdev_op_enc_ldpc_cb_params cb_params; 749 /** Struct which stores Transport Block specific parameters */ 750 struct rte_bbdev_op_enc_ldpc_tb_params tb_params; 751 }; 752 }; 753 /* >8 End of structure rte_bbdev_op_ldpc_enc. */ 754 755 /** Operation structure for FFT processing. 756 * 757 * The operation processes the data for multiple antennas in a single call 758 * (i.e. for all the REs belonging to a given SRS sequence for instance). 759 * 760 * The output mbuf data structure is expected to be allocated by the 761 * application with enough room for the output data. 762 */ 763 764 /* Structure rte_bbdev_op_fft 8< */ 765 struct rte_bbdev_op_fft { 766 /** Input data starting from first antenna. */ 767 struct rte_bbdev_op_data base_input; 768 /** Output data starting from first antenna and first cyclic shift. */ 769 struct rte_bbdev_op_data base_output; 770 /** Optional frequency window input data. */ 771 struct rte_bbdev_op_data dewindowing_input; 772 /** Optional power measurement output data. */ 773 struct rte_bbdev_op_data power_meas_output; 774 /** Flags from rte_bbdev_op_fft_flag_bitmasks. */ 775 uint32_t op_flags; 776 /** Input sequence size in 32-bits points. */ 777 uint16_t input_sequence_size; 778 /** Padding at the start of the sequence. */ 779 uint16_t input_leading_padding; 780 /** Output sequence size in 32-bits points. */ 781 uint16_t output_sequence_size; 782 /** Depadding at the start of the DFT output. */ 783 uint16_t output_leading_depadding; 784 /** Window index being used for each cyclic shift output. */ 785 uint8_t window_index[RTE_BBDEV_MAX_CS_2]; 786 /** Bitmap of the cyclic shift output requested. */ 787 uint16_t cs_bitmap; 788 /** Number of antennas as a log2 – 8 to 128. */ 789 uint8_t num_antennas_log2; 790 /** iDFT size as a log2 - 32 to 2048. */ 791 uint8_t idft_log2; 792 /** DFT size as a log2 - 8 to 2048. */ 793 uint8_t dft_log2; 794 /** Adjustment of position of the cyclic shifts - -31 to 31. */ 795 int8_t cs_time_adjustment; 796 /** iDFT shift down. */ 797 int8_t idft_shift; 798 /** DFT shift down. */ 799 int8_t dft_shift; 800 /** NCS reciprocal factor. */ 801 uint16_t ncs_reciprocal; 802 /** Power measurement out shift down. */ 803 uint16_t power_shift; 804 /** Adjust the FP6 exponent for INT<->FP16 conversion. */ 805 uint16_t fp16_exp_adjust; 806 /** Frequency resampling : 0: Transparent Mode1: 4/3 Resample2: 2/3 Resample. */ 807 int8_t freq_resample_mode; 808 /** Output depadded size prior to frequency resampling. */ 809 uint16_t output_depadded_size; 810 /** Time error correction initial phase. */ 811 uint16_t cs_theta_0[RTE_BBDEV_MAX_CS]; 812 /** Time error correction phase increment. */ 813 uint32_t cs_theta_d[RTE_BBDEV_MAX_CS]; 814 /* Time offset per CS of time domain samples. */ 815 int8_t time_offset[RTE_BBDEV_MAX_CS]; 816 }; 817 /* >8 End of structure rte_bbdev_op_fft. */ 818 819 /** Operation structure for MLDTS processing. 820 * 821 * The output mbuf data structure is expected to be allocated by the 822 * application with enough room for the output data. 823 */ 824 825 /* Structure rte_bbdev_op_mldts 8< */ 826 struct rte_bbdev_op_mldts { 827 /** Input data QHy from QR decomposition. */ 828 struct rte_bbdev_op_data qhy_input; 829 /** Input data R from QR decomposition. */ 830 struct rte_bbdev_op_data r_input; 831 /** Output data post MLD-TS. */ 832 struct rte_bbdev_op_data output; 833 /** Flags from *rte_bbdev_op_MLDTS_flag_bitmasks*. */ 834 uint32_t op_flags; 835 /** Number of RBs. */ 836 uint16_t num_rbs; 837 /** Number of layers 2->4. */ 838 uint16_t num_layers; 839 /** Modulation order (2->8 QPSK to 256QAM). */ 840 uint8_t q_m[RTE_BBDEV_MAX_MLD_LAYERS]; 841 /** Row repetition for the same R matrix - subcarriers. */ 842 uint8_t r_rep; 843 /** Column repetition for the same R matrix - symbols. */ 844 uint8_t c_rep; 845 }; 846 /* >8 End of structure rte_bbdev_op_mldts. */ 847 848 /** List of the capabilities for the Turbo Decoder */ 849 struct rte_bbdev_op_cap_turbo_dec { 850 /** Flags from rte_bbdev_op_td_flag_bitmasks */ 851 uint32_t capability_flags; 852 /** Maximal LLR absolute value. Acceptable LLR values lie in range 853 * [-max_llr_modulus, max_llr_modulus]. 854 */ 855 int8_t max_llr_modulus; 856 /** Num input code block buffers */ 857 uint8_t num_buffers_src; /**< Num input code block buffers */ 858 /** Num hard output code block buffers */ 859 uint8_t num_buffers_hard_out; 860 /** Num soft output code block buffers if supported by the driver */ 861 uint8_t num_buffers_soft_out; 862 }; 863 864 /** List of the capabilities for the Turbo Encoder */ 865 struct rte_bbdev_op_cap_turbo_enc { 866 /** Flags from rte_bbdev_op_te_flag_bitmasks */ 867 uint32_t capability_flags; 868 /** Num input code block buffers */ 869 uint8_t num_buffers_src; 870 /** Num output code block buffers */ 871 uint8_t num_buffers_dst; 872 }; 873 874 /** List of the capabilities for the LDPC Decoder */ 875 struct rte_bbdev_op_cap_ldpc_dec { 876 /** Flags from rte_bbdev_op_ldpcdec_flag_bitmasks */ 877 uint32_t capability_flags; 878 /** LLR size in bits. LLR is a two’s complement number. */ 879 int8_t llr_size; 880 /** LLR numbers of decimals bit for arithmetic representation */ 881 int8_t llr_decimals; 882 /** Num input code block buffers */ 883 uint16_t num_buffers_src; 884 /** Num hard output code block buffers */ 885 uint16_t num_buffers_hard_out; 886 /** Num soft output code block buffers if supported by the driver */ 887 uint16_t num_buffers_soft_out; 888 }; 889 890 /** List of the capabilities for the LDPC Encoder */ 891 struct rte_bbdev_op_cap_ldpc_enc { 892 /** Flags from rte_bbdev_op_ldpcenc_flag_bitmasks */ 893 uint32_t capability_flags; 894 /** Num input code block buffers */ 895 uint16_t num_buffers_src; 896 /** Num output code block buffers */ 897 uint16_t num_buffers_dst; 898 }; 899 900 /** List of the capabilities for the FFT. */ 901 struct rte_bbdev_op_cap_fft { 902 /** Flags from *rte_bbdev_op_fft_flag_bitmasks*. */ 903 uint32_t capability_flags; 904 /** Num input code block buffers. */ 905 uint16_t num_buffers_src; 906 /** Num output code block buffers. */ 907 uint16_t num_buffers_dst; 908 /** Number of FFT windows supported. */ 909 uint16_t fft_windows_num; 910 }; 911 912 /** List of the capabilities for the MLD */ 913 struct rte_bbdev_op_cap_mld { 914 /** Flags from rte_bbdev_op_mldts_flag_bitmasks */ 915 uint32_t capability_flags; 916 /** Number of input code block buffers. */ 917 uint16_t num_buffers_src; 918 /** Number of output code block buffers. */ 919 uint16_t num_buffers_dst; 920 }; 921 922 /** Different operation types supported by the device. 923 * The related macro RTE_BBDEV_OP_TYPE_SIZE_MAX can be used as an absolute maximum for 924 * notably sizing array while allowing for future enumeration insertion. 925 */ 926 enum rte_bbdev_op_type { 927 RTE_BBDEV_OP_NONE, /**< Dummy operation that does nothing */ 928 RTE_BBDEV_OP_TURBO_DEC, /**< Turbo decode */ 929 RTE_BBDEV_OP_TURBO_ENC, /**< Turbo encode */ 930 RTE_BBDEV_OP_LDPC_DEC, /**< LDPC decode */ 931 RTE_BBDEV_OP_LDPC_ENC, /**< LDPC encode */ 932 RTE_BBDEV_OP_FFT, /**< FFT */ 933 RTE_BBDEV_OP_MLDTS, /**< MLD-TS */ 934 /* Note: RTE_BBDEV_OP_TYPE_SIZE_MAX must be larger or equal to maximum enum value */ 935 }; 936 937 /** Bit indexes of possible errors reported through status field */ 938 enum { 939 RTE_BBDEV_DRV_ERROR, 940 RTE_BBDEV_DATA_ERROR, 941 RTE_BBDEV_CRC_ERROR, 942 RTE_BBDEV_SYNDROME_ERROR, 943 RTE_BBDEV_ENGINE_ERROR 944 }; 945 946 /** Structure specifying a single encode operation */ 947 struct rte_bbdev_enc_op { 948 /** Status of operation that was performed */ 949 int status; 950 /** Mempool which op instance is in */ 951 struct rte_mempool *mempool; 952 /** Opaque pointer for user data */ 953 void *opaque_data; 954 union { 955 /** Contains turbo decoder specific parameters */ 956 struct rte_bbdev_op_turbo_enc turbo_enc; 957 /** Contains LDPC decoder specific parameters */ 958 struct rte_bbdev_op_ldpc_enc ldpc_enc; 959 }; 960 }; 961 962 /** Structure specifying a single decode operation */ 963 struct rte_bbdev_dec_op { 964 /** Status of operation that was performed */ 965 int status; 966 /** Mempool which op instance is in */ 967 struct rte_mempool *mempool; 968 /** Opaque pointer for user data */ 969 void *opaque_data; 970 union { 971 /** Contains turbo decoder specific parameters */ 972 struct rte_bbdev_op_turbo_dec turbo_dec; 973 /** Contains LDPC decoder specific parameters */ 974 struct rte_bbdev_op_ldpc_dec ldpc_dec; 975 }; 976 }; 977 978 /** Structure specifying a single FFT operation. */ 979 struct rte_bbdev_fft_op { 980 /** Status of operation performed. */ 981 int status; 982 /** Mempool used for op instance. */ 983 struct rte_mempool *mempool; 984 /** Opaque pointer for user data. */ 985 void *opaque_data; 986 /** Contains turbo decoder specific parameters. */ 987 struct rte_bbdev_op_fft fft; 988 }; 989 990 /** Structure specifying a single mldts operation */ 991 struct rte_bbdev_mldts_op { 992 /** Status of operation that was performed. */ 993 int status; 994 /** Mempool which op instance is in. */ 995 struct rte_mempool *mempool; 996 /** Opaque pointer for user data. */ 997 void *opaque_data; 998 /** Contains turbo decoder specific parameters. */ 999 struct rte_bbdev_op_mldts mldts; 1000 }; 1001 1002 /** Operation capabilities supported by a device */ 1003 struct rte_bbdev_op_cap { 1004 enum rte_bbdev_op_type type; /**< Type of operation */ 1005 union { 1006 struct rte_bbdev_op_cap_turbo_dec turbo_dec; 1007 struct rte_bbdev_op_cap_turbo_enc turbo_enc; 1008 struct rte_bbdev_op_cap_ldpc_dec ldpc_dec; 1009 struct rte_bbdev_op_cap_ldpc_enc ldpc_enc; 1010 struct rte_bbdev_op_cap_fft fft; 1011 struct rte_bbdev_op_cap_mld mld; 1012 } cap; /**< Operation-type specific capabilities */ 1013 }; 1014 1015 /** @internal Private data structure stored with operation pool. */ 1016 struct rte_bbdev_op_pool_private { 1017 enum rte_bbdev_op_type type; /**< Type of operations in a pool */ 1018 }; 1019 1020 /** 1021 * Converts queue operation type from enum to string 1022 * 1023 * @param op_type 1024 * Operation type as enum 1025 * 1026 * @returns 1027 * Operation type as string or NULL if op_type is invalid 1028 */ 1029 const char* 1030 rte_bbdev_op_type_str(enum rte_bbdev_op_type op_type); 1031 1032 /** 1033 * Creates a bbdev operation mempool 1034 * 1035 * @param name 1036 * Pool name. 1037 * @param type 1038 * Operation type, use RTE_BBDEV_OP_NONE for a pool which supports all 1039 * operation types. 1040 * @param num_elements 1041 * Number of elements in the pool. 1042 * @param cache_size 1043 * Number of elements to cache on an lcore, see rte_mempool_create() for 1044 * further details about cache size. 1045 * @param socket_id 1046 * Socket to allocate memory on. 1047 * 1048 * @return 1049 * - Pointer to a mempool on success, 1050 * - NULL pointer on failure. 1051 */ 1052 struct rte_mempool * 1053 rte_bbdev_op_pool_create(const char *name, enum rte_bbdev_op_type type, 1054 unsigned int num_elements, unsigned int cache_size, 1055 int socket_id); 1056 1057 /** 1058 * Bulk allocate encode operations from a mempool with parameter defaults reset. 1059 * 1060 * @param mempool 1061 * Operation mempool, created by rte_bbdev_op_pool_create(). 1062 * @param ops 1063 * Output array to place allocated operations 1064 * @param num_ops 1065 * Number of operations to allocate 1066 * 1067 * @returns 1068 * - 0 on success 1069 * - EINVAL if invalid mempool is provided 1070 */ 1071 static inline int 1072 rte_bbdev_enc_op_alloc_bulk(struct rte_mempool *mempool, 1073 struct rte_bbdev_enc_op **ops, unsigned int num_ops) 1074 { 1075 struct rte_bbdev_op_pool_private *priv; 1076 1077 /* Check type */ 1078 priv = (struct rte_bbdev_op_pool_private *) 1079 rte_mempool_get_priv(mempool); 1080 if (unlikely((priv->type != RTE_BBDEV_OP_TURBO_ENC) && 1081 (priv->type != RTE_BBDEV_OP_LDPC_ENC))) 1082 return -EINVAL; 1083 1084 /* Get elements */ 1085 return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); 1086 } 1087 1088 /** 1089 * Bulk allocate decode operations from a mempool with parameter defaults reset. 1090 * 1091 * @param mempool 1092 * Operation mempool, created by rte_bbdev_op_pool_create(). 1093 * @param ops 1094 * Output array to place allocated operations 1095 * @param num_ops 1096 * Number of operations to allocate 1097 * 1098 * @returns 1099 * - 0 on success 1100 * - EINVAL if invalid mempool is provided 1101 */ 1102 static inline int 1103 rte_bbdev_dec_op_alloc_bulk(struct rte_mempool *mempool, 1104 struct rte_bbdev_dec_op **ops, unsigned int num_ops) 1105 { 1106 struct rte_bbdev_op_pool_private *priv; 1107 1108 /* Check type */ 1109 priv = (struct rte_bbdev_op_pool_private *) 1110 rte_mempool_get_priv(mempool); 1111 if (unlikely((priv->type != RTE_BBDEV_OP_TURBO_DEC) && 1112 (priv->type != RTE_BBDEV_OP_LDPC_DEC))) 1113 return -EINVAL; 1114 1115 /* Get elements */ 1116 return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); 1117 } 1118 1119 /** 1120 * Bulk allocate FFT operations from a mempool with default parameters. 1121 * 1122 * @param mempool 1123 * Operation mempool, created by *rte_bbdev_op_pool_create*. 1124 * @param ops 1125 * Output array to place allocated operations. 1126 * @param num_ops 1127 * Number of operations to allocate. 1128 * 1129 * @returns 1130 * - 0 on success. 1131 * - EINVAL if invalid mempool is provided. 1132 */ 1133 static inline int 1134 rte_bbdev_fft_op_alloc_bulk(struct rte_mempool *mempool, 1135 struct rte_bbdev_fft_op **ops, unsigned int num_ops) 1136 { 1137 struct rte_bbdev_op_pool_private *priv; 1138 1139 /* Check type */ 1140 priv = (struct rte_bbdev_op_pool_private *)rte_mempool_get_priv(mempool); 1141 if (unlikely(priv->type != RTE_BBDEV_OP_FFT)) 1142 return -EINVAL; 1143 1144 /* Get elements */ 1145 return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); 1146 } 1147 1148 /** 1149 * Bulk allocate MLD operations from a mempool with parameter defaults reset. 1150 * 1151 * @param mempool 1152 * Operation mempool, created by *rte_bbdev_op_pool_create*. 1153 * @param ops 1154 * Output array to place allocated operations. 1155 * @param num_ops 1156 * Number of operations to allocate. 1157 * 1158 * @returns 1159 * - 0 on success. 1160 * - EINVAL if invalid mempool is provided. 1161 */ 1162 __rte_experimental 1163 static inline int 1164 rte_bbdev_mldts_op_alloc_bulk(struct rte_mempool *mempool, 1165 struct rte_bbdev_mldts_op **ops, uint16_t num_ops) 1166 { 1167 struct rte_bbdev_op_pool_private *priv; 1168 1169 /* Check type */ 1170 priv = (struct rte_bbdev_op_pool_private *)rte_mempool_get_priv(mempool); 1171 if (unlikely(priv->type != RTE_BBDEV_OP_MLDTS)) 1172 return -EINVAL; 1173 1174 /* Get elements */ 1175 return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); 1176 } 1177 1178 /** 1179 * Free decode operation structures that were allocated by 1180 * rte_bbdev_dec_op_alloc_bulk(). 1181 * All structures must belong to the same mempool. 1182 * 1183 * @param ops 1184 * Operation structures 1185 * @param num_ops 1186 * Number of structures 1187 */ 1188 static inline void 1189 rte_bbdev_dec_op_free_bulk(struct rte_bbdev_dec_op **ops, unsigned int num_ops) 1190 { 1191 if (num_ops > 0) 1192 rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); 1193 } 1194 1195 /** 1196 * Free encode operation structures that were allocated by 1197 * rte_bbdev_enc_op_alloc_bulk(). 1198 * All structures must belong to the same mempool. 1199 * 1200 * @param ops 1201 * Operation structures 1202 * @param num_ops 1203 * Number of structures 1204 */ 1205 static inline void 1206 rte_bbdev_enc_op_free_bulk(struct rte_bbdev_enc_op **ops, unsigned int num_ops) 1207 { 1208 if (num_ops > 0) 1209 rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); 1210 } 1211 1212 /** 1213 * Free encode operation structures that were allocated by 1214 * *rte_bbdev_fft_op_alloc_bulk*. 1215 * All structures must belong to the same mempool. 1216 * 1217 * @param ops 1218 * Operation structures. 1219 * @param num_ops 1220 * Number of structures. 1221 */ 1222 static inline void 1223 rte_bbdev_fft_op_free_bulk(struct rte_bbdev_fft_op **ops, unsigned int num_ops) 1224 { 1225 if (num_ops > 0) 1226 rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); 1227 } 1228 1229 /** 1230 * Free encode operation structures that were allocated by 1231 * rte_bbdev_mldts_op_alloc_bulk(). 1232 * All structures must belong to the same mempool. 1233 * 1234 * @param ops 1235 * Operation structures 1236 * @param num_ops 1237 * Number of structures 1238 */ 1239 __rte_experimental 1240 static inline void 1241 rte_bbdev_mldts_op_free_bulk(struct rte_bbdev_mldts_op **ops, unsigned int num_ops) 1242 { 1243 if (num_ops > 0) 1244 rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); 1245 } 1246 1247 #ifdef __cplusplus 1248 } 1249 #endif 1250 1251 #endif /* _RTE_BBDEV_OP_H_ */ 1252