1*99a2dd95SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
2*99a2dd95SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation
3*99a2dd95SBruce Richardson */
4*99a2dd95SBruce Richardson
5*99a2dd95SBruce Richardson #include "acl_run.h"
6*99a2dd95SBruce Richardson #include "acl_vect.h"
7*99a2dd95SBruce Richardson
8*99a2dd95SBruce Richardson enum {
9*99a2dd95SBruce Richardson SHUFFLE32_SLOT1 = 0xe5,
10*99a2dd95SBruce Richardson SHUFFLE32_SLOT2 = 0xe6,
11*99a2dd95SBruce Richardson SHUFFLE32_SLOT3 = 0xe7,
12*99a2dd95SBruce Richardson SHUFFLE32_SWAP64 = 0x4e,
13*99a2dd95SBruce Richardson };
14*99a2dd95SBruce Richardson
15*99a2dd95SBruce Richardson static const rte_xmm_t xmm_shuffle_input = {
16*99a2dd95SBruce Richardson .u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c},
17*99a2dd95SBruce Richardson };
18*99a2dd95SBruce Richardson
19*99a2dd95SBruce Richardson static const rte_xmm_t xmm_ones_16 = {
20*99a2dd95SBruce Richardson .u16 = {1, 1, 1, 1, 1, 1, 1, 1},
21*99a2dd95SBruce Richardson };
22*99a2dd95SBruce Richardson
23*99a2dd95SBruce Richardson static const rte_xmm_t xmm_match_mask = {
24*99a2dd95SBruce Richardson .u32 = {
25*99a2dd95SBruce Richardson RTE_ACL_NODE_MATCH,
26*99a2dd95SBruce Richardson RTE_ACL_NODE_MATCH,
27*99a2dd95SBruce Richardson RTE_ACL_NODE_MATCH,
28*99a2dd95SBruce Richardson RTE_ACL_NODE_MATCH,
29*99a2dd95SBruce Richardson },
30*99a2dd95SBruce Richardson };
31*99a2dd95SBruce Richardson
32*99a2dd95SBruce Richardson static const rte_xmm_t xmm_index_mask = {
33*99a2dd95SBruce Richardson .u32 = {
34*99a2dd95SBruce Richardson RTE_ACL_NODE_INDEX,
35*99a2dd95SBruce Richardson RTE_ACL_NODE_INDEX,
36*99a2dd95SBruce Richardson RTE_ACL_NODE_INDEX,
37*99a2dd95SBruce Richardson RTE_ACL_NODE_INDEX,
38*99a2dd95SBruce Richardson },
39*99a2dd95SBruce Richardson };
40*99a2dd95SBruce Richardson
41*99a2dd95SBruce Richardson static const rte_xmm_t xmm_range_base = {
42*99a2dd95SBruce Richardson .u32 = {
43*99a2dd95SBruce Richardson 0xffffff00, 0xffffff04, 0xffffff08, 0xffffff0c,
44*99a2dd95SBruce Richardson },
45*99a2dd95SBruce Richardson };
46*99a2dd95SBruce Richardson
47*99a2dd95SBruce Richardson /*
48*99a2dd95SBruce Richardson * Resolve priority for multiple results (sse version).
49*99a2dd95SBruce Richardson * This consists comparing the priority of the current traversal with the
50*99a2dd95SBruce Richardson * running set of results for the packet.
51*99a2dd95SBruce Richardson * For each result, keep a running array of the result (rule number) and
52*99a2dd95SBruce Richardson * its priority for each category.
53*99a2dd95SBruce Richardson */
54*99a2dd95SBruce Richardson static inline void
resolve_priority_sse(uint64_t transition,int n,const struct rte_acl_ctx * ctx,struct parms * parms,const struct rte_acl_match_results * p,uint32_t categories)55*99a2dd95SBruce Richardson resolve_priority_sse(uint64_t transition, int n, const struct rte_acl_ctx *ctx,
56*99a2dd95SBruce Richardson struct parms *parms, const struct rte_acl_match_results *p,
57*99a2dd95SBruce Richardson uint32_t categories)
58*99a2dd95SBruce Richardson {
59*99a2dd95SBruce Richardson uint32_t x;
60*99a2dd95SBruce Richardson xmm_t results, priority, results1, priority1, selector;
61*99a2dd95SBruce Richardson xmm_t *saved_results, *saved_priority;
62*99a2dd95SBruce Richardson
63*99a2dd95SBruce Richardson for (x = 0; x < categories; x += RTE_ACL_RESULTS_MULTIPLIER) {
64*99a2dd95SBruce Richardson
65*99a2dd95SBruce Richardson saved_results = (xmm_t *)(&parms[n].cmplt->results[x]);
66*99a2dd95SBruce Richardson saved_priority =
67*99a2dd95SBruce Richardson (xmm_t *)(&parms[n].cmplt->priority[x]);
68*99a2dd95SBruce Richardson
69*99a2dd95SBruce Richardson /* get results and priorities for completed trie */
70*99a2dd95SBruce Richardson results = _mm_loadu_si128(
71*99a2dd95SBruce Richardson (const xmm_t *)&p[transition].results[x]);
72*99a2dd95SBruce Richardson priority = _mm_loadu_si128(
73*99a2dd95SBruce Richardson (const xmm_t *)&p[transition].priority[x]);
74*99a2dd95SBruce Richardson
75*99a2dd95SBruce Richardson /* if this is not the first completed trie */
76*99a2dd95SBruce Richardson if (parms[n].cmplt->count != ctx->num_tries) {
77*99a2dd95SBruce Richardson
78*99a2dd95SBruce Richardson /* get running best results and their priorities */
79*99a2dd95SBruce Richardson results1 = _mm_loadu_si128(saved_results);
80*99a2dd95SBruce Richardson priority1 = _mm_loadu_si128(saved_priority);
81*99a2dd95SBruce Richardson
82*99a2dd95SBruce Richardson /* select results that are highest priority */
83*99a2dd95SBruce Richardson selector = _mm_cmpgt_epi32(priority1, priority);
84*99a2dd95SBruce Richardson results = _mm_blendv_epi8(results, results1, selector);
85*99a2dd95SBruce Richardson priority = _mm_blendv_epi8(priority, priority1,
86*99a2dd95SBruce Richardson selector);
87*99a2dd95SBruce Richardson }
88*99a2dd95SBruce Richardson
89*99a2dd95SBruce Richardson /* save running best results and their priorities */
90*99a2dd95SBruce Richardson _mm_storeu_si128(saved_results, results);
91*99a2dd95SBruce Richardson _mm_storeu_si128(saved_priority, priority);
92*99a2dd95SBruce Richardson }
93*99a2dd95SBruce Richardson }
94*99a2dd95SBruce Richardson
95*99a2dd95SBruce Richardson /*
96*99a2dd95SBruce Richardson * Extract transitions from an XMM register and check for any matches
97*99a2dd95SBruce Richardson */
98*99a2dd95SBruce Richardson static void
acl_process_matches(xmm_t * indices,int slot,const struct rte_acl_ctx * ctx,struct parms * parms,struct acl_flow_data * flows)99*99a2dd95SBruce Richardson acl_process_matches(xmm_t *indices, int slot, const struct rte_acl_ctx *ctx,
100*99a2dd95SBruce Richardson struct parms *parms, struct acl_flow_data *flows)
101*99a2dd95SBruce Richardson {
102*99a2dd95SBruce Richardson uint64_t transition1, transition2;
103*99a2dd95SBruce Richardson
104*99a2dd95SBruce Richardson /* extract transition from low 64 bits. */
105*99a2dd95SBruce Richardson transition1 = _mm_cvtsi128_si64(*indices);
106*99a2dd95SBruce Richardson
107*99a2dd95SBruce Richardson /* extract transition from high 64 bits. */
108*99a2dd95SBruce Richardson *indices = _mm_shuffle_epi32(*indices, SHUFFLE32_SWAP64);
109*99a2dd95SBruce Richardson transition2 = _mm_cvtsi128_si64(*indices);
110*99a2dd95SBruce Richardson
111*99a2dd95SBruce Richardson transition1 = acl_match_check(transition1, slot, ctx,
112*99a2dd95SBruce Richardson parms, flows, resolve_priority_sse);
113*99a2dd95SBruce Richardson transition2 = acl_match_check(transition2, slot + 1, ctx,
114*99a2dd95SBruce Richardson parms, flows, resolve_priority_sse);
115*99a2dd95SBruce Richardson
116*99a2dd95SBruce Richardson /* update indices with new transitions. */
117*99a2dd95SBruce Richardson *indices = _mm_set_epi64x(transition2, transition1);
118*99a2dd95SBruce Richardson }
119*99a2dd95SBruce Richardson
120*99a2dd95SBruce Richardson /*
121*99a2dd95SBruce Richardson * Check for any match in 4 transitions (contained in 2 SSE registers)
122*99a2dd95SBruce Richardson */
123*99a2dd95SBruce Richardson static __rte_always_inline void
acl_match_check_x4(int slot,const struct rte_acl_ctx * ctx,struct parms * parms,struct acl_flow_data * flows,xmm_t * indices1,xmm_t * indices2,xmm_t match_mask)124*99a2dd95SBruce Richardson acl_match_check_x4(int slot, const struct rte_acl_ctx *ctx, struct parms *parms,
125*99a2dd95SBruce Richardson struct acl_flow_data *flows, xmm_t *indices1, xmm_t *indices2,
126*99a2dd95SBruce Richardson xmm_t match_mask)
127*99a2dd95SBruce Richardson {
128*99a2dd95SBruce Richardson xmm_t temp;
129*99a2dd95SBruce Richardson
130*99a2dd95SBruce Richardson /* put low 32 bits of each transition into one register */
131*99a2dd95SBruce Richardson temp = (xmm_t)_mm_shuffle_ps((__m128)*indices1, (__m128)*indices2,
132*99a2dd95SBruce Richardson 0x88);
133*99a2dd95SBruce Richardson /* test for match node */
134*99a2dd95SBruce Richardson temp = _mm_and_si128(match_mask, temp);
135*99a2dd95SBruce Richardson
136*99a2dd95SBruce Richardson while (!_mm_testz_si128(temp, temp)) {
137*99a2dd95SBruce Richardson acl_process_matches(indices1, slot, ctx, parms, flows);
138*99a2dd95SBruce Richardson acl_process_matches(indices2, slot + 2, ctx, parms, flows);
139*99a2dd95SBruce Richardson
140*99a2dd95SBruce Richardson temp = (xmm_t)_mm_shuffle_ps((__m128)*indices1,
141*99a2dd95SBruce Richardson (__m128)*indices2,
142*99a2dd95SBruce Richardson 0x88);
143*99a2dd95SBruce Richardson temp = _mm_and_si128(match_mask, temp);
144*99a2dd95SBruce Richardson }
145*99a2dd95SBruce Richardson }
146*99a2dd95SBruce Richardson
147*99a2dd95SBruce Richardson /*
148*99a2dd95SBruce Richardson * Process 4 transitions (in 2 XMM registers) in parallel
149*99a2dd95SBruce Richardson */
150*99a2dd95SBruce Richardson static __rte_always_inline xmm_t
transition4(xmm_t next_input,const uint64_t * trans,xmm_t * indices1,xmm_t * indices2)151*99a2dd95SBruce Richardson transition4(xmm_t next_input, const uint64_t *trans,
152*99a2dd95SBruce Richardson xmm_t *indices1, xmm_t *indices2)
153*99a2dd95SBruce Richardson {
154*99a2dd95SBruce Richardson xmm_t addr, tr_lo, tr_hi;
155*99a2dd95SBruce Richardson uint64_t trans0, trans2;
156*99a2dd95SBruce Richardson
157*99a2dd95SBruce Richardson /* Shuffle low 32 into tr_lo and high 32 into tr_hi */
158*99a2dd95SBruce Richardson ACL_TR_HILO(mm, __m128, *indices1, *indices2, tr_lo, tr_hi);
159*99a2dd95SBruce Richardson
160*99a2dd95SBruce Richardson /* Calculate the address (array index) for all 4 transitions. */
161*99a2dd95SBruce Richardson ACL_TR_CALC_ADDR(mm, 128, addr, xmm_index_mask.x, next_input,
162*99a2dd95SBruce Richardson xmm_shuffle_input.x, xmm_ones_16.x, xmm_range_base.x,
163*99a2dd95SBruce Richardson tr_lo, tr_hi);
164*99a2dd95SBruce Richardson
165*99a2dd95SBruce Richardson /* Gather 64 bit transitions and pack back into 2 registers. */
166*99a2dd95SBruce Richardson
167*99a2dd95SBruce Richardson trans0 = trans[_mm_cvtsi128_si32(addr)];
168*99a2dd95SBruce Richardson
169*99a2dd95SBruce Richardson /* get slot 2 */
170*99a2dd95SBruce Richardson
171*99a2dd95SBruce Richardson /* {x0, x1, x2, x3} -> {x2, x1, x2, x3} */
172*99a2dd95SBruce Richardson addr = _mm_shuffle_epi32(addr, SHUFFLE32_SLOT2);
173*99a2dd95SBruce Richardson trans2 = trans[_mm_cvtsi128_si32(addr)];
174*99a2dd95SBruce Richardson
175*99a2dd95SBruce Richardson /* get slot 1 */
176*99a2dd95SBruce Richardson
177*99a2dd95SBruce Richardson /* {x2, x1, x2, x3} -> {x1, x1, x2, x3} */
178*99a2dd95SBruce Richardson addr = _mm_shuffle_epi32(addr, SHUFFLE32_SLOT1);
179*99a2dd95SBruce Richardson *indices1 = _mm_set_epi64x(trans[_mm_cvtsi128_si32(addr)], trans0);
180*99a2dd95SBruce Richardson
181*99a2dd95SBruce Richardson /* get slot 3 */
182*99a2dd95SBruce Richardson
183*99a2dd95SBruce Richardson /* {x1, x1, x2, x3} -> {x3, x1, x2, x3} */
184*99a2dd95SBruce Richardson addr = _mm_shuffle_epi32(addr, SHUFFLE32_SLOT3);
185*99a2dd95SBruce Richardson *indices2 = _mm_set_epi64x(trans[_mm_cvtsi128_si32(addr)], trans2);
186*99a2dd95SBruce Richardson
187*99a2dd95SBruce Richardson return _mm_srli_epi32(next_input, CHAR_BIT);
188*99a2dd95SBruce Richardson }
189*99a2dd95SBruce Richardson
190*99a2dd95SBruce Richardson /*
191*99a2dd95SBruce Richardson * Execute trie traversal with 8 traversals in parallel
192*99a2dd95SBruce Richardson */
193*99a2dd95SBruce Richardson static inline int
search_sse_8(const struct rte_acl_ctx * ctx,const uint8_t ** data,uint32_t * results,uint32_t total_packets,uint32_t categories)194*99a2dd95SBruce Richardson search_sse_8(const struct rte_acl_ctx *ctx, const uint8_t **data,
195*99a2dd95SBruce Richardson uint32_t *results, uint32_t total_packets, uint32_t categories)
196*99a2dd95SBruce Richardson {
197*99a2dd95SBruce Richardson int n;
198*99a2dd95SBruce Richardson struct acl_flow_data flows;
199*99a2dd95SBruce Richardson uint64_t index_array[MAX_SEARCHES_SSE8];
200*99a2dd95SBruce Richardson struct completion cmplt[MAX_SEARCHES_SSE8];
201*99a2dd95SBruce Richardson struct parms parms[MAX_SEARCHES_SSE8];
202*99a2dd95SBruce Richardson xmm_t input0, input1;
203*99a2dd95SBruce Richardson xmm_t indices1, indices2, indices3, indices4;
204*99a2dd95SBruce Richardson
205*99a2dd95SBruce Richardson acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
206*99a2dd95SBruce Richardson total_packets, categories, ctx->trans_table);
207*99a2dd95SBruce Richardson
208*99a2dd95SBruce Richardson for (n = 0; n < MAX_SEARCHES_SSE8; n++) {
209*99a2dd95SBruce Richardson cmplt[n].count = 0;
210*99a2dd95SBruce Richardson index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
211*99a2dd95SBruce Richardson }
212*99a2dd95SBruce Richardson
213*99a2dd95SBruce Richardson /*
214*99a2dd95SBruce Richardson * indices1 contains index_array[0,1]
215*99a2dd95SBruce Richardson * indices2 contains index_array[2,3]
216*99a2dd95SBruce Richardson * indices3 contains index_array[4,5]
217*99a2dd95SBruce Richardson * indices4 contains index_array[6,7]
218*99a2dd95SBruce Richardson */
219*99a2dd95SBruce Richardson
220*99a2dd95SBruce Richardson indices1 = _mm_loadu_si128((xmm_t *) &index_array[0]);
221*99a2dd95SBruce Richardson indices2 = _mm_loadu_si128((xmm_t *) &index_array[2]);
222*99a2dd95SBruce Richardson
223*99a2dd95SBruce Richardson indices3 = _mm_loadu_si128((xmm_t *) &index_array[4]);
224*99a2dd95SBruce Richardson indices4 = _mm_loadu_si128((xmm_t *) &index_array[6]);
225*99a2dd95SBruce Richardson
226*99a2dd95SBruce Richardson /* Check for any matches. */
227*99a2dd95SBruce Richardson acl_match_check_x4(0, ctx, parms, &flows,
228*99a2dd95SBruce Richardson &indices1, &indices2, xmm_match_mask.x);
229*99a2dd95SBruce Richardson acl_match_check_x4(4, ctx, parms, &flows,
230*99a2dd95SBruce Richardson &indices3, &indices4, xmm_match_mask.x);
231*99a2dd95SBruce Richardson
232*99a2dd95SBruce Richardson while (flows.started > 0) {
233*99a2dd95SBruce Richardson
234*99a2dd95SBruce Richardson /* Gather 4 bytes of input data for each stream. */
235*99a2dd95SBruce Richardson input0 = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 0));
236*99a2dd95SBruce Richardson input1 = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 4));
237*99a2dd95SBruce Richardson
238*99a2dd95SBruce Richardson input0 = _mm_insert_epi32(input0, GET_NEXT_4BYTES(parms, 1), 1);
239*99a2dd95SBruce Richardson input1 = _mm_insert_epi32(input1, GET_NEXT_4BYTES(parms, 5), 1);
240*99a2dd95SBruce Richardson
241*99a2dd95SBruce Richardson input0 = _mm_insert_epi32(input0, GET_NEXT_4BYTES(parms, 2), 2);
242*99a2dd95SBruce Richardson input1 = _mm_insert_epi32(input1, GET_NEXT_4BYTES(parms, 6), 2);
243*99a2dd95SBruce Richardson
244*99a2dd95SBruce Richardson input0 = _mm_insert_epi32(input0, GET_NEXT_4BYTES(parms, 3), 3);
245*99a2dd95SBruce Richardson input1 = _mm_insert_epi32(input1, GET_NEXT_4BYTES(parms, 7), 3);
246*99a2dd95SBruce Richardson
247*99a2dd95SBruce Richardson /* Process the 4 bytes of input on each stream. */
248*99a2dd95SBruce Richardson
249*99a2dd95SBruce Richardson input0 = transition4(input0, flows.trans,
250*99a2dd95SBruce Richardson &indices1, &indices2);
251*99a2dd95SBruce Richardson input1 = transition4(input1, flows.trans,
252*99a2dd95SBruce Richardson &indices3, &indices4);
253*99a2dd95SBruce Richardson
254*99a2dd95SBruce Richardson input0 = transition4(input0, flows.trans,
255*99a2dd95SBruce Richardson &indices1, &indices2);
256*99a2dd95SBruce Richardson input1 = transition4(input1, flows.trans,
257*99a2dd95SBruce Richardson &indices3, &indices4);
258*99a2dd95SBruce Richardson
259*99a2dd95SBruce Richardson input0 = transition4(input0, flows.trans,
260*99a2dd95SBruce Richardson &indices1, &indices2);
261*99a2dd95SBruce Richardson input1 = transition4(input1, flows.trans,
262*99a2dd95SBruce Richardson &indices3, &indices4);
263*99a2dd95SBruce Richardson
264*99a2dd95SBruce Richardson input0 = transition4(input0, flows.trans,
265*99a2dd95SBruce Richardson &indices1, &indices2);
266*99a2dd95SBruce Richardson input1 = transition4(input1, flows.trans,
267*99a2dd95SBruce Richardson &indices3, &indices4);
268*99a2dd95SBruce Richardson
269*99a2dd95SBruce Richardson /* Check for any matches. */
270*99a2dd95SBruce Richardson acl_match_check_x4(0, ctx, parms, &flows,
271*99a2dd95SBruce Richardson &indices1, &indices2, xmm_match_mask.x);
272*99a2dd95SBruce Richardson acl_match_check_x4(4, ctx, parms, &flows,
273*99a2dd95SBruce Richardson &indices3, &indices4, xmm_match_mask.x);
274*99a2dd95SBruce Richardson }
275*99a2dd95SBruce Richardson
276*99a2dd95SBruce Richardson return 0;
277*99a2dd95SBruce Richardson }
278*99a2dd95SBruce Richardson
279*99a2dd95SBruce Richardson /*
280*99a2dd95SBruce Richardson * Execute trie traversal with 4 traversals in parallel
281*99a2dd95SBruce Richardson */
282*99a2dd95SBruce Richardson static inline int
search_sse_4(const struct rte_acl_ctx * ctx,const uint8_t ** data,uint32_t * results,int total_packets,uint32_t categories)283*99a2dd95SBruce Richardson search_sse_4(const struct rte_acl_ctx *ctx, const uint8_t **data,
284*99a2dd95SBruce Richardson uint32_t *results, int total_packets, uint32_t categories)
285*99a2dd95SBruce Richardson {
286*99a2dd95SBruce Richardson int n;
287*99a2dd95SBruce Richardson struct acl_flow_data flows;
288*99a2dd95SBruce Richardson uint64_t index_array[MAX_SEARCHES_SSE4];
289*99a2dd95SBruce Richardson struct completion cmplt[MAX_SEARCHES_SSE4];
290*99a2dd95SBruce Richardson struct parms parms[MAX_SEARCHES_SSE4];
291*99a2dd95SBruce Richardson xmm_t input, indices1, indices2;
292*99a2dd95SBruce Richardson
293*99a2dd95SBruce Richardson acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
294*99a2dd95SBruce Richardson total_packets, categories, ctx->trans_table);
295*99a2dd95SBruce Richardson
296*99a2dd95SBruce Richardson for (n = 0; n < MAX_SEARCHES_SSE4; n++) {
297*99a2dd95SBruce Richardson cmplt[n].count = 0;
298*99a2dd95SBruce Richardson index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
299*99a2dd95SBruce Richardson }
300*99a2dd95SBruce Richardson
301*99a2dd95SBruce Richardson indices1 = _mm_loadu_si128((xmm_t *) &index_array[0]);
302*99a2dd95SBruce Richardson indices2 = _mm_loadu_si128((xmm_t *) &index_array[2]);
303*99a2dd95SBruce Richardson
304*99a2dd95SBruce Richardson /* Check for any matches. */
305*99a2dd95SBruce Richardson acl_match_check_x4(0, ctx, parms, &flows,
306*99a2dd95SBruce Richardson &indices1, &indices2, xmm_match_mask.x);
307*99a2dd95SBruce Richardson
308*99a2dd95SBruce Richardson while (flows.started > 0) {
309*99a2dd95SBruce Richardson
310*99a2dd95SBruce Richardson /* Gather 4 bytes of input data for each stream. */
311*99a2dd95SBruce Richardson input = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 0));
312*99a2dd95SBruce Richardson input = _mm_insert_epi32(input, GET_NEXT_4BYTES(parms, 1), 1);
313*99a2dd95SBruce Richardson input = _mm_insert_epi32(input, GET_NEXT_4BYTES(parms, 2), 2);
314*99a2dd95SBruce Richardson input = _mm_insert_epi32(input, GET_NEXT_4BYTES(parms, 3), 3);
315*99a2dd95SBruce Richardson
316*99a2dd95SBruce Richardson /* Process the 4 bytes of input on each stream. */
317*99a2dd95SBruce Richardson input = transition4(input, flows.trans, &indices1, &indices2);
318*99a2dd95SBruce Richardson input = transition4(input, flows.trans, &indices1, &indices2);
319*99a2dd95SBruce Richardson input = transition4(input, flows.trans, &indices1, &indices2);
320*99a2dd95SBruce Richardson input = transition4(input, flows.trans, &indices1, &indices2);
321*99a2dd95SBruce Richardson
322*99a2dd95SBruce Richardson /* Check for any matches. */
323*99a2dd95SBruce Richardson acl_match_check_x4(0, ctx, parms, &flows,
324*99a2dd95SBruce Richardson &indices1, &indices2, xmm_match_mask.x);
325*99a2dd95SBruce Richardson }
326*99a2dd95SBruce Richardson
327*99a2dd95SBruce Richardson return 0;
328*99a2dd95SBruce Richardson }
329