xref: /dpdk/examples/vm_power_manager/power_manager.c (revision 27b549c12df2ef2db6b271795b4df7b14a2d9c2c)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2014 Intel Corporation
3  */
4 
5 #include <stdio.h>
6 #include <stdlib.h>
7 #include <stdint.h>
8 #include <inttypes.h>
9 #include <fcntl.h>
10 #include <unistd.h>
11 #include <dirent.h>
12 #include <errno.h>
13 
14 #include <sys/sysinfo.h>
15 #include <sys/types.h>
16 
17 #include <rte_log.h>
18 #include <rte_power.h>
19 #include <rte_spinlock.h>
20 
21 #include "channel_manager.h"
22 #include "power_manager.h"
23 #include "oob_monitor.h"
24 
25 #define POWER_SCALE_CORE(DIRECTION, core_num , ret) do { \
26 	if (core_num >= ci.core_count) \
27 		return -1; \
28 	if (!(ci.cd[core_num].global_enabled_cpus)) \
29 		return -1; \
30 	rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); \
31 	ret = rte_power_freq_##DIRECTION(core_num); \
32 	rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \
33 } while (0)
34 
35 struct freq_info {
36 	rte_spinlock_t power_sl;
37 	uint32_t freqs[RTE_MAX_LCORE_FREQS];
38 	unsigned num_freqs;
39 } __rte_cache_aligned;
40 
41 static struct freq_info global_core_freq_info[RTE_MAX_LCORE];
42 
43 struct core_info ci;
44 
45 #define SYSFS_CPU_PATH "/sys/devices/system/cpu/cpu%u/topology/core_id"
46 
47 struct core_info *
48 get_core_info(void)
49 {
50 	return &ci;
51 }
52 
53 int
54 core_info_init(void)
55 {
56 	struct core_info *ci;
57 	int i;
58 
59 	ci = get_core_info();
60 
61 	ci->core_count = get_nprocs_conf();
62 	ci->cd = malloc(ci->core_count * sizeof(struct core_details));
63 	memset(ci->cd, 0, ci->core_count * sizeof(struct core_details));
64 	if (!ci->cd) {
65 		RTE_LOG(ERR, POWER_MANAGER, "Failed to allocate memory for core info.");
66 		return -1;
67 	}
68 	for (i = 0; i < ci->core_count; i++) {
69 		ci->cd[i].global_enabled_cpus = 1;
70 		ci->cd[i].branch_ratio_threshold = BRANCH_RATIO_THRESHOLD;
71 	}
72 	printf("%d cores in system\n", ci->core_count);
73 	return 0;
74 }
75 
76 int
77 power_manager_init(void)
78 {
79 	unsigned int i, num_cpus = 0, num_freqs = 0;
80 	int ret = 0;
81 	struct core_info *ci;
82 	unsigned int max_core_num;
83 
84 	rte_power_set_env(PM_ENV_NOT_SET);
85 
86 	ci = get_core_info();
87 	if (!ci) {
88 		RTE_LOG(ERR, POWER_MANAGER,
89 				"Failed to get core info!\n");
90 		return -1;
91 	}
92 
93 	if (ci->core_count > RTE_MAX_LCORE)
94 		max_core_num = RTE_MAX_LCORE;
95 	else
96 		max_core_num = ci->core_count;
97 
98 	for (i = 0; i < max_core_num; i++) {
99 		if (ci->cd[i].global_enabled_cpus) {
100 			if (rte_power_init(i) < 0)
101 				RTE_LOG(ERR, POWER_MANAGER,
102 						"Unable to initialize power manager "
103 						"for core %u\n", i);
104 			num_cpus++;
105 			num_freqs = rte_power_freqs(i,
106 					global_core_freq_info[i].freqs,
107 					RTE_MAX_LCORE_FREQS);
108 			if (num_freqs == 0) {
109 				RTE_LOG(ERR, POWER_MANAGER,
110 					"Unable to get frequency list for core %u\n",
111 					i);
112 				ci->cd[i].oob_enabled = 0;
113 				ret = -1;
114 			}
115 			global_core_freq_info[i].num_freqs = num_freqs;
116 
117 			rte_spinlock_init(&global_core_freq_info[i].power_sl);
118 		}
119 		if (ci->cd[i].oob_enabled)
120 			add_core_to_monitor(i);
121 	}
122 	RTE_LOG(INFO, POWER_MANAGER, "Managing %u cores out of %u available host cores\n",
123 			num_cpus, ci->core_count);
124 	return ret;
125 
126 }
127 
128 uint32_t
129 power_manager_get_current_frequency(unsigned core_num)
130 {
131 	uint32_t freq, index;
132 
133 	if (core_num >= RTE_MAX_LCORE) {
134 		RTE_LOG(ERR, POWER_MANAGER, "Core(%u) is out of range 0...%d\n",
135 				core_num, RTE_MAX_LCORE-1);
136 		return -1;
137 	}
138 	if (!(ci.cd[core_num].global_enabled_cpus))
139 		return 0;
140 
141 	rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
142 	index = rte_power_get_freq(core_num);
143 	rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);
144 	if (index >= RTE_MAX_LCORE_FREQS)
145 		freq = 0;
146 	else
147 		freq = global_core_freq_info[core_num].freqs[index];
148 
149 	return freq;
150 }
151 
152 int
153 power_manager_exit(void)
154 {
155 	unsigned int i;
156 	int ret = 0;
157 	struct core_info *ci;
158 	unsigned int max_core_num;
159 
160 	ci = get_core_info();
161 	if (!ci) {
162 		RTE_LOG(ERR, POWER_MANAGER,
163 				"Failed to get core info!\n");
164 		return -1;
165 	}
166 
167 	if (ci->core_count > RTE_MAX_LCORE)
168 		max_core_num = RTE_MAX_LCORE;
169 	else
170 		max_core_num = ci->core_count;
171 
172 	for (i = 0; i < max_core_num; i++) {
173 		if (ci->cd[i].global_enabled_cpus) {
174 			if (rte_power_exit(i) < 0) {
175 				RTE_LOG(ERR, POWER_MANAGER, "Unable to shutdown power manager "
176 						"for core %u\n", i);
177 				ret = -1;
178 			}
179 			ci->cd[i].global_enabled_cpus = 0;
180 		}
181 		remove_core_from_monitor(i);
182 	}
183 	return ret;
184 }
185 
186 int
187 power_manager_scale_core_up(unsigned core_num)
188 {
189 	int ret = 0;
190 
191 	POWER_SCALE_CORE(up, core_num, ret);
192 	return ret;
193 }
194 
195 int
196 power_manager_scale_core_down(unsigned core_num)
197 {
198 	int ret = 0;
199 
200 	POWER_SCALE_CORE(down, core_num, ret);
201 	return ret;
202 }
203 
204 int
205 power_manager_scale_core_min(unsigned core_num)
206 {
207 	int ret = 0;
208 
209 	POWER_SCALE_CORE(min, core_num, ret);
210 	return ret;
211 }
212 
213 int
214 power_manager_scale_core_max(unsigned core_num)
215 {
216 	int ret = 0;
217 
218 	POWER_SCALE_CORE(max, core_num, ret);
219 	return ret;
220 }
221 
222 int
223 power_manager_enable_turbo_core(unsigned int core_num)
224 {
225 	int ret = 0;
226 
227 	POWER_SCALE_CORE(enable_turbo, core_num, ret);
228 	return ret;
229 }
230 
231 int
232 power_manager_disable_turbo_core(unsigned int core_num)
233 {
234 	int ret = 0;
235 
236 	POWER_SCALE_CORE(disable_turbo, core_num, ret);
237 	return ret;
238 }
239 
240 int
241 power_manager_scale_core_med(unsigned int core_num)
242 {
243 	int ret = 0;
244 	struct core_info *ci;
245 
246 	ci = get_core_info();
247 	if (core_num >= RTE_MAX_LCORE)
248 		return -1;
249 	if (!(ci->cd[core_num].global_enabled_cpus))
250 		return -1;
251 	rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
252 	ret = rte_power_set_freq(core_num,
253 				global_core_freq_info[core_num].num_freqs / 2);
254 	rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);
255 	return ret;
256 }
257