xref: /dpdk/examples/timer/main.c (revision af75078fece3615088e561357c1e97603e43a5fe)
1*af75078fSIntel /*-
2*af75078fSIntel  *   BSD LICENSE
3*af75078fSIntel  *
4*af75078fSIntel  *   Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
5*af75078fSIntel  *   All rights reserved.
6*af75078fSIntel  *
7*af75078fSIntel  *   Redistribution and use in source and binary forms, with or without
8*af75078fSIntel  *   modification, are permitted provided that the following conditions
9*af75078fSIntel  *   are met:
10*af75078fSIntel  *
11*af75078fSIntel  *     * Redistributions of source code must retain the above copyright
12*af75078fSIntel  *       notice, this list of conditions and the following disclaimer.
13*af75078fSIntel  *     * Redistributions in binary form must reproduce the above copyright
14*af75078fSIntel  *       notice, this list of conditions and the following disclaimer in
15*af75078fSIntel  *       the documentation and/or other materials provided with the
16*af75078fSIntel  *       distribution.
17*af75078fSIntel  *     * Neither the name of Intel Corporation nor the names of its
18*af75078fSIntel  *       contributors may be used to endorse or promote products derived
19*af75078fSIntel  *       from this software without specific prior written permission.
20*af75078fSIntel  *
21*af75078fSIntel  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22*af75078fSIntel  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23*af75078fSIntel  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24*af75078fSIntel  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25*af75078fSIntel  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26*af75078fSIntel  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27*af75078fSIntel  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28*af75078fSIntel  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29*af75078fSIntel  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30*af75078fSIntel  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31*af75078fSIntel  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32*af75078fSIntel  *
33*af75078fSIntel  *  version: DPDK.L.1.2.3-3
34*af75078fSIntel  */
35*af75078fSIntel 
36*af75078fSIntel #include <stdio.h>
37*af75078fSIntel #include <string.h>
38*af75078fSIntel #include <stdint.h>
39*af75078fSIntel #include <errno.h>
40*af75078fSIntel #include <sys/queue.h>
41*af75078fSIntel 
42*af75078fSIntel #include <rte_common.h>
43*af75078fSIntel #include <rte_memory.h>
44*af75078fSIntel #include <rte_memzone.h>
45*af75078fSIntel #include <rte_launch.h>
46*af75078fSIntel #include <rte_tailq.h>
47*af75078fSIntel #include <rte_eal.h>
48*af75078fSIntel #include <rte_per_lcore.h>
49*af75078fSIntel #include <rte_lcore.h>
50*af75078fSIntel #include <rte_cycles.h>
51*af75078fSIntel #include <rte_timer.h>
52*af75078fSIntel #include <rte_debug.h>
53*af75078fSIntel 
54*af75078fSIntel #include "main.h"
55*af75078fSIntel 
56*af75078fSIntel #define TIMER_RESOLUTION_CYCLES 20000000ULL /* around 10ms at 2 Ghz */
57*af75078fSIntel 
58*af75078fSIntel static struct rte_timer timer0;
59*af75078fSIntel static struct rte_timer timer1;
60*af75078fSIntel 
61*af75078fSIntel /* timer0 callback */
62*af75078fSIntel static void
63*af75078fSIntel timer0_cb(__attribute__((unused)) struct rte_timer *tim,
64*af75078fSIntel 	  __attribute__((unused)) void *arg)
65*af75078fSIntel {
66*af75078fSIntel 	static unsigned counter = 0;
67*af75078fSIntel 	unsigned lcore_id = rte_lcore_id();
68*af75078fSIntel 
69*af75078fSIntel 	printf("%s() on lcore %u\n", __func__, lcore_id);
70*af75078fSIntel 
71*af75078fSIntel 	/* this timer is automatically reloaded until we decide to
72*af75078fSIntel 	 * stop it, when counter reaches 20. */
73*af75078fSIntel 	if ((counter ++) == 20)
74*af75078fSIntel 		rte_timer_stop(tim);
75*af75078fSIntel }
76*af75078fSIntel 
77*af75078fSIntel /* timer1 callback */
78*af75078fSIntel static void
79*af75078fSIntel timer1_cb(__attribute__((unused)) struct rte_timer *tim,
80*af75078fSIntel 	  __attribute__((unused)) void *arg)
81*af75078fSIntel {
82*af75078fSIntel 	unsigned lcore_id = rte_lcore_id();
83*af75078fSIntel 	uint64_t hz;
84*af75078fSIntel 
85*af75078fSIntel 	printf("%s() on lcore %u\n", __func__, lcore_id);
86*af75078fSIntel 
87*af75078fSIntel 	/* reload it on another lcore */
88*af75078fSIntel 	hz = rte_get_hpet_hz();
89*af75078fSIntel 	lcore_id = rte_get_next_lcore(lcore_id, 0, 1);
90*af75078fSIntel 	rte_timer_reset(tim, hz/3, SINGLE, lcore_id, timer1_cb, NULL);
91*af75078fSIntel }
92*af75078fSIntel 
93*af75078fSIntel static __attribute__((noreturn)) int
94*af75078fSIntel lcore_mainloop(__attribute__((unused)) void *arg)
95*af75078fSIntel {
96*af75078fSIntel 	uint64_t prev_tsc = 0, cur_tsc, diff_tsc;
97*af75078fSIntel 	unsigned lcore_id;
98*af75078fSIntel 
99*af75078fSIntel 	lcore_id = rte_lcore_id();
100*af75078fSIntel 	printf("Starting mainloop on core %u\n", lcore_id);
101*af75078fSIntel 
102*af75078fSIntel 	while (1) {
103*af75078fSIntel 		/*
104*af75078fSIntel 		 * Call the timer handler on each core: as we don't
105*af75078fSIntel 		 * need a very precise timer, so only call
106*af75078fSIntel 		 * rte_timer_manage() every ~10ms (at 2Ghz). In a real
107*af75078fSIntel 		 * application, this will enhance performances as
108*af75078fSIntel 		 * reading the HPET timer is not efficient.
109*af75078fSIntel 		 */
110*af75078fSIntel 		cur_tsc = rte_rdtsc();
111*af75078fSIntel 		diff_tsc = cur_tsc - prev_tsc;
112*af75078fSIntel 		if (diff_tsc > TIMER_RESOLUTION_CYCLES) {
113*af75078fSIntel 			rte_timer_manage();
114*af75078fSIntel 			prev_tsc = cur_tsc;
115*af75078fSIntel 		}
116*af75078fSIntel 	}
117*af75078fSIntel }
118*af75078fSIntel 
119*af75078fSIntel int
120*af75078fSIntel MAIN(int argc, char **argv)
121*af75078fSIntel {
122*af75078fSIntel 	int ret;
123*af75078fSIntel 	uint64_t hz;
124*af75078fSIntel 	unsigned lcore_id;
125*af75078fSIntel 
126*af75078fSIntel 	/* init EAL */
127*af75078fSIntel 	ret = rte_eal_init(argc, argv);
128*af75078fSIntel 	if (ret < 0)
129*af75078fSIntel 		rte_panic("Cannot init EAL\n");
130*af75078fSIntel 
131*af75078fSIntel 	/* init RTE timer library */
132*af75078fSIntel 	rte_timer_subsystem_init();
133*af75078fSIntel 
134*af75078fSIntel 	/* init timer structures */
135*af75078fSIntel 	rte_timer_init(&timer0);
136*af75078fSIntel 	rte_timer_init(&timer1);
137*af75078fSIntel 
138*af75078fSIntel 	/* load timer0, every second, on master lcore, reloaded automatically */
139*af75078fSIntel 	hz = rte_get_hpet_hz();
140*af75078fSIntel 	lcore_id = rte_lcore_id();
141*af75078fSIntel 	rte_timer_reset(&timer0, hz, PERIODICAL, lcore_id, timer0_cb, NULL);
142*af75078fSIntel 
143*af75078fSIntel 	/* load timer1, every second/3, on next lcore, reloaded manually */
144*af75078fSIntel 	lcore_id = rte_get_next_lcore(lcore_id, 0, 1);
145*af75078fSIntel 	rte_timer_reset(&timer1, hz/3, SINGLE, lcore_id, timer1_cb, NULL);
146*af75078fSIntel 
147*af75078fSIntel 	/* call lcore_mainloop() on every slave lcore */
148*af75078fSIntel 	RTE_LCORE_FOREACH_SLAVE(lcore_id) {
149*af75078fSIntel 		rte_eal_remote_launch(lcore_mainloop, NULL, lcore_id);
150*af75078fSIntel 	}
151*af75078fSIntel 
152*af75078fSIntel 	/* call it on master lcore too */
153*af75078fSIntel 	(void) lcore_mainloop(NULL);
154*af75078fSIntel 
155*af75078fSIntel 	return 0;
156*af75078fSIntel }
157