1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _MAIN_H_ 35 #define _MAIN_H_ 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 #include <rte_sched.h> 42 43 #define RTE_LOGTYPE_APP RTE_LOGTYPE_USER1 44 45 /* 46 * Configurable number of RX/TX ring descriptors 47 */ 48 #define APP_INTERACTIVE_DEFAULT 0 49 50 #define APP_RX_DESC_DEFAULT 128 51 #define APP_TX_DESC_DEFAULT 256 52 53 #define APP_RING_SIZE (8*1024) 54 #define NB_MBUF (2*1024*1024) 55 56 #define MAX_PKT_RX_BURST 64 57 #define PKT_ENQUEUE 64 58 #define PKT_DEQUEUE 32 59 #define MAX_PKT_TX_BURST 64 60 61 #define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */ 62 #define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */ 63 #define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */ 64 65 #define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */ 66 #define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */ 67 #define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */ 68 69 #define BURST_TX_DRAIN_US 100 70 71 #ifndef APP_MAX_LCORE 72 #if (RTE_MAX_LCORE > 64) 73 #define APP_MAX_LCORE 64 74 #else 75 #define APP_MAX_LCORE RTE_MAX_LCORE 76 #endif 77 #endif 78 79 #define MAX_DATA_STREAMS (APP_MAX_LCORE/2) 80 #define MAX_SCHED_SUBPORTS 8 81 #define MAX_SCHED_PIPES 4096 82 83 #ifndef APP_COLLECT_STAT 84 #define APP_COLLECT_STAT 1 85 #endif 86 87 #if APP_COLLECT_STAT 88 #define APP_STATS_ADD(stat,val) (stat) += (val) 89 #else 90 #define APP_STATS_ADD(stat,val) do {(void) (val);} while (0) 91 #endif 92 93 #define APP_QAVG_NTIMES 10 94 #define APP_QAVG_PERIOD 100 95 96 struct thread_stat 97 { 98 uint64_t nb_rx; 99 uint64_t nb_drop; 100 }; 101 102 103 struct thread_conf 104 { 105 uint32_t counter; 106 uint32_t n_mbufs; 107 struct rte_mbuf **m_table; 108 109 uint16_t rx_port; 110 uint16_t tx_port; 111 uint16_t rx_queue; 112 uint16_t tx_queue; 113 struct rte_ring *rx_ring; 114 struct rte_ring *tx_ring; 115 struct rte_sched_port *sched_port; 116 117 #if APP_COLLECT_STAT 118 struct thread_stat stat; 119 #endif 120 } __rte_cache_aligned; 121 122 123 struct flow_conf 124 { 125 uint32_t rx_core; 126 uint32_t wt_core; 127 uint32_t tx_core; 128 uint16_t rx_port; 129 uint16_t tx_port; 130 uint16_t rx_queue; 131 uint16_t tx_queue; 132 struct rte_ring *rx_ring; 133 struct rte_ring *tx_ring; 134 struct rte_sched_port *sched_port; 135 struct rte_mempool *mbuf_pool; 136 137 struct thread_conf rx_thread; 138 struct thread_conf wt_thread; 139 struct thread_conf tx_thread; 140 }; 141 142 143 struct ring_conf 144 { 145 uint32_t rx_size; 146 uint32_t ring_size; 147 uint32_t tx_size; 148 }; 149 150 struct burst_conf 151 { 152 uint16_t rx_burst; 153 uint16_t ring_burst; 154 uint16_t qos_dequeue; 155 uint16_t tx_burst; 156 }; 157 158 struct ring_thresh 159 { 160 uint8_t pthresh; /**< Ring prefetch threshold. */ 161 uint8_t hthresh; /**< Ring host threshold. */ 162 uint8_t wthresh; /**< Ring writeback threshold. */ 163 }; 164 165 extern uint8_t interactive; 166 extern uint32_t qavg_period; 167 extern uint32_t qavg_ntimes; 168 extern uint32_t nb_pfc; 169 extern const char *cfg_profile; 170 extern int mp_size; 171 extern struct flow_conf qos_conf[]; 172 extern int app_pipe_to_profile[MAX_SCHED_SUBPORTS][MAX_SCHED_PIPES]; 173 174 extern struct ring_conf ring_conf; 175 extern struct burst_conf burst_conf; 176 extern struct ring_thresh rx_thresh; 177 extern struct ring_thresh tx_thresh; 178 179 extern struct rte_sched_port_params port_params; 180 181 int app_parse_args(int argc, char **argv); 182 int app_init(void); 183 184 void prompt(void); 185 void app_rx_thread(struct thread_conf **qconf); 186 void app_tx_thread(struct thread_conf **qconf); 187 void app_worker_thread(struct thread_conf **qconf); 188 void app_mixed_thread(struct thread_conf **qconf); 189 190 void app_stat(void); 191 int subport_stat(uint16_t port_id, uint32_t subport_id); 192 int pipe_stat(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id); 193 int qavg_q(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id, 194 uint8_t tc, uint8_t q); 195 int qavg_tcpipe(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id, 196 uint8_t tc); 197 int qavg_pipe(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id); 198 int qavg_tcsubport(uint16_t port_id, uint32_t subport_id, uint8_t tc); 199 int qavg_subport(uint16_t port_id, uint32_t subport_id); 200 201 #ifdef __cplusplus 202 } 203 #endif 204 205 #endif /* _MAIN_H_ */ 206